blob: 71b17ce3a59957fc493a750270bceb5064185087 [file] [log] [blame]
Ley Foon Tan594cacf2019-11-27 15:55:29 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2019 Intel Corporation <www.intel.com>
4 *
5 */
6
Simon Glass691d7192020-05-10 11:40:02 -06007#include <init.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -06008#include <log.h>
Simon Glass401d1c42020-10-30 21:38:53 -06009#include <asm/global_data.h>
Ley Foon Tan594cacf2019-11-27 15:55:29 +080010#include <asm/io.h>
11#include <asm/u-boot.h>
12#include <asm/utils.h>
13#include <common.h>
Simon Glassdb41d652019-12-28 10:45:07 -070014#include <hang.h>
Ley Foon Tan594cacf2019-11-27 15:55:29 +080015#include <image.h>
16#include <spl.h>
17#include <asm/arch/clock_manager.h>
18#include <asm/arch/firewall.h>
19#include <asm/arch/mailbox_s10.h>
20#include <asm/arch/misc.h>
21#include <asm/arch/reset_manager.h>
22#include <asm/arch/system_manager.h>
23#include <watchdog.h>
24#include <dm/uclass.h>
25
26DECLARE_GLOBAL_DATA_PTR;
27
28u32 spl_boot_device(void)
29{
30 return BOOT_DEVICE_MMC1;
31}
32
33#ifdef CONFIG_SPL_MMC_SUPPORT
Harald Seilere9759062020-04-15 11:33:30 +020034u32 spl_mmc_boot_mode(const u32 boot_device)
Ley Foon Tan594cacf2019-11-27 15:55:29 +080035{
36#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
37 return MMCSD_MODE_FS;
38#else
39 return MMCSD_MODE_RAW;
40#endif
41}
42#endif
43
44void board_init_f(ulong dummy)
45{
46 int ret;
47 struct udevice *dev;
48
49 ret = spl_early_init();
50 if (ret)
51 hang();
52
53 socfpga_get_managers_addr();
54
Ley Foon Tan594cacf2019-11-27 15:55:29 +080055 /* Ensure watchdog is paused when debugging is happening */
56 writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
57 socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG);
58
Chee Hong Ang2473e132020-08-06 12:15:33 +080059#ifdef CONFIG_HW_WATCHDOG
Ley Foon Tan594cacf2019-11-27 15:55:29 +080060 /* Enable watchdog before initializing the HW */
61 socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
62 socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
63 hw_watchdog_init();
64#endif
65
66 /* ensure all processors are not released prior Linux boot */
67 writeq(0, CPU_RELEASE_ADDR);
68
69 timer_init();
70
71 sysmgr_pinmux_init();
72
73 ret = uclass_get_device(UCLASS_CLK, 0, &dev);
74 if (ret) {
75 debug("Clock init failed: %d\n", ret);
76 hang();
77 }
78
79 preloader_console_init();
Chee Hong Angb3e2d9f2020-08-05 21:15:57 +080080 print_reset_info();
Ley Foon Tan594cacf2019-11-27 15:55:29 +080081 cm_print_clock_quick_summary();
82
83 firewall_setup();
84 ret = uclass_get_device(UCLASS_CACHE, 0, &dev);
85 if (ret) {
86 debug("CCU init failed: %d\n", ret);
87 hang();
88 }
89
90#if CONFIG_IS_ENABLED(ALTERA_SDRAM)
91 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
92 if (ret) {
93 debug("DRAM init failed: %d\n", ret);
94 hang();
95 }
96#endif
97
98 mbox_init();
99
100#ifdef CONFIG_CADENCE_QSPI
101 mbox_qspi_open();
102#endif
103}