blob: c4dc47dccb43a09c5bee2d8fcf6e4cdbbdc7ead2 [file] [log] [blame]
Tom Riniba1ed5b2021-12-14 13:36:35 -05001config ARCH_MAP_SYSMEM
Tom Rini11232132022-04-06 09:21:25 -04002 depends on SANDBOX
Tom Riniba1ed5b2021-12-14 13:36:35 -05003 def_bool y
4
Masahiro Yamadaa350c6a2015-07-15 20:59:29 +09005config CREATE_ARCH_SYMLINK
6 bool
7
Masahiro Yamada9a387122016-06-28 10:48:42 +09008config HAVE_ARCH_IOREMAP
9 bool
10
Tom Riniab92b382021-08-26 11:47:59 -040011config SYS_CACHE_SHIFT_4
12 bool
13
14config SYS_CACHE_SHIFT_5
15 bool
16
17config SYS_CACHE_SHIFT_6
18 bool
19
20config SYS_CACHE_SHIFT_7
21 bool
22
23config SYS_CACHELINE_SIZE
24 int
25 default 128 if SYS_CACHE_SHIFT_7
26 default 64 if SYS_CACHE_SHIFT_6
27 default 32 if SYS_CACHE_SHIFT_5
28 default 16 if SYS_CACHE_SHIFT_4
29 # Fall-back for MIPS
30 default 32 if MIPS
31
Simon Glass0b2fa982020-12-16 21:20:06 -070032config LINKER_LIST_ALIGN
33 int
34 default 32 if SANDBOX
35 default 8 if ARM64 || X86
36 default 4
37 help
38 Force the each linker list to be aligned to this boundary. This
39 is required if ll_entry_get() is used, since otherwise the linker
40 may add padding into the table, thus breaking it.
41 See linker_lists.rst for full details.
42
Masahiro Yamada51631252014-07-30 14:08:15 +090043choice
44 prompt "Architecture select"
45 default SANDBOX
46
47config ARC
48 bool "ARC architecture"
Michal Simek5ed063d2018-07-23 15:55:13 +020049 select ARC_TIMER
50 select CLK
Michal Simek7b564322020-08-19 10:44:20 +020051 select DM
Alexey Brodkina67ef282015-02-03 13:58:20 +030052 select HAVE_PRIVATE_LIBGCC
Alexey Brodkin01496c42015-03-17 14:55:14 +030053 select SUPPORT_OF_CONTROL
Tom Riniab92b382021-08-26 11:47:59 -040054 select SYS_CACHE_SHIFT_7
Vlad Zakharov3daa7c72017-03-21 14:49:49 +030055 select TIMER
Tom Rini83505a72022-07-31 21:08:23 -040056 select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
57 select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
Masahiro Yamada51631252014-07-30 14:08:15 +090058
59config ARM
60 bool "ARM architecture"
Marek Behún8f969652021-05-20 13:24:22 +020061 select ARCH_SUPPORTS_LTO
Masahiro Yamadaa350c6a2015-07-15 20:59:29 +090062 select CREATE_ARCH_SYMLINK
Masahiro Yamada64b77ed2015-07-03 16:13:09 +090063 select HAVE_PRIVATE_LIBGCC if !ARM64
Simon Glass01537232021-12-01 09:02:38 -070064 select SUPPORT_ACPI
Masahiro Yamada783e6a72014-09-22 19:59:05 +090065 select SUPPORT_OF_CONTROL
Masahiro Yamada51631252014-07-30 14:08:15 +090066
Masahiro Yamada51631252014-07-30 14:08:15 +090067config M68K
68 bool "M68000 architecture"
angelo@sysam.it6463fd82015-12-06 17:47:59 +010069 select HAVE_PRIVATE_LIBGCC
Michal Simek35b7ca72020-11-04 15:33:20 +010070 select NEEDS_MANUAL_RELOC
Derald D. Woods405fc832018-01-22 17:17:10 -060071 select SYS_BOOT_GET_CMDLINE
72 select SYS_BOOT_GET_KBD
Tom Riniab92b382021-08-26 11:47:59 -040073 select SYS_CACHE_SHIFT_4
Angelo Dureghelloabe0f872019-03-13 21:46:51 +010074 select SUPPORT_OF_CONTROL
Masahiro Yamada51631252014-07-30 14:08:15 +090075
76config MICROBLAZE
77 bool "MicroBlaze architecture"
Masahiro Yamada783e6a72014-09-22 19:59:05 +090078 select SUPPORT_OF_CONTROL
Michal Simeka36d8672022-06-24 14:16:32 +020079 imply CMD_TIMER
80 imply SPL_REGMAP if SPL
81 imply SPL_TIMER if SPL
82 imply TIMER
83 imply XILINX_TIMER
Masahiro Yamada51631252014-07-30 14:08:15 +090084
85config MIPS
86 bool "MIPS architecture"
Masahiro Yamada9a387122016-06-28 10:48:42 +090087 select HAVE_ARCH_IOREMAP
Masahiro Yamada45ccec82014-10-24 01:30:43 +090088 select HAVE_PRIVATE_LIBGCC
Daniel Schwierzeck0fc13a92015-12-19 20:20:48 +010089 select SUPPORT_OF_CONTROL
Sean Anderson1dd56db2022-04-12 10:59:04 -040090 select SPL_SEPARATE_BSS if SPL
Masahiro Yamada51631252014-07-30 14:08:15 +090091
Masahiro Yamada51631252014-07-30 14:08:15 +090092config NIOS2
93 bool "Nios II architecture"
Thomas Choubcae80e2015-10-21 21:34:57 +080094 select CPU
Michal Simek5ed063d2018-07-23 15:55:13 +020095 select DM
Simon Glass7fe32b32022-03-04 08:43:05 -070096 imply DM_EVENT
Michal Simek5ed063d2018-07-23 15:55:13 +020097 select OF_CONTROL
98 select SUPPORT_OF_CONTROL
Michal Simek08a00cb2018-07-23 15:55:14 +020099 imply CMD_DM
Masahiro Yamada51631252014-07-30 14:08:15 +0900100
Masahiro Yamada51631252014-07-30 14:08:15 +0900101config PPC
102 bool "PowerPC architecture"
Masahiro Yamada45ccec82014-10-24 01:30:43 +0900103 select HAVE_PRIVATE_LIBGCC
Simon Glassc1c61572015-02-07 11:51:35 -0700104 select SUPPORT_OF_CONTROL
Derald D. Woods405fc832018-01-22 17:17:10 -0600105 select SYS_BOOT_GET_CMDLINE
106 select SYS_BOOT_GET_KBD
Masahiro Yamada51631252014-07-30 14:08:15 +0900107
Rick Chen068feb92017-12-26 13:55:58 +0800108config RISCV
Bin Meng117a4332018-09-26 06:55:06 -0700109 bool "RISC-V architecture"
Anup Patel7c8d2102019-02-25 08:14:04 +0000110 select CREATE_ARCH_SYMLINK
Rick Chen068feb92017-12-26 13:55:58 +0800111 select SUPPORT_OF_CONTROL
Bin Mengbf6cc822018-09-26 06:55:19 -0700112 select OF_CONTROL
113 select DM
Sean Anderson1dd56db2022-04-12 10:59:04 -0400114 select SPL_SEPARATE_BSS if SPL
Bin Mengcd1f45c2018-09-26 06:55:20 -0700115 imply DM_SERIAL
116 imply DM_ETH
Simon Glass7fe32b32022-03-04 08:43:05 -0700117 imply DM_EVENT
Bin Mengcd1f45c2018-09-26 06:55:20 -0700118 imply DM_MMC
119 imply DM_SPI
120 imply DM_SPI_FLASH
121 imply BLK
122 imply CLK
123 imply MTD
124 imply TIMER
Bin Mengbf6cc822018-09-26 06:55:19 -0700125 imply CMD_DM
Lukas Auer8c59f202019-08-21 21:14:45 +0200126 imply SPL_DM
127 imply SPL_OF_CONTROL
128 imply SPL_LIBCOMMON_SUPPORT
129 imply SPL_LIBGENERIC_SUPPORT
Simon Glass2a736062021-08-08 12:20:12 -0600130 imply SPL_SERIAL
Lukas Auer8c59f202019-08-21 21:14:45 +0200131 imply SPL_TIMER
Rick Chen068feb92017-12-26 13:55:58 +0800132
Masahiro Yamada51631252014-07-30 14:08:15 +0900133config SANDBOX
134 bool "Sandbox"
Marek Behún94bb8912021-05-20 13:24:07 +0200135 select ARCH_SUPPORTS_LTO
Tom Rinie5ec4812017-01-22 19:43:11 -0500136 select BOARD_LATE_INIT
Michael Walleefc06442020-05-22 14:07:38 +0200137 select BZIP2
Heinrich Schuchardtb1ad4152020-10-27 20:29:22 +0100138 select CMD_POWEROFF
Masahiro Yamada58d423b2015-03-31 12:47:53 +0900139 select DM
Andrew Scull0518e7a2022-05-30 10:00:12 +0000140 select DM_FUZZING_ENGINE
Masahiro Yamada58d423b2015-03-31 12:47:53 +0900141 select DM_GPIO
Michal Simek5ed063d2018-07-23 15:55:13 +0200142 select DM_I2C
143 select DM_KEYBOARD
Simon Glass9a46bd32016-06-12 23:30:26 -0600144 select DM_MMC
Michal Simek5ed063d2018-07-23 15:55:13 +0200145 select DM_SERIAL
146 select DM_SPI
147 select DM_SPI_FLASH
Michael Walleefc06442020-05-22 14:07:38 +0200148 select GZIP_COMPRESSED
Adam Ford1811a922018-02-06 12:43:56 -0600149 select HAVE_BLOCK_DEVICE
Tom Rinid56b4b12017-07-22 18:36:16 -0400150 select LZO
Heinrich Schuchardt1c0bc802020-03-14 12:13:40 +0100151 select OF_BOARD_SETUP
Ramon Friedbb413332019-04-27 11:15:23 +0300152 select PCI_ENDPOINT
Michal Simek5ed063d2018-07-23 15:55:13 +0200153 select SPI
154 select SUPPORT_OF_CONTROL
Heinrich Schuchardtb1ad4152020-10-27 20:29:22 +0100155 select SYSRESET_CMD_POWEROFF
Tom Riniab92b382021-08-26 11:47:59 -0400156 select SYS_CACHE_SHIFT_4
Wasim Khan57c675d2021-03-08 16:48:16 +0100157 select IRQ
Kory Maincent95300f22021-05-04 19:31:23 +0200158 select SUPPORT_EXTENSION_SCAN
Simon Glasse1722fc2021-12-01 09:02:36 -0700159 select SUPPORT_ACPI
Bin Meng0f1caa92018-08-02 23:58:03 -0700160 imply BITREVERSE
Simon Glass919e7a82018-11-15 18:43:53 -0700161 select BLOBLIST
Marek Behún1b457e72021-05-20 13:24:08 +0200162 imply LTO
Michal Simek08a00cb2018-07-23 15:55:14 +0200163 imply CMD_DM
Heinrich Schuchardt6ca5ff32020-11-12 00:29:59 +0100164 imply CMD_EXCEPTION
Simon Glassded48cd2017-05-17 03:25:44 -0600165 imply CMD_GETTIME
Simon Glass551c3932017-05-17 03:25:25 -0600166 imply CMD_HASH
Simon Glass594e8d12017-05-17 03:25:34 -0600167 imply CMD_IO
Simon Glass7d0f5c12017-05-17 03:25:36 -0600168 imply CMD_IOTRACE
Simon Glassee7c0e72017-05-17 03:25:43 -0600169 imply CMD_LZMADEC
Michal Simek5ed063d2018-07-23 15:55:13 +0200170 imply CMD_SATA
Tom Rinia4298dd2019-05-29 17:01:28 -0400171 imply CMD_SF
Michal Simek5ed063d2018-07-23 15:55:13 +0200172 imply CMD_SF_TEST
Tom Rini91d27a12017-06-02 11:03:50 -0400173 imply CRC32_VERIFY
174 imply FAT_WRITE
Rajan Vaja31b82172018-09-19 03:43:46 -0700175 imply FIRMWARE
Andrew Scull0518e7a2022-05-30 10:00:12 +0000176 imply FUZZING_ENGINE_SANDBOX
Daniel Thompson221a9492017-05-19 17:26:58 +0100177 imply HASH_VERIFY
Tom Rini91d27a12017-06-02 11:03:50 -0400178 imply LZMA
Jens Wiklanderfe39e8e2018-09-25 16:40:17 +0200179 imply TEE
Jens Wiklander0a60a812018-09-25 16:40:23 +0200180 imply AVB_VERIFY
181 imply LIBAVB
182 imply CMD_AVB
Heinrich Schuchardtd3adee12022-01-16 13:04:06 +0100183 imply PARTITION_TYPE_GUID
Igor Opaniuk7c591a82021-02-14 16:27:27 +0100184 imply SCP03
185 imply CMD_SCP03
Jens Wiklander0a60a812018-09-25 16:40:23 +0200186 imply UDP_FUNCTION_FASTBOOT
Bin Meng4f89d492018-10-15 02:21:26 -0700187 imply VIRTIO_MMIO
188 imply VIRTIO_PCI
189 imply VIRTIO_SANDBOX
190 imply VIRTIO_BLK
191 imply VIRTIO_NET
Simon Glass2a049572018-12-10 10:37:31 -0700192 imply DM_SOUND
Ramon Friedbb413332019-04-27 11:15:23 +0300193 imply PCI_SANDBOX_EP
Simon Glassc8821632019-02-16 20:24:49 -0700194 imply PCH
Alex Margineanec9594a2019-06-03 19:12:28 +0300195 imply PHYLIB
196 imply DM_MDIO
Alex Margineanc3d9f3f2019-07-12 10:13:53 +0300197 imply DM_MDIO_MUX
Simon Glass3b65ee32019-12-06 21:41:54 -0700198 imply ACPI_PMC
199 imply ACPI_PMC_SANDBOX
200 imply CMD_PMC
John Chau4a4830c2020-07-02 12:01:21 +0800201 imply CMD_CLONE
Simon Glassf158ba12020-11-05 10:33:38 -0700202 imply SILENT_CONSOLE
Simon Glass51bb3382020-11-05 10:33:48 -0700203 imply BOOTARGS_SUBST
Claudiu Manoilff98da02021-03-14 20:14:57 +0800204 imply PHY_FIXED
205 imply DM_DSA
Kory Maincent95300f22021-05-04 19:31:23 +0200206 imply CMD_EXTENSION
Simon Glass93e1edf2021-11-24 09:26:44 -0700207 imply KEYBOARD
Simon Glass6405ab72021-11-24 09:26:42 -0700208 imply PHYSMEM
Simon Glass437992d2021-12-01 09:02:43 -0700209 imply GENERATE_ACPI_TABLE
Philippe Reynes059df562022-03-28 22:56:53 +0200210 imply BINMAN
Masahiro Yamada51631252014-07-30 14:08:15 +0900211
212config SH
213 bool "SuperH architecture"
Masahiro Yamada45ccec82014-10-24 01:30:43 +0900214 select HAVE_PRIVATE_LIBGCC
Marek Vasut8c2c4632019-08-31 18:27:58 +0200215 select SUPPORT_OF_CONTROL
Masahiro Yamada51631252014-07-30 14:08:15 +0900216
Masahiro Yamada51631252014-07-30 14:08:15 +0900217config X86
218 bool "x86 architecture"
Simon Glass98987902019-04-25 21:58:45 -0600219 select SUPPORT_SPL
220 select SUPPORT_TPL
Masahiro Yamadaa350c6a2015-07-15 20:59:29 +0900221 select CREATE_ARCH_SYMLINK
Masahiro Yamada58d423b2015-03-31 12:47:53 +0900222 select DM
Bin Meng3bf9a8e2018-10-15 02:21:16 -0700223 select HAVE_ARCH_IOMAP
Michal Simek5ed063d2018-07-23 15:55:13 +0200224 select HAVE_PRIVATE_LIBGCC
225 select OF_CONTROL
Bin Meng4f0faac2017-07-30 06:23:16 -0700226 select PCI
Simon Glasse1722fc2021-12-01 09:02:36 -0700227 select SUPPORT_ACPI
Michal Simek5ed063d2018-07-23 15:55:13 +0200228 select SUPPORT_OF_CONTROL
Tom Riniab92b382021-08-26 11:47:59 -0400229 select SYS_CACHE_SHIFT_6
Bin Meng0ce9c572017-07-30 06:23:07 -0700230 select TIMER
Michal Simek5ed063d2018-07-23 15:55:13 +0200231 select USE_PRIVATE_LIBGCC
Bin Meng0ce9c572017-07-30 06:23:07 -0700232 select X86_TSC_TIMER
Wasim Khan543d0912021-03-08 16:48:15 +0100233 select IRQ
Simon Glassbcd4e6f2020-07-19 13:55:52 -0600234 imply HAS_ROM if X86_RESET_VECTOR
Bin Meng24357df2017-07-30 19:24:02 -0700235 imply BLK
Michal Simek08a00cb2018-07-23 15:55:14 +0200236 imply CMD_DM
Simon Glassfe7604a2017-05-17 03:25:21 -0600237 imply CMD_FPGA_LOADMK
Simon Glassd91a9d72017-05-17 03:25:23 -0600238 imply CMD_GETTIME
Simon Glass594e8d12017-05-17 03:25:34 -0600239 imply CMD_IO
Simon Glass1b330892017-05-17 03:25:39 -0600240 imply CMD_IRQ
Bin Mengc11b17c2017-08-16 05:46:49 -0700241 imply CMD_PCI
Tom Rinia4298dd2019-05-29 17:01:28 -0400242 imply CMD_SF
Simon Glass719d36e2017-08-04 16:34:46 -0600243 imply CMD_SF_TEST
Simon Glasse7a815f2017-08-04 16:35:03 -0600244 imply CMD_ZBOOT
Michal Simek5ed063d2018-07-23 15:55:13 +0200245 imply DM_ETH
Simon Glass7fe32b32022-03-04 08:43:05 -0700246 imply DM_EVENT
Michal Simek5ed063d2018-07-23 15:55:13 +0200247 imply DM_GPIO
248 imply DM_KEYBOARD
249 imply DM_MMC
250 imply DM_RTC
251 imply DM_SCSI
252 imply DM_SERIAL
253 imply DM_SPI
254 imply DM_SPI_FLASH
255 imply DM_USB
256 imply DM_VIDEO
257 imply SYSRESET
Kever Yang09259fc2019-04-02 20:41:25 +0800258 imply SPL_SYSRESET
Michal Simek5ed063d2018-07-23 15:55:13 +0200259 imply SYSRESET_X86
Chris Packhamf58ad982017-08-28 20:50:46 +1200260 imply USB_ETHER_ASIX
261 imply USB_ETHER_SMSC95XX
Michal Simek5ed063d2018-07-23 15:55:13 +0200262 imply USB_HOST_ETHER
Simon Glassc8821632019-02-16 20:24:49 -0700263 imply PCH
Simon Glass6405ab72021-11-24 09:26:42 -0700264 imply PHYSMEM
Simon Glass31d52612019-05-02 10:52:24 -0600265 imply RTC_MC146818
Simon Glass27ba6282021-12-01 09:02:39 -0700266 imply ACPIGEN if !QEMU && !EFI_APP
Simon Glass839d66c2020-11-05 06:32:17 -0700267 imply SYSINFO if GENERATE_SMBIOS_TABLE
268 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
Simon Glassd6b318d2021-12-18 11:27:50 -0700269 imply TIMESTAMP
Masahiro Yamada51631252014-07-30 14:08:15 +0900270
Simon Glass98987902019-04-25 21:58:45 -0600271 # Thing to enable for when SPL/TPL are enabled: SPL
272 imply SPL_DM
273 imply SPL_OF_LIBFDT
Simon Glass9ca00682021-07-10 21:14:31 -0600274 imply SPL_DRIVERS_MISC
Simon Glass83061db2021-07-10 21:14:30 -0600275 imply SPL_GPIO
Simon Glasse556d3d2019-12-06 21:42:51 -0700276 imply SPL_PINCTRL
Simon Glass98987902019-04-25 21:58:45 -0600277 imply SPL_LIBCOMMON_SUPPORT
278 imply SPL_LIBGENERIC_SUPPORT
Simon Glass2a736062021-08-08 12:20:12 -0600279 imply SPL_SERIAL
Simon Glass98987902019-04-25 21:58:45 -0600280 imply SPL_SPI_FLASH_SUPPORT
Simon Glassea2ca7e2021-08-08 12:20:14 -0600281 imply SPL_SPI
Simon Glass98987902019-04-25 21:58:45 -0600282 imply SPL_OF_CONTROL
283 imply SPL_TIMER
284 imply SPL_REGMAP
285 imply SPL_SYSCON
286 # TPL
287 imply TPL_DM
Simon Glass9ca00682021-07-10 21:14:31 -0600288 imply TPL_DRIVERS_MISC
Simon Glass83061db2021-07-10 21:14:30 -0600289 imply TPL_GPIO
Simon Glasse556d3d2019-12-06 21:42:51 -0700290 imply TPL_PINCTRL
Simon Glass98987902019-04-25 21:58:45 -0600291 imply TPL_LIBCOMMON_SUPPORT
292 imply TPL_LIBGENERIC_SUPPORT
Simon Glass2a736062021-08-08 12:20:12 -0600293 imply TPL_SERIAL
Simon Glass98987902019-04-25 21:58:45 -0600294 imply TPL_OF_CONTROL
295 imply TPL_TIMER
296 imply TPL_REGMAP
297 imply TPL_SYSCON
298
Chris Zankelc978b522016-08-10 18:36:44 +0300299config XTENSA
300 bool "Xtensa architecture"
301 select CREATE_ARCH_SYMLINK
302 select SUPPORT_OF_CONTROL
303
Masahiro Yamada51631252014-07-30 14:08:15 +0900304endchoice
305
Masahiro Yamada3174e4e2014-09-14 03:01:48 +0900306config SYS_ARCH
307 string
308 help
309 This option should contain the architecture name to build the
310 appropriate arch/<CONFIG_SYS_ARCH> directory.
311 All the architectures should specify this option correctly.
312
313config SYS_CPU
314 string
315 help
316 This option should contain the CPU name to build the correct
317 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
318
319 This is optional. For those targets without the CPU directory,
320 leave this option empty.
321
322config SYS_SOC
323 string
324 help
325 This option should contain the SoC name to build the directory
326 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
327
328 This is optional. For those targets without the SoC directory,
329 leave this option empty.
330
331config SYS_VENDOR
332 string
333 help
334 This option should contain the vendor name of the target board.
335 If it is set and
336 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
337 directory is compiled.
338 If CONFIG_SYS_BOARD is also set, the sources under
339 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
340
341 This is optional. For those targets without the vendor directory,
342 leave this option empty.
343
344config SYS_BOARD
345 string
346 help
347 This option should contain the name of the target board.
348 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
349 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
350 whether CONFIG_SYS_VENDOR is set or not.
351
352 This is optional. For those targets without the board directory,
353 leave this option empty.
354
355config SYS_CONFIG_NAME
356 string
357 help
358 This option should contain the base name of board header file.
359 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
360 should be included from include/config.h.
361
Vignesh Raghavendraadd49672019-04-22 21:43:32 +0530362config SYS_DISABLE_DCACHE_OPS
363 bool
364 help
365 This option disables dcache flush and dcache invalidation
366 operations. For example, on coherent systems where cache
367 operatios are not required, enable this option to avoid them.
368 Note that, its up to the individual architectures to implement
369 this functionality.
370
Tom Rinibe7dbb62021-12-12 22:12:30 -0500371config SYS_IMMR
Tom Rinidd2986a2022-03-30 09:30:15 -0400372 hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
Tom Rinibe7dbb62021-12-12 22:12:30 -0500373 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
374 default 0xFF000000 if MPC8xx
375 default 0xF0000000 if ARCH_MPC8313
376 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
377 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Pali Rohár39f42fe2022-05-02 18:29:25 +0200378 default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
379 ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
380 ARCH_P2020
Tom Rinibe7dbb62021-12-12 22:12:30 -0500381 default SYS_CCSRBAR_DEFAULT
382 help
383 Address for the Internal Memory-Mapped Registers (IMMR) window used
384 to configure the features of many Freescale / NXP SoCs.
385
Tom Rinia2ac2b92021-08-27 21:18:30 -0400386config SKIP_LOWLEVEL_INIT
387 bool "Skip the calls to certain low level initialization functions"
Tom Rini11232132022-04-06 09:21:25 -0400388 depends on ARM || MIPS || RISCV
Tom Rinia2ac2b92021-08-27 21:18:30 -0400389 help
390 If enabled, then certain low level initializations (like setting up
391 the memory controller) are omitted and/or U-Boot does not relocate
392 itself into RAM.
393 Normally this variable MUST NOT be defined. The only exception is
394 when U-Boot is loaded (to RAM) by some other boot loader or by a
395 debugger which performs these initializations itself.
396
397config SPL_SKIP_LOWLEVEL_INIT
398 bool "Skip the calls to certain low level initialization functions"
Tom Rini11232132022-04-06 09:21:25 -0400399 depends on SPL && (ARM || MIPS || RISCV)
Tom Rinia2ac2b92021-08-27 21:18:30 -0400400 help
401 If enabled, then certain low level initializations (like setting up
402 the memory controller) are omitted and/or U-Boot does not relocate
403 itself into RAM.
404 Normally this variable MUST NOT be defined. The only exception is
405 when U-Boot is loaded (to RAM) by some other boot loader or by a
406 debugger which performs these initializations itself.
407
408config TPL_SKIP_LOWLEVEL_INIT
409 bool "Skip the calls to certain low level initialization functions"
410 depends on SPL && ARM
411 help
412 If enabled, then certain low level initializations (like setting up
413 the memory controller) are omitted and/or U-Boot does not relocate
414 itself into RAM.
415 Normally this variable MUST NOT be defined. The only exception is
416 when U-Boot is loaded (to RAM) by some other boot loader or by a
417 debugger which performs these initializations itself.
418
419config SKIP_LOWLEVEL_INIT_ONLY
420 bool "Skip the call to lowlevel_init during early boot ONLY"
421 depends on ARM
422 help
423 This allows just the call to lowlevel_init() to be skipped. The
424 normal CP15 init (such as enabling the instruction cache) is still
425 performed.
426
427config SPL_SKIP_LOWLEVEL_INIT_ONLY
428 bool "Skip the call to lowlevel_init during early boot ONLY"
429 depends on SPL && ARM
430 help
431 This allows just the call to lowlevel_init() to be skipped. The
432 normal CP15 init (such as enabling the instruction cache) is still
433 performed.
434
435config TPL_SKIP_LOWLEVEL_INIT_ONLY
436 bool "Skip the call to lowlevel_init during early boot ONLY"
437 depends on TPL && ARM
438 help
439 This allows just the call to lowlevel_init() to be skipped. The
440 normal CP15 init (such as enabling the instruction cache) is still
441 performed.
442
Masahiro Yamada51631252014-07-30 14:08:15 +0900443source "arch/arc/Kconfig"
444source "arch/arm/Kconfig"
Masahiro Yamada51631252014-07-30 14:08:15 +0900445source "arch/m68k/Kconfig"
446source "arch/microblaze/Kconfig"
447source "arch/mips/Kconfig"
Masahiro Yamada51631252014-07-30 14:08:15 +0900448source "arch/nios2/Kconfig"
Masahiro Yamada51631252014-07-30 14:08:15 +0900449source "arch/powerpc/Kconfig"
450source "arch/sandbox/Kconfig"
451source "arch/sh/Kconfig"
Masahiro Yamada51631252014-07-30 14:08:15 +0900452source "arch/x86/Kconfig"
Chris Zankelc978b522016-08-10 18:36:44 +0300453source "arch/xtensa/Kconfig"
Rick Chen068feb92017-12-26 13:55:58 +0800454source "arch/riscv/Kconfig"
Tom Rinic6c0e562022-03-23 17:19:55 -0400455
Tom Rinid622b082022-06-16 14:04:36 -0400456if ARM || M68K || PPC
457
458source "arch/Kconfig.nxp"
459
460endif
461
Tom Rinic6c0e562022-03-23 17:19:55 -0400462source "board/keymile/Kconfig"
Michal Simek89e81e62022-06-24 14:14:59 +0200463
Michal Simek10fd6d62022-06-24 14:14:59 +0200464if MIPS || MICROBLAZE
Michal Simek89e81e62022-06-24 14:14:59 +0200465
466choice
467 prompt "Endianness selection"
468 help
469 Some MIPS boards can be configured for either little or big endian
470 byte order. These modes require different U-Boot images. In general there
471 is one preferred byteorder for a particular system but some systems are
472 just as commonly used in the one or the other endianness.
473
474config SYS_BIG_ENDIAN
475 bool "Big endian"
Michal Simek10fd6d62022-06-24 14:14:59 +0200476 depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE
Michal Simek89e81e62022-06-24 14:14:59 +0200477
478config SYS_LITTLE_ENDIAN
479 bool "Little endian"
Michal Simek10fd6d62022-06-24 14:14:59 +0200480 depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE
Michal Simek89e81e62022-06-24 14:14:59 +0200481
482endchoice
483
484endif