blob: 154b0a0ceb18e1f4a684ac660d8bed92fd7044a2 [file] [log] [blame]
Tom Rini57cd6812015-07-31 19:55:12 -04001/*
Lokesh Vutla7aa1a402016-11-23 13:25:29 +05302 * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
Tom Rini57cd6812015-07-31 19:55:12 -04003 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
Lokesh Vutla7aa1a402016-11-23 13:25:29 +05308#include "dra72-evm-common.dtsi"
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +05309#include "dra72x-mmc-iodelay.dtsi"
Tom Rini57cd6812015-07-31 19:55:12 -040010/ {
11 model = "TI DRA722";
Tom Rini57cd6812015-07-31 19:55:12 -040012
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053013 memory@0 {
Tom Rini57cd6812015-07-31 19:55:12 -040014 device_type = "memory";
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053015 reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */
Tom Rini57cd6812015-07-31 19:55:12 -040016 };
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +053017
18 evm_1v8_sw: fixedregulator-evm_1v8 {
19 compatible = "regulator-fixed";
20 regulator-name = "evm_1v8";
21 regulator-min-microvolt = <1800000>;
22 regulator-max-microvolt = <1800000>;
23 vin-supply = <&smps4_reg>;
24 regulator-always-on;
25 regulator-boot-on;
26 };
Tom Rini57cd6812015-07-31 19:55:12 -040027};
28
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053029&i2c1 {
30 tps65917: tps65917@58 {
31 reg = <0x58>;
Tom Rini57cd6812015-07-31 19:55:12 -040032
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053033 interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
34 };
Tom Rini57cd6812015-07-31 19:55:12 -040035};
36
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053037#include "dra72-evm-tps65917.dtsi"
Tom Rini57cd6812015-07-31 19:55:12 -040038
39&hdmi {
Tom Rini57cd6812015-07-31 19:55:12 -040040 vdda-supply = <&ldo3_reg>;
Mugunthan V Ne8131382016-09-27 13:01:41 +053041};
Tom Rini57cd6812015-07-31 19:55:12 -040042
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053043&pcf_gpio_21 {
44 interrupt-parent = <&gpio6>;
45 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
46};
47
Mugunthan V Ne8131382016-09-27 13:01:41 +053048&mac {
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053049 slaves = <1>;
50 mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
51};
52
53&cpsw_emac0 {
Grygorii Strashko68d875d2019-08-31 10:30:32 +030054 phy-handle = <&ethphy0>;
Lokesh Vutla7aa1a402016-11-23 13:25:29 +053055 phy-mode = "rgmii";
Tom Rini57cd6812015-07-31 19:55:12 -040056};
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +053057
Grygorii Strashko68d875d2019-08-31 10:30:32 +030058&davinci_mdio {
59 ethphy0: ethernet-phy@3 {
60 reg = <3>;
61 };
62};
63
Lokesh Vutla4ddaa6c2017-08-21 12:50:59 +053064&mmc1 {
65 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
66 pinctrl-0 = <&mmc1_pins_default>;
67 pinctrl-1 = <&mmc1_pins_hs>;
68 pinctrl-2 = <&mmc1_pins_sdr12>;
69 pinctrl-3 = <&mmc1_pins_sdr25>;
70 pinctrl-4 = <&mmc1_pins_sdr50>;
71 pinctrl-5 = <&mmc1_pins_ddr50_rev10>;
72 pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev10_conf>;
73 vqmmc-supply = <&ldo1_reg>;
74};
75
76&mmc2 {
77 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
78 pinctrl-0 = <&mmc2_pins_default>;
79 pinctrl-1 = <&mmc2_pins_hs>;
80 pinctrl-2 = <&mmc2_pins_ddr_rev10>;
81 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev10_conf>;
82 vmmc-supply = <&evm_1v8_sw>;
83};