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Daniel Hellstrom823edd82008-03-28 10:06:52 +01001/* Configuration header file for LEON3 GRSIM, trying to be similar
2 * to Gaisler's GR-XC3S-1500 board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom823edd82008-03-28 10:06:52 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
Francois Retief4c547752015-10-28 16:49:02 +020016#define CONFIG_DISPLAY_BOARDINFO
Francois Retiefa62bba12015-10-29 00:02:48 +020017
Daniel Hellstrom823edd82008-03-28 10:06:52 +010018/*
19 * High Level Configuration Options
20 * (easy to change)
21 *
22 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
23 *
Francois Retiefb6b280c2014-11-04 16:51:44 +020024 * TSIM command:
25 * $ tsim-leon3 -sdram 32768 -ram 4096 -rom 2048 -mmu -cas
Daniel Hellstrom823edd82008-03-28 10:06:52 +010026 *
Francois Retiefb6b280c2014-11-04 16:51:44 +020027 * In the evaluation version of TSIM, the -sdram/-ram/-rom arguments are
28 * hard-coded to these values and need not be specified. (see below)
29 *
30 * Get TSIM from http://www.gaisler.com/index.php/downloads/simulators
Daniel Hellstrom823edd82008-03-28 10:06:52 +010031 */
32
Daniel Hellstrom823edd82008-03-28 10:06:52 +010033#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
34#define CONFIG_TSIM 1 /* ... running on TSIM */
35
36/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020037#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010038
Daniel Hellstrom823edd82008-03-28 10:06:52 +010039/*
40 * Serial console configuration
41 */
42#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020043#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom823edd82008-03-28 10:06:52 +010044
45/* Partitions */
46#define CONFIG_DOS_PARTITION
47#define CONFIG_MAC_PARTITION
48#define CONFIG_ISO_PARTITION
49
50/*
51 * Supported commands
52 */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010053#define CONFIG_CMD_DIAG
Siva Durga Prasad Paladugu64e809a2014-03-14 16:35:38 +053054#define CONFIG_CMD_FPGA_LOADMK
Daniel Hellstrom823edd82008-03-28 10:06:52 +010055#define CONFIG_CMD_IRQ
Daniel Hellstrom823edd82008-03-28 10:06:52 +010056#define CONFIG_CMD_REGINFO
Daniel Hellstrom823edd82008-03-28 10:06:52 +010057
58/*
59 * Autobooting
60 */
Daniel Hellstrom823edd82008-03-28 10:06:52 +010061
62#define CONFIG_PREBOOT "echo;" \
63 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
64 "echo"
65
66#undef CONFIG_BOOTARGS
Daniel Hellstrom823edd82008-03-28 10:06:52 +010067
68#define CONFIG_EXTRA_ENV_SETTINGS \
69 "netdev=eth0\0" \
70 "nfsargs=setenv bootargs root=/dev/nfs rw " \
71 "nfsroot=${serverip}:${rootpath}\0" \
72 "ramargs=setenv bootargs root=/dev/ram rw\0" \
73 "addip=setenv bootargs ${bootargs} " \
74 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
75 ":${hostname}:${netdev}:off panic=1\0" \
76 "flash_nfs=run nfsargs addip;" \
77 "bootm ${kernel_addr}\0" \
78 "flash_self=run ramargs addip;" \
79 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
80 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
81 "rootpath=/export/roofs\0" \
82 "scratch=40000000\0" \
Mike Frysinger3a2b9f22011-10-12 19:47:51 +000083 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom823edd82008-03-28 10:06:52 +010084 "bootargs=console=ttyS0,38400" \
85 ""
86#define CONFIG_NETMASK 255.255.255.0
87#define CONFIG_GATEWAYIP 192.168.0.1
88#define CONFIG_SERVERIP 192.168.0.81
89#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger8b3637c2011-10-13 13:03:47 +000090#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom823edd82008-03-28 10:06:52 +010091#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergerb3f44c22011-10-13 13:03:48 +000092#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom823edd82008-03-28 10:06:52 +010093
94#define CONFIG_BOOTCOMMAND "run flash_self"
95
96/* Memory MAP
97 *
98 * Flash:
99 * |--------------------------------|
100 * | 0x00000000 Text & Data & BSS | *
101 * | for Monitor | *
102 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
103 * | UNUSED / Growth | * 256kb
104 * |--------------------------------|
105 * | 0x00050000 Base custom area | *
106 * | kernel / FS | *
107 * | | * Rest of Flash
108 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
109 * | END-0x00008000 Environment | * 32kb
110 * |--------------------------------|
111 *
112 *
113 *
114 * Main Memory:
115 * |--------------------------------|
116 * | UNUSED / scratch area |
117 * | |
118 * | |
119 * | |
120 * | |
121 * |--------------------------------|
122 * | Monitor .Text / .DATA / .BSS | * 256kb
123 * | Relocated! | *
124 * |--------------------------------|
125 * | Monitor Malloc | * 128kb (contains relocated environment)
126 * |--------------------------------|
127 * | Monitor/kernel STACK | * 64kb
128 * |--------------------------------|
129 * | Page Table for MMU systems | * 2k
130 * |--------------------------------|
131 * | PROM Code accessed from Linux | * 6kb-128b
132 * |--------------------------------|
133 * | Global data (avail from kernel)| * 128b
134 * |--------------------------------|
135 *
136 */
137
138/*
139 * Flash configuration (8,16 or 32 MB)
140 * TEXT base always at 0xFFF00000
141 * ENV_ADDR always at 0xFFF40000
142 * FLASH_BASE at 0xFC000000 for 64 MB
143 * 0xFE000000 for 32 MB
144 * 0xFF000000 for 16 MB
145 * 0xFF800000 for 8 MB
146 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147#define CONFIG_SYS_NO_FLASH 1
148#define CONFIG_SYS_FLASH_BASE 0x00000000
149#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200150#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100151
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100153
154#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
156#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100157
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
159#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
160#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
161#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100162
163#ifdef ENABLE_FLASH_SUPPORT
164/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100166
167#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
168
169/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200171#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100173#endif
174
175/*
176 * Environment settings
177 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200178#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200179/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200180/*#define CONFIG_ENV_SIZE 0x8000*/
181#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100182#define CONFIG_ENV_OVERWRITE 1
183
184/*
185 * Memory map
186 */
Francois Retiefb6b280c2014-11-04 16:51:44 +0200187#define CONFIG_SYS_SDRAM_BASE 0x60000000
188#define CONFIG_SYS_SDRAM_SIZE 0x02000000 /* 32MiB SDRAM */
189#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100190
Francois Retiefb6b280c2014-11-04 16:51:44 +0200191#define CONFIG_SYS_SRAM_BASE 0x40000000
192#define CONFIG_SYS_SRAM_SIZE 0x00400000 /* 4MiB SRAM */
193#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100194
195/* Always Run U-Boot from SDRAM */
Francois Retiefb6b280c2014-11-04 16:51:44 +0200196#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
197#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
198#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100199
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200200#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100201
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200202#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100204
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200205#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
206#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100207
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200208#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200209#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
210# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100211#endif
212
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200213#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
214#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
215#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100216
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200217#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
218#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100219
220/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200221#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
222#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100223
224/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200225#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100226
Francois Retiefb6b280c2014-11-04 16:51:44 +0200227#ifdef CONFIG_CMD_NET
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100228/*
229 * Ethernet configuration
230 */
231#define CONFIG_GRETH 1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100232
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100233/*
234 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
235 */
236/* #define CONFIG_GRETH_10MBIT 1 */
237#define CONFIG_PHY_ADDR 0x00
238
Francois Retiefb6b280c2014-11-04 16:51:44 +0200239#endif /* CONFIG_CMD_NET */
240
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100241/*
242 * Miscellaneous configurable options
243 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200244#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100245#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200246#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100247#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100249#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200250#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
251#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
252#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100253
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200254#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
255#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100256
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200257#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100258
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100259/***** Gaisler GRLIB IP-Cores Config ********/
260
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200261#define CONFIG_SYS_GRLIB_SDRAM 0
Francois Retiefb6b280c2014-11-04 16:51:44 +0200262
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200263#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100264
265/* No SDRAM Configuration */
266#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
267
268/* LEON2 MCTRL configuration */
269#define CONFIG_SYS_GRLIB_ESA_MCTRL1
270#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x000000ff | (1<<11))
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100271#if CONFIG_GRSIM
272/* GRSIM configuration */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100273#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100274#else
275/* TSIM configuration */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100276#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x81805220
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100277#endif
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100278#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100279
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100280/* GRLIB FT-MCTRL configuration */
281#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
282#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x000000ff | (1<<11))
283#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
284#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00136000
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100285
286/* no DDR controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100287#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100288
289/* no DDR2 Controller */
Daniel Hellstromcff009e2010-01-25 09:56:08 +0100290#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100291
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100292/* default kernel command line */
293#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
294
Francois Retief4c547752015-10-28 16:49:02 +0200295#define CONFIG_IDENT_STRING " Gaisler GRSIM"
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100296
Francois Retiefb6b280c2014-11-04 16:51:44 +0200297/* TSIM command:
298 * $ ./tsim-leon3 -mmu -cas
299 *
300 * This TSIM evaluation version will expire 2015-04-02
301 *
302 *
303 * TSIM/LEON3 SPARC simulator, version 2.0.35 (evaluation version)
304 *
305 * Copyright (C) 2014, Aeroflex Gaisler - all rights reserved.
306 * This software may only be used with a valid license.
307 * For latest updates, go to http://www.gaisler.com/
308 * Comments or bug-reports to support@gaisler.com
309 *
310 * serial port A on stdin/stdout
311 * allocated 4096 K SRAM memory, in 1 bank
312 * allocated 32 M SDRAM memory, in 1 bank
313 * allocated 2048 K ROM memory
314 * icache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
315 * dcache: 1 * 4 kbytes, 16 bytes/line (4 kbytes total)
316 * tsim> leon
317 * 0x80000000 Memory configuration register 1 0x000002ff
318 * 0x80000004 Memory configuration register 2 0x81805220
319 * 0x80000008 Memory configuration register 3 0x00000000
320 */
321
Daniel Hellstrom823edd82008-03-28 10:06:52 +0100322#endif /* __CONFIG_H */