blob: 902612da912d88f23d32e65da8a8af5743dc0ca5 [file] [log] [blame]
Jagan Teki337fcdc2018-12-31 15:35:01 +05301// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2018 Amarula Solutions.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 */
6
7#include <common.h>
8#include <clk-uclass.h>
9#include <dm.h>
10#include <errno.h>
11#include <asm/arch/ccu.h>
12#include <dt-bindings/clock/sun50i-h6-ccu.h>
13#include <dt-bindings/reset/sun50i-h6-ccu.h>
14
15static struct ccu_clk_gate h6_gates[] = {
Andre Przywarabb3e5aa2019-01-29 15:54:09 +000016 [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)),
17 [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)),
18 [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)),
Jagan Teki337fcdc2018-12-31 15:35:01 +053019 [CLK_BUS_UART0] = GATE(0x90c, BIT(0)),
20 [CLK_BUS_UART1] = GATE(0x90c, BIT(1)),
21 [CLK_BUS_UART2] = GATE(0x90c, BIT(2)),
22 [CLK_BUS_UART3] = GATE(0x90c, BIT(3)),
23};
24
25static struct ccu_reset h6_resets[] = {
Andre Przywarabb3e5aa2019-01-29 15:54:09 +000026 [RST_BUS_MMC0] = RESET(0x84c, BIT(16)),
27 [RST_BUS_MMC1] = RESET(0x84c, BIT(17)),
28 [RST_BUS_MMC2] = RESET(0x84c, BIT(18)),
Jagan Teki337fcdc2018-12-31 15:35:01 +053029 [RST_BUS_UART0] = RESET(0x90c, BIT(16)),
30 [RST_BUS_UART1] = RESET(0x90c, BIT(17)),
31 [RST_BUS_UART2] = RESET(0x90c, BIT(18)),
32 [RST_BUS_UART3] = RESET(0x90c, BIT(19)),
33};
34
35static const struct ccu_desc h6_ccu_desc = {
36 .gates = h6_gates,
37 .resets = h6_resets,
38};
39
40static int h6_clk_bind(struct udevice *dev)
41{
42 return sunxi_reset_bind(dev, ARRAY_SIZE(h6_resets));
43}
44
45static const struct udevice_id h6_ccu_ids[] = {
46 { .compatible = "allwinner,sun50i-h6-ccu",
47 .data = (ulong)&h6_ccu_desc },
48 { }
49};
50
51U_BOOT_DRIVER(clk_sun50i_h6) = {
52 .name = "sun50i_h6_ccu",
53 .id = UCLASS_CLK,
54 .of_match = h6_ccu_ids,
55 .priv_auto_alloc_size = sizeof(struct ccu_priv),
56 .ops = &sunxi_clk_ops,
57 .probe = sunxi_clk_probe,
58 .bind = h6_clk_bind,
59};