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wdenk531716e2003-09-13 19:01:12 +00001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
Wolfgang Denkd87080b2006-03-31 18:32:53 +020026DECLARE_GLOBAL_DATA_PTR;
27
wdenk531716e2003-09-13 19:01:12 +000028#ifdef CONFIG_HARD_I2C
29
30#include <mpc5xxx.h>
31#include <i2c.h>
32
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020033#if (CONFIG_SYS_I2C_MODULE == 2)
wdenk531716e2003-09-13 19:01:12 +000034#define I2C_BASE MPC5XXX_I2C2
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020035#elif (CONFIG_SYS_I2C_MODULE == 1)
wdenk531716e2003-09-13 19:01:12 +000036#define I2C_BASE MPC5XXX_I2C1
dzuab209d52003-09-30 14:08:43 +000037#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020038#error CONFIG_SYS_I2C_MODULE is not properly configured
wdenk531716e2003-09-13 19:01:12 +000039#endif
40
Jon Smirl3c853f32009-04-04 17:44:51 -040041#define I2C_TIMEOUT 6667
wdenk531716e2003-09-13 19:01:12 +000042#define I2C_RETRIES 3
43
dzuab209d52003-09-30 14:08:43 +000044struct mpc5xxx_i2c_tap {
45 int scl2tap;
46 int tap2tap;
47};
48
wdenk531716e2003-09-13 19:01:12 +000049static int mpc_reg_in (volatile u32 *reg);
50static void mpc_reg_out (volatile u32 *reg, int val, int mask);
51static int wait_for_bb (void);
52static int wait_for_pin (int *status);
53static int do_address (uchar chip, char rdwr_flag);
54static int send_bytes (uchar chip, char *buf, int len);
55static int receive_bytes (uchar chip, char *buf, int len);
dzuab209d52003-09-30 14:08:43 +000056static int mpc_get_fdr (int);
wdenk531716e2003-09-13 19:01:12 +000057
58static int mpc_reg_in(volatile u32 *reg)
59{
Wolfgang Denk77ddac92005-10-13 16:45:02 +020060 int ret = *reg >> 24;
wdenk531716e2003-09-13 19:01:12 +000061 __asm__ __volatile__ ("eieio");
Wolfgang Denk77ddac92005-10-13 16:45:02 +020062 return ret;
wdenk531716e2003-09-13 19:01:12 +000063}
64
65static void mpc_reg_out(volatile u32 *reg, int val, int mask)
66{
67 int tmp;
68
69 if (!mask) {
70 *reg = val << 24;
71 } else {
72 tmp = mpc_reg_in(reg);
73 *reg = ((tmp & ~mask) | (val & mask)) << 24;
74 }
75 __asm__ __volatile__ ("eieio");
76
77 return;
78}
79
80static int wait_for_bb(void)
81{
82 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
83 int timeout = I2C_TIMEOUT;
84 int status;
85
86 status = mpc_reg_in(&regs->msr);
87
88 while (timeout-- && (status & I2C_BB)) {
89#if 1
90 volatile int temp;
91 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
92 temp = mpc_reg_in(&regs->mdr);
93 mpc_reg_out(&regs->mcr, 0, I2C_STA);
94 mpc_reg_out(&regs->mcr, 0, 0);
95 mpc_reg_out(&regs->mcr, I2C_EN, 0);
96#endif
Jon Smirl3c853f32009-04-04 17:44:51 -040097 udelay(15);
wdenk531716e2003-09-13 19:01:12 +000098 status = mpc_reg_in(&regs->msr);
99 }
100
101 return (status & I2C_BB);
102}
103
104static int wait_for_pin(int *status)
105{
106 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
107 int timeout = I2C_TIMEOUT;
108
109 *status = mpc_reg_in(&regs->msr);
110
111 while (timeout-- && !(*status & I2C_IF)) {
Jon Smirl3c853f32009-04-04 17:44:51 -0400112 udelay(15);
wdenk531716e2003-09-13 19:01:12 +0000113 *status = mpc_reg_in(&regs->msr);
114 }
115
116 if (!(*status & I2C_IF)) {
117 return -1;
118 }
119
120 mpc_reg_out(&regs->msr, 0, I2C_IF);
121
122 return 0;
123}
124
125static int do_address(uchar chip, char rdwr_flag)
126{
127 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
128 int status;
129
130 chip <<= 1;
131
132 if (rdwr_flag) {
133 chip |= 1;
134 }
135
136 mpc_reg_out(&regs->mcr, I2C_TX, I2C_TX);
137 mpc_reg_out(&regs->mdr, chip, 0);
138
wdenk42d1f032003-10-15 23:53:47 +0000139 if (wait_for_pin(&status)) {
140 return -2;
141 }
wdenk531716e2003-09-13 19:01:12 +0000142
wdenk42d1f032003-10-15 23:53:47 +0000143 if (status & I2C_RXAK) {
144 return -3;
145 }
wdenk531716e2003-09-13 19:01:12 +0000146
147 return 0;
148}
149
150static int send_bytes(uchar chip, char *buf, int len)
151{
152 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
153 int wrcount;
154 int status;
155
156 for (wrcount = 0; wrcount < len; ++wrcount) {
157
158 mpc_reg_out(&regs->mdr, buf[wrcount], 0);
159
160 if (wait_for_pin(&status)) {
161 break;
162 }
163
164 if (status & I2C_RXAK) {
165 break;
166 }
167
168 }
169
170 return !(wrcount == len);
171}
172
173static int receive_bytes(uchar chip, char *buf, int len)
174{
175 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
176 int dummy = 1;
177 int rdcount = 0;
178 int status;
179 int i;
180
181 mpc_reg_out(&regs->mcr, 0, I2C_TX);
182
183 for (i = 0; i < len; ++i) {
184 buf[rdcount] = mpc_reg_in(&regs->mdr);
185
186 if (dummy) {
187 dummy = 0;
188 } else {
189 rdcount++;
190 }
191
192
193 if (wait_for_pin(&status)) {
194 return -4;
195 }
196 }
197
198 mpc_reg_out(&regs->mcr, I2C_TXAK, I2C_TXAK);
199 buf[rdcount++] = mpc_reg_in(&regs->mdr);
200
201 if (wait_for_pin(&status)) {
202 return -5;
203 }
204
205 mpc_reg_out(&regs->mcr, 0, I2C_TXAK);
206
207 return 0;
208}
209
Eric Millbrandt5da71ef2009-09-03 08:09:44 -0500210#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
211
212#define FDR510(x) (u8) (((x & 0x20) >> 3) | (x & 0x3))
213#define FDR432(x) (u8) ((x & 0x1C) >> 2)
214/*
215 * Reset any i2c devices that may have been interrupted during a system reset.
216 * Normally this would be accomplished by clocking the line until SCL and SDA
217 * are released and then sending a start condtiion (From an Atmel datasheet).
218 * There is no direct access to the i2c pins so instead create start commands
219 * through the i2c interface. Send a start command then delay for the SDA Hold
220 * time, repeat this by disabling/enabling the bus a total of 9 times.
221 */
222static void send_reset(void)
223{
224 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
225 int i;
226 u32 delay;
227 u8 fdr;
228 int SDA_Tap[] = { 3, 3, 4, 4, 1, 1, 2, 2};
229 struct mpc5xxx_i2c_tap scltap[] = {
230 {4, 1},
231 {4, 2},
232 {6, 4},
233 {6, 8},
234 {14, 16},
235 {30, 32},
236 {62, 64},
237 {126, 128}
238 };
239
240 fdr = (u8)mpc_reg_in(&regs->mfdr);
241
242 delay = scltap[FDR432(fdr)].scl2tap + ((SDA_Tap[FDR510(fdr)] - 1) * \
243 scltap[FDR432(fdr)].tap2tap) + 3;
244
245 for (i = 0; i < 9; i++) {
246 mpc_reg_out(&regs->mcr, I2C_EN|I2C_STA|I2C_TX, I2C_INIT_MASK);
247 udelay(delay);
248 mpc_reg_out(&regs->mcr, 0, I2C_INIT_MASK);
249 udelay(delay);
250 }
251
252 mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
253}
254#endif /* CONFIG_SYS_I2c_INIT_MPC5XXX */
255
wdenk531716e2003-09-13 19:01:12 +0000256/**************** I2C API ****************/
257
258void i2c_init(int speed, int saddr)
259{
260 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
261
262 mpc_reg_out(&regs->mcr, 0, 0);
263 mpc_reg_out(&regs->madr, saddr << 1, 0);
264
265 /* Set clock
266 */
dzuab209d52003-09-30 14:08:43 +0000267 mpc_reg_out(&regs->mfdr, mpc_get_fdr(speed), 0);
wdenk531716e2003-09-13 19:01:12 +0000268
269 /* Enable module
270 */
271 mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
272 mpc_reg_out(&regs->msr, 0, I2C_IF);
273
Eric Millbrandt5da71ef2009-09-03 08:09:44 -0500274#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
275 send_reset();
276#endif
wdenk531716e2003-09-13 19:01:12 +0000277 return;
278}
279
dzuab209d52003-09-30 14:08:43 +0000280static int mpc_get_fdr(int speed)
281{
dzuab209d52003-09-30 14:08:43 +0000282 static int fdr = -1;
dzuab209d52003-09-30 14:08:43 +0000283
284 if (fdr == -1) {
wdenk5cf9da42003-11-07 13:42:26 +0000285 ulong best_speed = 0;
286 ulong divider;
dzuab209d52003-09-30 14:08:43 +0000287 ulong ipb, scl;
288 ulong bestmatch = 0xffffffffUL;
289 int best_i = 0, best_j = 0, i, j;
290 int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
291 struct mpc5xxx_i2c_tap scltap[] = {
292 {4, 1},
293 {4, 2},
294 {6, 4},
295 {6, 8},
296 {14, 16},
297 {30, 32},
298 {62, 64},
299 {126, 128}
300 };
301
302 ipb = gd->ipb_clk;
303 for (i = 7; i >= 0; i--) {
304 for (j = 7; j >= 0; j--) {
wdenk42d1f032003-10-15 23:53:47 +0000305 scl = 2 * (scltap[j].scl2tap +
dzuab209d52003-09-30 14:08:43 +0000306 (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
307 if (ipb <= speed*scl) {
308 if ((speed*scl - ipb) < bestmatch) {
309 bestmatch = speed*scl - ipb;
310 best_i = i;
311 best_j = j;
312 best_speed = ipb/scl;
313 }
314 }
315 }
316 }
wdenk5cf9da42003-11-07 13:42:26 +0000317 divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
318 if (gd->flags & GD_FLG_RELOC) {
319 fdr = divider;
320 } else {
Jon Smirl33e88c52009-03-22 22:55:45 -0400321 if (gd->have_console)
322 printf("%ld kHz, ", best_speed / 1000);
wdenk5cf9da42003-11-07 13:42:26 +0000323 return divider;
324 }
dzuab209d52003-09-30 14:08:43 +0000325 }
326
327 return fdr;
328}
329
wdenk531716e2003-09-13 19:01:12 +0000330int i2c_probe(uchar chip)
331{
332 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
333 int i;
334
335 for (i = 0; i < I2C_RETRIES; i++) {
336 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
337
338 if (! do_address(chip, 0)) {
339 mpc_reg_out(&regs->mcr, 0, I2C_STA);
wdenk697037f2004-06-09 15:29:49 +0000340 udelay(500);
wdenk531716e2003-09-13 19:01:12 +0000341 break;
342 }
343
344 mpc_reg_out(&regs->mcr, 0, I2C_STA);
345 udelay(500);
346 }
347
348 return (i == I2C_RETRIES);
349}
350
351int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
352{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200353 char xaddr[4];
wdenk531716e2003-09-13 19:01:12 +0000354 struct mpc5xxx_i2c * regs = (struct mpc5xxx_i2c *)I2C_BASE;
355 int ret = -1;
356
357 xaddr[0] = (addr >> 24) & 0xFF;
358 xaddr[1] = (addr >> 16) & 0xFF;
359 xaddr[2] = (addr >> 8) & 0xFF;
360 xaddr[3] = addr & 0xFF;
361
362 if (wait_for_bb()) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400363 if (gd->have_console)
364 printf("i2c_read: bus is busy\n");
wdenk531716e2003-09-13 19:01:12 +0000365 goto Done;
366 }
367
368 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
369 if (do_address(chip, 0)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400370 if (gd->have_console)
371 printf("i2c_read: failed to address chip\n");
wdenk531716e2003-09-13 19:01:12 +0000372 goto Done;
373 }
374
375 if (send_bytes(chip, &xaddr[4-alen], alen)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400376 if (gd->have_console)
377 printf("i2c_read: send_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000378 goto Done;
379 }
380
381 mpc_reg_out(&regs->mcr, I2C_RSTA, I2C_RSTA);
382 if (do_address(chip, 1)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400383 if (gd->have_console)
384 printf("i2c_read: failed to address chip\n");
wdenk531716e2003-09-13 19:01:12 +0000385 goto Done;
386 }
387
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200388 if (receive_bytes(chip, (char *)buf, len)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400389 if (gd->have_console)
390 printf("i2c_read: receive_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000391 goto Done;
392 }
393
394 ret = 0;
395Done:
396 mpc_reg_out(&regs->mcr, 0, I2C_STA);
397 return ret;
398}
399
400int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
401{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200402 char xaddr[4];
wdenk531716e2003-09-13 19:01:12 +0000403 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
404 int ret = -1;
405
406 xaddr[0] = (addr >> 24) & 0xFF;
407 xaddr[1] = (addr >> 16) & 0xFF;
408 xaddr[2] = (addr >> 8) & 0xFF;
409 xaddr[3] = addr & 0xFF;
410
wdenk42d1f032003-10-15 23:53:47 +0000411 if (wait_for_bb()) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400412 if (gd->have_console)
413 printf("i2c_write: bus is busy\n");
wdenk531716e2003-09-13 19:01:12 +0000414 goto Done;
415 }
416
wdenk42d1f032003-10-15 23:53:47 +0000417 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
418 if (do_address(chip, 0)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400419 if (gd->have_console)
420 printf("i2c_write: failed to address chip\n");
wdenk531716e2003-09-13 19:01:12 +0000421 goto Done;
422 }
423
424 if (send_bytes(chip, &xaddr[4-alen], alen)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400425 if (gd->have_console)
426 printf("i2c_write: send_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000427 goto Done;
428 }
429
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200430 if (send_bytes(chip, (char *)buf, len)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400431 if (gd->have_console)
432 printf("i2c_write: send_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000433 goto Done;
434 }
435
436 ret = 0;
437Done:
438 mpc_reg_out(&regs->mcr, 0, I2C_STA);
439 return ret;
440}
441
wdenk531716e2003-09-13 19:01:12 +0000442#endif /* CONFIG_HARD_I2C */