Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 1 | Overview |
| 2 | -------- |
| 3 | MPC8572DS is a high-performance computing, evaluation and development platform |
| 4 | supporting the mpc8572 PowerTM processor. |
| 5 | |
| 6 | Building U-boot |
| 7 | ----------- |
| 8 | make MPC8572DS_config |
| 9 | make |
| 10 | |
| 11 | Flash Banks |
| 12 | ----------- |
| 13 | MPC8572DS board has two flash banks. They are both present on boot, but their |
| 14 | locations can be swapped using the dip-switch SW9[1:2]. |
| 15 | |
| 16 | Booting is always from the boot bank at 0xec00_0000. |
| 17 | |
| 18 | |
| 19 | Memory Map |
| 20 | ---------- |
| 21 | |
Thomas Weber | c46bf09 | 2012-03-24 22:44:01 +0000 | [diff] [blame^] | 22 | 0xe800_0000 - 0xebff_ffff Alternate bank 64MB |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 23 | 0xec00_0000 - 0xefff_ffff Boot bank 64MB |
| 24 | |
| 25 | 0xebf8_0000 - 0xebff_ffff Alternate u-boot address 512KB |
| 26 | 0xeff8_0000 - 0xefff_ffff Boot u-boot address 512KB |
| 27 | |
| 28 | |
| 29 | Flashing Images |
| 30 | --------------- |
| 31 | |
| 32 | To place a new u-boot image in the alternate flash bank and then reset with that |
| 33 | new image temporarily, use this: |
| 34 | |
| 35 | tftp 1000000 u-boot.bin |
| 36 | erase ebf80000 ebffffff |
| 37 | cp.b 1000000 ebf80000 80000 |
| 38 | pixis_reset altbank |
| 39 | |
| 40 | |
| 41 | To program the image in the boot flash bank: |
| 42 | |
| 43 | tftp 1000000 u-boot.bin |
| 44 | protect off all |
| 45 | erase eff80000 ffffffff |
| 46 | cp.b 1000000 eff80000 80000 |
| 47 | |
| 48 | |
| 49 | The pixis_reset command |
| 50 | ----------------------- |
| 51 | The command - "pixis_reset", is introduced to reset mpc8572ds board |
| 52 | using the FPGA sequencer. When the board restarts, it has the option |
| 53 | of using either the current or alternate flash bank as the boot |
| 54 | image, with or without the watchdog timer enabled, and finally with |
| 55 | or without frequency changes. |
| 56 | |
| 57 | Usage is; |
| 58 | |
| 59 | pixis_reset |
| 60 | pixis_reset altbank |
| 61 | pixis_reset altbank wd |
| 62 | pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> |
| 63 | pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio> |
| 64 | |
| 65 | Examples: |
| 66 | |
| 67 | /* reset to current bank, like "reset" command */ |
| 68 | pixis_reset |
| 69 | |
| 70 | /* reset board but use the to alternate flash bank */ |
| 71 | pixis_reset altbank |
| 72 | |
| 73 | |
| 74 | Using the Device Tree Source File |
| 75 | --------------------------------- |
| 76 | To create the DTB (Device Tree Binary) image file, |
| 77 | use a command similar to this: |
| 78 | |
| 79 | dtc -b 0 -f -I dts -O dtb mpc8572ds.dts > mpc8572ds.dtb |
| 80 | |
| 81 | Likely, that .dts file will come from here; |
| 82 | |
| 83 | linux-2.6/arch/powerpc/boot/dts/mpc8572ds.dts |
| 84 | |
| 85 | |
| 86 | Booting Linux |
| 87 | ------------- |
| 88 | |
| 89 | Place a linux uImage in the TFTP disk area. |
| 90 | |
| 91 | tftp 1000000 uImage.8572 |
| 92 | tftp c00000 mpc8572ds.dtb |
| 93 | bootm 1000000 - c00000 |
| 94 | |
| 95 | |
| 96 | Implementing AMP(Asymmetric MultiProcessing) |
| 97 | ------------- |
| 98 | 1. Build kernel image for core0: |
| 99 | |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 100 | a. $ make 85xx/mpc8572_ds_defconfig |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 101 | |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 102 | b. $ make menuconfig |
| 103 | - un-select "Processor support"->"Symetric multi-processing support" |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 104 | |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 105 | c. $ make uImage |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 106 | |
| 107 | d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0 |
| 108 | |
| 109 | 2. Build kernel image for core1: |
| 110 | |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 111 | a. $ make 85xx/mpc8572_ds_defconfig |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 112 | |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 113 | b. $ make menuconfig |
| 114 | - Un-select "Processor support"->"Symetric multi-processing support" |
| 115 | - Select "Advanced setup" -> " Prompt for advanced kernel |
| 116 | configuration options" |
| 117 | - Select "Set physical address where the kernel is loaded" and |
Thomas Weber | c46bf09 | 2012-03-24 22:44:01 +0000 | [diff] [blame^] | 118 | set it to 0x20000000, assuming core1 will start from 512MB. |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 119 | - Select "Set custom page offset address" |
| 120 | - Select "Set custom kernel base address" |
| 121 | - Select "Set maximum low memory" |
| 122 | - "Exit" and save the selection. |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 123 | |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 124 | c. $ make uImage |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 125 | |
| 126 | d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1 |
| 127 | |
| 128 | 3. Create dtb for core0: |
| 129 | |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 130 | $ dtc -I dts -O dtb -f -b 0 arch/powerpc/boot/dts/mpc8572ds_core0.dts > /tftpboot/mpc8572ds_core0.dtb |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 131 | |
| 132 | 4. Create dtb for core1: |
| 133 | |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 134 | $ dtc -I dts -O dtb -f -b 1 arch/powerpc/boot/dts/mpc8572ds_core1.dts > /tftpboot/mpc8572ds_core1.dtb |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 135 | |
| 136 | 5. Bring up two cores separately: |
| 137 | |
Wolfgang Denk | f15c651 | 2009-02-12 00:08:39 +0100 | [diff] [blame] | 138 | a. Power on the board, under u-boot prompt: |
| 139 | => setenv <serverip> |
| 140 | => setenv <ipaddr> |
| 141 | => setenv bootargs root=/dev/ram rw console=ttyS0,115200 |
| 142 | b. Bring up core1's kernel first: |
| 143 | => setenv bootm_low 0x20000000 |
| 144 | => setenv bootm_size 0x10000000 |
| 145 | => tftp 21000000 8572/uImage.core1 |
| 146 | => tftp 22000000 8572/ramdiskfile |
| 147 | => tftp 20c00000 8572/mpc8572ds_core1.dtb |
| 148 | => interrupts off |
| 149 | => bootm start 21000000 22000000 20c00000 |
| 150 | => bootm loados |
| 151 | => bootm ramdisk |
| 152 | => bootm fdt |
| 153 | => fdt boardsetup |
| 154 | => fdt chosen $initrd_start $initrd_end |
| 155 | => bootm prep |
| 156 | => cpu 1 release $bootm_low - $fdtaddr - |
| 157 | c. Bring up core0's kernel(on the same u-boot console): |
| 158 | => setenv bootm_low 0 |
| 159 | => setenv bootm_size 0x20000000 |
| 160 | => tftp 1000000 8572/uImage.core0 |
| 161 | => tftp 2000000 8572/ramdiskfile |
| 162 | => tftp c00000 8572/mpc8572ds_core0.dtb |
| 163 | => bootm 1000000 2000000 c00000 |
Haiying Wang | 30837e5 | 2008-11-11 08:52:09 -0500 | [diff] [blame] | 164 | |
| 165 | Please note only core0 will run u-boot, core1 starts kernel directly after |
| 166 | "cpu release" command is issued. |