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Dirk Eibach89b86192008-12-09 13:12:40 +01001/*
2 * (C) Copyright 2008
3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4 *
5 * Based on include/configs/yosemite.h
6 * (C) Copyright 2005-2007
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02009 * SPDX-License-Identifier: GPL-2.0+
Dirk Eibach89b86192008-12-09 13:12:40 +010010 */
11
12/*
13 * gdppc440etx.h - configuration for G&D 440EP/GR ETX-Module
14 */
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
18/*
19 * High Level Configuration Options
20 */
21#define CONFIG_440GR 1 /* Specific PPC440GR support */
22#define CONFIG_HOSTNAME gdppc440etx
23#define CONFIG_440 1 /* ... PPC440 family */
Dirk Eibach89b86192008-12-09 13:12:40 +010024#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
25
Wolfgang Denk2ae18242010-10-06 09:05:45 +020026#define CONFIG_SYS_TEXT_BASE 0xFFF80000
27
Dirk Eibach89b86192008-12-09 13:12:40 +010028/*
29 * Include common defines/options for all AMCC eval boards
30 */
31#include "amcc-common.h"
32
33#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f*/
34#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
35
36/*
37 * Base addresses -- Note these are effective addresses where the
38 * actual resources get mapped (not physical addresses)
39 */
40#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */
41#define CONFIG_SYS_PCI_MEMBASE 0xa0000000 /* mapped pci memory */
42#define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE + 0x10000000
43#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
44#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
45
46/*Don't change either of these*/
Dirk Eibach89b86192008-12-09 13:12:40 +010047#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs */
48/*Don't change either of these*/
49
50#define CONFIG_SYS_USB_DEVICE 0x50000000
51#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000
52
53/*
54 * Initial RAM & stack pointer (placed in SDRAM)
55 */
56#define CONFIG_SYS_INIT_RAM_DCACHE 1 /* d-cache as init ram*/
57#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* DCache */
Wolfgang Denk553f0982010-10-26 13:32:32 +020058#define CONFIG_SYS_INIT_RAM_SIZE (4 << 10)
Wolfgang Denk553f0982010-10-26 13:32:32 +020059#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE \
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +020060 - GENERATED_GBL_DATA_SIZE)
Dirk Eibach89b86192008-12-09 13:12:40 +010061#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
62
63/*
64 * Serial Port
65 */
Stefan Roese550650d2010-09-20 16:05:31 +020066#define CONFIG_CONS_INDEX 2 /* Use UART1 */
Stefan Roese550650d2010-09-20 16:05:31 +020067#define CONFIG_SYS_NS16550_SERIAL
68#define CONFIG_SYS_NS16550_REG_SIZE 1
69#define CONFIG_SYS_NS16550_CLK get_serial_clock()
Dirk Eibach89b86192008-12-09 13:12:40 +010070#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */
Dirk Eibach89b86192008-12-09 13:12:40 +010071
72/*
73 * Environment
74 * Define here the location of the environment variables (FLASH or EEPROM).
75 * Note: DENX encourages to use redundant environment in FLASH.
76 */
77#define CONFIG_ENV_IS_IN_FLASH 1 /* FLASH for env. vars*/
78
79/*
80 * FLASH related
81 */
82#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible*/
83#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
84#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB!*/
85
86#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
87#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors/chip */
88
89#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout/Flash Erase (in ms)*/
90#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout/Flash Write (in ms)*/
91
92#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1/* use buffered writes (20x faster)*/
93
94#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
95
96#ifdef CONFIG_ENV_IS_IN_FLASH
97#define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector*/
98#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
99#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Env. Sector */
100
101/* Address and size of Redundant Environment Sector */
102#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
103#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
104#endif /* CONFIG_ENV_IS_IN_FLASH */
105
106/*
107 * DDR SDRAM
108 */
109#undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup*/
110#define CONFIG_SYS_KBYTES_SDRAM (128 * 1024) /* 128MB */
111#define CONFIG_SYS_SDRAM_BANKS (2)
112
113#define CONFIG_SDRAM_BANK0
114#define CONFIG_SDRAM_BANK1
115
116#define CONFIG_SYS_SDRAM0_TR0 0x410a4012
117#define CONFIG_SYS_SDRAM0_WDDCTR 0x40000000
118#define CONFIG_SYS_SDRAM0_RTR 0x04080000
119#define CONFIG_SYS_SDRAM0_CFG0 0x80000000
120
121#undef CONFIG_SDRAM_ECC
122
123/*
124 * I2C
125 */
Dirk Eibach880540d2013-04-25 02:40:01 +0000126#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
Dirk Eibach89b86192008-12-09 13:12:40 +0100127
128/*
129 * Default environment variables
130 */
131#define CONFIG_EXTRA_ENV_SETTINGS \
132 CONFIG_AMCC_DEF_ENV \
133 CONFIG_AMCC_DEF_ENV_POWERPC \
134 CONFIG_AMCC_DEF_ENV_NOR_UPD \
135 "kernel_addr=fc000000\0" \
136 "ramdisk_addr=fc180000\0" \
137 ""
138
139#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
140#define CONFIG_PHY_ADDR 1
141#define CONFIG_PHY1_ADDR 3
142
143#ifdef DEBUG
144#define CONFIG_PANIC_HANG
145#endif
146
147/*
148 * Commands additional to the ones defined in amcc-common.h
149 */
150#define CONFIG_CMD_PCI
151#undef CONFIG_CMD_EEPROM
152
153/*
154 * PCI stuff
155 */
156
157/* General PCI */
Gabor Juhos842033e2013-05-30 07:06:12 +0000158#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
Dirk Eibach89b86192008-12-09 13:12:40 +0100159#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup*/
160#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to \
161 CONFIG_SYS_PCI_MEMBASE*/
162
163/* Board-specific PCI */
164#define CONFIG_SYS_PCI_TARGET_INIT
165#define CONFIG_SYS_PCI_MASTER_INIT
166
167#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
168#define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe /* tbd */
169
170/*
171 * External Bus Controller (EBC) Setup
172 */
173#define CONFIG_SYS_FLASH CONFIG_SYS_FLASH_BASE
174
175/* Memory Bank 0 (NOR-FLASH) initialization */
176#define CONFIG_SYS_EBC_PB0AP 0x03017200
177#define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_FLASH | 0xda000)
178
179#endif /* __CONFIG_H */