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SARTRE Leo9b75bad2013-06-03 23:30:36 +00001/*
2 *
3 * Congatec Conga-QEVAl board configuration file.
4 *
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
SARTRE Leo9b75bad2013-06-03 23:30:36 +000011 */
12
13#ifndef __CONFIG_CGTQMX6EVAL_H
14#define __CONFIG_CGTQMX6EVAL_H
15
SARTRE Leo9b75bad2013-06-03 23:30:36 +000016#include "mx6_common.h"
17
SARTRE Leo9b75bad2013-06-03 23:30:36 +000018#define CONFIG_MACH_TYPE 4122
19
Otavio Salvadord7140352015-11-19 19:02:36 -020020#ifdef CONFIG_SPL
Otavio Salvadord7140352015-11-19 19:02:36 -020021#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
22#define CONFIG_SPL_SPI_LOAD
23#include "imx6_spl.h"
24#endif
25
SARTRE Leo9b75bad2013-06-03 23:30:36 +000026/* Size of malloc() pool */
27#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28
SARTRE Leo9b75bad2013-06-03 23:30:36 +000029#define CONFIG_MISC_INIT_R
SARTRE Leo9b75bad2013-06-03 23:30:36 +000030
31#define CONFIG_MXC_UART
32#define CONFIG_MXC_UART_BASE UART2_BASE
33
34/* MMC Configs */
SARTRE Leo9b75bad2013-06-03 23:30:36 +000035#define CONFIG_SYS_FSL_ESDHC_ADDR 0
36
Otavio Salvador71bcdaf2015-11-19 19:02:33 -020037/* SPI NOR */
Otavio Salvador71bcdaf2015-11-19 19:02:33 -020038#define CONFIG_SPI_FLASH
39#define CONFIG_SPI_FLASH_STMICRO
40#define CONFIG_SPI_FLASH_SST
41#define CONFIG_MXC_SPI
42#define CONFIG_SF_DEFAULT_BUS 0
43#define CONFIG_SF_DEFAULT_SPEED 20000000
44#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
45
Otavio Salvador862187b2015-07-23 11:02:27 -030046/* Thermal support */
Adrian Alonso1368f992015-09-02 13:54:13 -050047#define CONFIG_IMX_THERMAL
Otavio Salvador862187b2015-07-23 11:02:27 -030048
Otavio Salvador4c9929d2015-07-23 11:02:28 -030049/* I2C Configs */
Otavio Salvador4c9929d2015-07-23 11:02:28 -030050#define CONFIG_SYS_I2C
51#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020052#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
53#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Otavio Salvador4c9929d2015-07-23 11:02:28 -030054#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
55#define CONFIG_SYS_I2C_SPEED 100000
56
57/* PMIC */
58#define CONFIG_POWER
59#define CONFIG_POWER_I2C
60#define CONFIG_POWER_PFUZE100
61#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
62
Otavio Salvador95246ac2015-07-23 11:02:29 -030063/* USB Configs */
Otavio Salvador95246ac2015-07-23 11:02:29 -030064#define CONFIG_USB_EHCI
65#define CONFIG_USB_EHCI_MX6
Otavio Salvador95246ac2015-07-23 11:02:29 -030066#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
67#define CONFIG_USB_HOST_ETHER
68#define CONFIG_USB_ETHER_ASIX
69#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
70#define CONFIG_MXC_USB_FLAGS 0
71#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
Otavio Salvador95246ac2015-07-23 11:02:29 -030072#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
73
Otavio Salvador3e08e1b2015-09-17 15:13:20 -030074#define CONFIG_USBD_HS
Otavio Salvador3e08e1b2015-09-17 15:13:20 -030075
Otavio Salvador3e08e1b2015-09-17 15:13:20 -030076#define CONFIG_USB_FUNCTION_MASS_STORAGE
Otavio Salvador3e08e1b2015-09-17 15:13:20 -030077
Otavio Salvadoreb76f132015-11-19 19:02:35 -020078#define CONFIG_USB_FUNCTION_FASTBOOT
79#define CONFIG_CMD_FASTBOOT
80#define CONFIG_ANDROID_BOOT_IMAGE
81#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
82#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
83
Otavio Salvador6d551f22015-07-23 11:02:30 -030084/* Framebuffer */
Otavio Salvador6d551f22015-07-23 11:02:30 -030085#define CONFIG_VIDEO_IPUV3
Otavio Salvador6d551f22015-07-23 11:02:30 -030086#define CONFIG_VIDEO_BMP_RLE8
87#define CONFIG_SPLASH_SCREEN
88#define CONFIG_SPLASH_SCREEN_ALIGN
89#define CONFIG_BMP_16BPP
90#define CONFIG_VIDEO_LOGO
91#define CONFIG_VIDEO_BMP_LOGO
92#ifdef CONFIG_MX6DL
93#define CONFIG_IPUV3_CLK 198000000
94#else
95#define CONFIG_IPUV3_CLK 264000000
96#endif
97#define CONFIG_IMX_HDMI
98
Otavio Salvador6731bc82015-07-23 11:02:31 -030099/* SATA */
100#define CONFIG_CMD_SATA
101#define CONFIG_DWC_AHSATA
102#define CONFIG_SYS_SATA_MAX_DEVICE 1
103#define CONFIG_DWC_AHSATA_PORT_ID 0
104#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
105#define CONFIG_LBA48
106#define CONFIG_LIBATA
107
Otavio Salvadorf0222902015-07-28 20:24:41 -0300108/* Ethernet */
Otavio Salvadorf0222902015-07-28 20:24:41 -0300109#define CONFIG_FEC_MXC
110#define CONFIG_MII
111#define IMX_FEC_BASE ENET_BASE_ADDR
112#define CONFIG_FEC_XCV_TYPE RGMII
113#define CONFIG_ETHPRIME "FEC"
114#define CONFIG_FEC_MXC_PHYADDR 6
115#define CONFIG_PHYLIB
116#define CONFIG_PHY_ATHEROS
117
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300118/* Command definition */
119
120#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass12ca05a2016-10-17 20:12:39 -0600121#define CONSOLE_DEV "ttymxc1"
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300122#define CONFIG_MMCROOT "/dev/mmcblk0p2"
123#define CONFIG_SYS_MMC_ENV_DEV 0
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000124
Otavio Salvadord7140352015-11-19 19:02:36 -0200125#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000126#define CONFIG_EXTRA_ENV_SETTINGS \
127 "script=boot.scr\0" \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -0200128 "image=zImage\0" \
Otavio Salvadord7140352015-11-19 19:02:36 -0200129 "fdtfile=undefined\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300130 "fdt_addr_r=0x18000000\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000131 "boot_fdt=try\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300132 "ip_dyn=yes\0" \
Simon Glass12ca05a2016-10-17 20:12:39 -0600133 "console=" CONSOLE_DEV "\0" \
Otavio Salvadore0a352d2015-11-19 19:02:38 -0200134 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
135 "dfu_alt_info_spl=spl raw 0x400\0" \
136 "dfu_alt_info_img=u-boot raw 0x10000\0" \
137 "dfu_alt_info=spl raw 0x400\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300138 "bootm_size=0x10000000\0" \
139 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000140 "mmcpart=1\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300141 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
142 "update_sd_firmware=" \
143 "if test ${ip_dyn} = yes; then " \
144 "setenv get_cmd dhcp; " \
145 "else " \
146 "setenv get_cmd tftp; " \
147 "fi; " \
148 "if mmc dev ${mmcdev}; then " \
149 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
150 "setexpr fw_sz ${filesize} / 0x200; " \
151 "setexpr fw_sz ${fw_sz} + 1; " \
152 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
153 "fi; " \
154 "fi\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000155 "mmcargs=setenv bootargs console=${console},${baudrate} " \
156 "root=${mmcroot}\0" \
157 "loadbootscript=" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300158 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000159 "bootscript=echo Running bootscript from mmc ...; " \
160 "source\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300161 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
162 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000163 "mmcboot=echo Booting from mmc ...; " \
164 "run mmcargs; " \
165 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
166 "if run loadfdt; then " \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300167 "bootz ${loadaddr} - ${fdt_addr_r}; " \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000168 "else " \
169 "if test ${boot_fdt} = try; then " \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -0200170 "bootz; " \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000171 "else " \
172 "echo WARN: Cannot load the DT; " \
173 "fi; " \
174 "fi; " \
175 "else " \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -0200176 "bootz; " \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300177 "fi;\0" \
Otavio Salvadord7140352015-11-19 19:02:36 -0200178 "findfdt="\
179 "if test $board_rev = MX6Q ; then " \
180 "setenv fdtfile imx6q-qmx6.dtb; fi; " \
181 "if test $board_rev = MX6DL ; then " \
182 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
183 "if test $fdtfile = undefined; then " \
184 "echo WARNING: Could not determine dtb to use; fi; \0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300185 "netargs=setenv bootargs console=${console},${baudrate} " \
186 "root=/dev/nfs " \
187 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
188 "netboot=echo Booting from net ...; " \
189 "run netargs; " \
190 "if test ${ip_dyn} = yes; then " \
191 "setenv get_cmd dhcp; " \
192 "else " \
193 "setenv get_cmd tftp; " \
194 "fi; " \
195 "${get_cmd} ${image}; " \
196 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
197 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
198 "bootz ${loadaddr} - ${fdt_addr_r}; " \
199 "else " \
200 "if test ${boot_fdt} = try; then " \
201 "bootz; " \
202 "else " \
203 "echo WARN: Cannot load the DT; " \
204 "fi; " \
205 "fi; " \
206 "else " \
207 "bootz; " \
208 "fi;\0" \
Otavio Salvador71bcdaf2015-11-19 19:02:33 -0200209 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000210
211#define CONFIG_BOOTCOMMAND \
Otavio Salvador71bcdaf2015-11-19 19:02:33 -0200212 "run spilock;" \
Otavio Salvadord7140352015-11-19 19:02:36 -0200213 "run findfdt; " \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300214 "mmc dev ${mmcdev};" \
215 "if mmc rescan; then " \
216 "if run loadbootscript; then " \
217 "run bootscript; " \
218 "else " \
219 "if run loadimage; then " \
220 "run mmcboot; " \
221 "else run netboot; " \
222 "fi; " \
223 "fi; " \
224 "else run netboot; fi"
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000225
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000226#define CONFIG_SYS_MEMTEST_START 0x10000000
227#define CONFIG_SYS_MEMTEST_END 0x10010000
228#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
229
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000230/* Physical Memory Map */
231#define CONFIG_NR_DRAM_BANKS 1
232#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000233
234#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
235#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
236#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
237
238#define CONFIG_SYS_INIT_SP_OFFSET \
239 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
240#define CONFIG_SYS_INIT_SP_ADDR \
241 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
242
Peter Robinson056845c2015-05-22 17:30:45 +0100243/* Environment organization */
Otavio Salvadord5de9102015-11-19 19:02:34 -0200244#if defined (CONFIG_ENV_IS_IN_MMC)
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000245#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
246#define CONFIG_SYS_MMC_ENV_DEV 0
Otavio Salvadord5de9102015-11-19 19:02:34 -0200247#endif
248
249#define CONFIG_ENV_SIZE (8 * 1024)
250
251#define CONFIG_ENV_IS_IN_SPI_FLASH
252#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
253#define CONFIG_ENV_OFFSET (768 * 1024)
254#define CONFIG_ENV_SECT_SIZE (64 * 1024)
255#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
256#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
257#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
258#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
259#endif
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000260
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000261#endif /* __CONFIG_CGTQMX6EVAL_H */