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Kumar Gala44a23cf2008-01-16 22:33:22 -06001/*
Kumar Galaebc73942011-02-03 20:21:42 -06002 * Copyright 2008-2011 Freescale Semiconductor, Inc.
Kumar Gala44a23cf2008-01-16 22:33:22 -06003 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/processor.h>
28#include <asm/mmu.h>
Kumar Galaecf5b982008-12-16 14:59:20 -060029#ifdef CONFIG_ADDR_MAP
30#include <addr_map.h>
31#endif
32
33DECLARE_GLOBAL_DATA_PTR;
Kumar Gala44a23cf2008-01-16 22:33:22 -060034
Kumar Galab2eec282009-09-11 12:32:01 -050035void invalidate_tlb(u8 tlb)
36{
37 if (tlb == 0)
38 mtspr(MMUCSR0, 0x4);
39 if (tlb == 1)
40 mtspr(MMUCSR0, 0x2);
41}
42
43void init_tlbs(void)
44{
45 int i;
46
47 for (i = 0; i < num_tlb_entries; i++) {
48 write_tlb(tlb_table[i].mas0,
49 tlb_table[i].mas1,
50 tlb_table[i].mas2,
51 tlb_table[i].mas3,
52 tlb_table[i].mas7);
53 }
54
55 return ;
56}
57
Kumar Galaebc73942011-02-03 20:21:42 -060058#ifndef CONFIG_NAND_SPL
Becky Bruce4e63df32010-06-17 11:37:21 -050059void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
60 phys_addr_t *rpn)
61{
62 u32 _mas1;
63
64 mtspr(MAS0, FSL_BOOKE_MAS0(1, idx, 0));
65 asm volatile("tlbre;isync");
66 _mas1 = mfspr(MAS1);
67
68 *valid = (_mas1 & MAS1_VALID);
69 *tsize = (_mas1 >> 8) & 0xf;
70 *epn = mfspr(MAS2) & MAS2_EPN;
71 *rpn = mfspr(MAS3) & MAS3_RPN;
72#ifdef CONFIG_ENABLE_36BIT_PHYS
73 *rpn |= ((u64)mfspr(MAS7)) << 32;
74#endif
75}
76
Becky Bruce70e02bc2010-06-17 11:37:22 -050077void print_tlbcam(void)
78{
79 int i;
80 unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
81
82 /* walk all the entries */
83 printf("TLBCAM entries\n");
84 for (i = 0; i < num_cam; i++) {
85 unsigned long epn;
86 u32 tsize, valid;
87 phys_addr_t rpn;
88
89 read_tlbcam_entry(i, &valid, &tsize, &epn, &rpn);
90 printf("entry %02d: V: %d EPN 0x%08x RPN 0x%08llx size:",
91 i, (valid == 0) ? 0 : 1, (unsigned int)epn,
92 (unsigned long long)rpn);
93 print_size(TSIZE_TO_BYTES(tsize), "\n");
94 }
95}
96
Kumar Gala94e94112009-11-12 10:26:16 -060097static inline void use_tlb_cam(u8 idx)
98{
99 int i = idx / 32;
100 int bit = idx % 32;
101
102 gd->used_tlb_cams[i] |= (1 << bit);
103}
104
105static inline void free_tlb_cam(u8 idx)
106{
107 int i = idx / 32;
108 int bit = idx % 32;
109
110 gd->used_tlb_cams[i] &= ~(1 << bit);
111}
112
113void init_used_tlb_cams(void)
114{
115 int i;
116 unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
117
118 for (i = 0; i < ((CONFIG_SYS_NUM_TLBCAMS+31)/32); i++)
119 gd->used_tlb_cams[i] = 0;
120
121 /* walk all the entries */
122 for (i = 0; i < num_cam; i++) {
Kumar Gala94e94112009-11-12 10:26:16 -0600123 mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0));
Kumar Gala94e94112009-11-12 10:26:16 -0600124 asm volatile("tlbre;isync");
Becky Bruce4e63df32010-06-17 11:37:21 -0500125 if (mfspr(MAS1) & MAS1_VALID)
Kumar Gala94e94112009-11-12 10:26:16 -0600126 use_tlb_cam(i);
127 }
128}
129
130int find_free_tlbcam(void)
131{
132 int i;
133 u32 idx;
134
135 for (i = 0; i < ((CONFIG_SYS_NUM_TLBCAMS+31)/32); i++) {
136 idx = ffz(gd->used_tlb_cams[i]);
137
138 if (idx != 32)
139 break;
140 }
141
142 idx += i * 32;
143
144 if (idx >= CONFIG_SYS_NUM_TLBCAMS)
145 return -1;
146
147 return idx;
148}
149
Kumar Gala44a23cf2008-01-16 22:33:22 -0600150void set_tlb(u8 tlb, u32 epn, u64 rpn,
151 u8 perms, u8 wimge,
152 u8 ts, u8 esel, u8 tsize, u8 iprot)
153{
154 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
155
Kumar Gala94e94112009-11-12 10:26:16 -0600156 if (tlb == 1)
157 use_tlb_cam(esel);
158
Kumar Gala44a23cf2008-01-16 22:33:22 -0600159 _mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
160 _mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
161 _mas2 = FSL_BOOKE_MAS2(epn, wimge);
162 _mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
Kumar Galad30f9042009-09-11 11:27:00 -0500163 _mas7 = FSL_BOOKE_MAS7(rpn);
Kumar Gala44a23cf2008-01-16 22:33:22 -0600164
Kumar Galad30f9042009-09-11 11:27:00 -0500165 write_tlb(_mas0, _mas1, _mas2, _mas3, _mas7);
Kumar Galaecf5b982008-12-16 14:59:20 -0600166
167#ifdef CONFIG_ADDR_MAP
168 if ((tlb == 1) && (gd->flags & GD_FLG_RELOC))
Becky Bruce4e63df32010-06-17 11:37:21 -0500169 addrmap_set_entry(epn, rpn, TSIZE_TO_BYTES(tsize), esel);
Kumar Galaecf5b982008-12-16 14:59:20 -0600170#endif
Kumar Gala44a23cf2008-01-16 22:33:22 -0600171}
172
173void disable_tlb(u8 esel)
174{
Kumar Gala3d6d9c32011-11-09 09:59:32 -0600175 u32 _mas0, _mas1, _mas2, _mas3;
Kumar Gala44a23cf2008-01-16 22:33:22 -0600176
Kumar Gala94e94112009-11-12 10:26:16 -0600177 free_tlb_cam(esel);
178
Kumar Gala44a23cf2008-01-16 22:33:22 -0600179 _mas0 = FSL_BOOKE_MAS0(1, esel, 0);
180 _mas1 = 0;
181 _mas2 = 0;
182 _mas3 = 0;
Kumar Gala44a23cf2008-01-16 22:33:22 -0600183
184 mtspr(MAS0, _mas0);
185 mtspr(MAS1, _mas1);
186 mtspr(MAS2, _mas2);
187 mtspr(MAS3, _mas3);
188#ifdef CONFIG_ENABLE_36BIT_PHYS
Kumar Gala3d6d9c32011-11-09 09:59:32 -0600189 mtspr(MAS7, 0);
Kumar Gala44a23cf2008-01-16 22:33:22 -0600190#endif
191 asm volatile("isync;msync;tlbwe;isync");
Kumar Galaecf5b982008-12-16 14:59:20 -0600192
193#ifdef CONFIG_ADDR_MAP
194 if (gd->flags & GD_FLG_RELOC)
195 addrmap_set_entry(0, 0, 0, esel);
196#endif
Kumar Gala44a23cf2008-01-16 22:33:22 -0600197}
198
Kumar Galac2287af2009-09-03 08:20:24 -0500199static void tlbsx (const volatile unsigned *addr)
200{
201 __asm__ __volatile__ ("tlbsx 0,%0" : : "r" (addr), "m" (*addr));
202}
203
204/* return -1 if we didn't find anything */
205int find_tlb_idx(void *addr, u8 tlbsel)
206{
207 u32 _mas0, _mas1;
208
209 /* zero out Search PID, AS */
210 mtspr(MAS6, 0);
211
212 tlbsx(addr);
213
214 _mas0 = mfspr(MAS0);
215 _mas1 = mfspr(MAS1);
216
217 /* we found something, and its in the TLB we expect */
218 if ((MAS1_VALID & _mas1) &&
219 (MAS0_TLBSEL(tlbsel) == (_mas0 & MAS0_TLBSEL_MSK))) {
220 return ((_mas0 & MAS0_ESEL_MSK) >> 16);
221 }
222
223 return -1;
224}
225
Kumar Galaecf5b982008-12-16 14:59:20 -0600226#ifdef CONFIG_ADDR_MAP
227void init_addr_map(void)
228{
229 int i;
Kumar Galacdbdbe62009-11-13 08:52:21 -0600230 unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
Kumar Galaecf5b982008-12-16 14:59:20 -0600231
Kumar Galae393e2e2009-08-14 16:43:22 -0500232 /* walk all the entries */
Kumar Galacdbdbe62009-11-13 08:52:21 -0600233 for (i = 0; i < num_cam; i++) {
Kumar Galae393e2e2009-08-14 16:43:22 -0500234 unsigned long epn;
Becky Bruce4e63df32010-06-17 11:37:21 -0500235 u32 tsize, valid;
Kumar Galae393e2e2009-08-14 16:43:22 -0500236 phys_addr_t rpn;
237
Becky Bruce4e63df32010-06-17 11:37:21 -0500238 read_tlbcam_entry(i, &valid, &tsize, &epn, &rpn);
239 if (valid & MAS1_VALID)
240 addrmap_set_entry(epn, rpn, TSIZE_TO_BYTES(tsize), i);
Kumar Galaecf5b982008-12-16 14:59:20 -0600241 }
242
243 return ;
244}
245#endif
246
York Sunc02ce6e2010-09-28 15:20:32 -0700247unsigned int
248setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
Kumar Gala6fb1b732008-06-09 11:07:46 -0500249{
Kumar Gala355f4f82009-11-13 09:04:19 -0600250 int i;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500251 unsigned int tlb_size;
York Sunffd06e02012-10-08 07:44:30 +0000252 unsigned int wimge = MAS2_M;
Kumar Galaf8523cb2009-02-06 09:56:35 -0600253 unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
Kumar Gala50cf3d12011-10-31 22:13:26 -0500254 unsigned int max_cam;
Kumar Galaf8523cb2009-02-06 09:56:35 -0600255 u64 size, memsize = (u64)memsize_in_meg << 20;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500256
Becky Bruce6b1ef2a2010-12-17 17:17:55 -0600257#ifdef CONFIG_SYS_PPC_DDR_WIMGE
258 wimge = CONFIG_SYS_PPC_DDR_WIMGE;
259#endif
Kumar Galaf8523cb2009-02-06 09:56:35 -0600260 size = min(memsize, CONFIG_MAX_MEM_MAPPED);
Kumar Gala50cf3d12011-10-31 22:13:26 -0500261 if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
262 /* Convert (4^max) kB to (2^max) bytes */
263 max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
264 } else {
265 /* Convert (2^max) kB to (2^max) bytes */
266 max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
267 }
Kumar Gala6fb1b732008-06-09 11:07:46 -0500268
Kumar Gala355f4f82009-11-13 09:04:19 -0600269 for (i = 0; size && i < 8; i++) {
270 int ram_tlb_index = find_free_tlbcam();
Kumar Galaf8523cb2009-02-06 09:56:35 -0600271 u32 camsize = __ilog2_u64(size) & ~1U;
272 u32 align = __ilog2(ram_tlb_address) & ~1U;
273
Kumar Gala355f4f82009-11-13 09:04:19 -0600274 if (ram_tlb_index == -1)
275 break;
276
Kumar Galaf8523cb2009-02-06 09:56:35 -0600277 if (align == -2) align = max_cam;
278 if (camsize > align)
279 camsize = align;
280
281 if (camsize > max_cam)
282 camsize = max_cam;
283
284 tlb_size = (camsize - 10) / 2;
285
York Sunc02ce6e2010-09-28 15:20:32 -0700286 set_tlb(1, ram_tlb_address, p_addr,
Becky Bruce6b1ef2a2010-12-17 17:17:55 -0600287 MAS3_SX|MAS3_SW|MAS3_SR, wimge,
Kumar Gala6fb1b732008-06-09 11:07:46 -0500288 0, ram_tlb_index, tlb_size, 1);
289
Kumar Galaf8523cb2009-02-06 09:56:35 -0600290 size -= 1ULL << camsize;
291 memsize -= 1ULL << camsize;
292 ram_tlb_address += 1UL << camsize;
York Sunc02ce6e2010-09-28 15:20:32 -0700293 p_addr += 1UL << camsize;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500294 }
295
Kumar Galaf8523cb2009-02-06 09:56:35 -0600296 if (memsize)
Kumar Galad4b130d2009-06-11 23:40:34 -0500297 print_size(memsize, " left unmapped\n");
Kumar Gala6fb1b732008-06-09 11:07:46 -0500298 return memsize_in_meg;
299}
York Sunc02ce6e2010-09-28 15:20:32 -0700300
301unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
302{
303 return
304 setup_ddr_tlbs_phys(CONFIG_SYS_DDR_SDRAM_BASE, memsize_in_meg);
305}
Becky Bruce9cdfe282011-07-18 18:49:15 -0500306
307/* Invalidate the DDR TLBs for the requested size */
308void clear_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg)
309{
310 u32 vstart = CONFIG_SYS_DDR_SDRAM_BASE;
311 unsigned long epn;
312 u32 tsize, valid, ptr;
313 phys_addr_t rpn = 0;
314 int ddr_esel;
315 u64 memsize = (u64)memsize_in_meg << 20;
316
317 ptr = vstart;
318
319 while (ptr < (vstart + memsize)) {
320 ddr_esel = find_tlb_idx((void *)ptr, 1);
321 if (ddr_esel != -1) {
322 read_tlbcam_entry(ddr_esel, &valid, &tsize, &epn, &rpn);
323 disable_tlb(ddr_esel);
324 }
325 ptr += TSIZE_TO_BYTES(tsize);
326 }
327}
328
329void clear_ddr_tlbs(unsigned int memsize_in_meg)
330{
331 clear_ddr_tlbs_phys(CONFIG_SYS_DDR_SDRAM_BASE, memsize_in_meg);
332}
333
334
Mingkai Hu7da53352009-09-11 14:19:10 +0800335#endif /* !CONFIG_NAND_SPL */