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wdenkfe8c2802002-11-03 00:38:21 +00001/*
Bartlomiej Sieka4707fb52006-10-13 21:09:09 +02002 * (C) Copyright 2000-2006
wdenkfe8c2802002-11-03 00:38:21 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
28#include <devices.h>
wdenkfe8c2802002-11-03 00:38:21 +000029#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
wdenk0db5bca2003-03-31 17:27:09 +000032#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
wdenkcbd8a352004-02-24 02:00:03 +000035#ifdef CONFIG_MPC5xxx
wdenk945af8d2003-07-16 21:53:01 +000036#include <mpc5xxx.h>
37#endif
wdenkfe8c2802002-11-03 00:38:21 +000038#if (CONFIG_COMMANDS & CFG_CMD_IDE)
39#include <ide.h>
40#endif
41#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
42#include <scsi.h>
43#endif
44#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
wdenk281e00a2004-08-01 22:48:16 +000051#include <serial.h>
wdenkfe8c2802002-11-03 00:38:21 +000052#ifdef CFG_ALLOC_DPRAM
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -050053#if !defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +000054#include <commproc.h>
55#endif
wdenk7aa78612003-05-03 15:50:43 +000056#endif
wdenkfe8c2802002-11-03 00:38:21 +000057#include <version.h>
58#if defined(CONFIG_BAB7xx)
59#include <w83c553f.h>
60#endif
61#include <dtt.h>
62#if defined(CONFIG_POST)
63#include <post.h>
64#endif
wdenk56f94be2002-11-05 16:35:14 +000065#if defined(CONFIG_LOGBUFFER)
66#include <logbuff.h>
67#endif
wdenk42d1f032003-10-15 23:53:47 +000068#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
69#include <asm/cache.h>
70#endif
wdenk1c437712004-01-16 00:30:56 +000071#ifdef CONFIG_PS2KBD
72#include <keyboard.h>
73#endif
wdenkfe8c2802002-11-03 00:38:21 +000074
Heiko Schocherfa230442006-12-21 17:17:02 +010075#ifdef CFG_UPDATE_FLASH_SIZE
76extern int update_flash_size (int flash_size);
77#endif
78
wdenkfe8c2802002-11-03 00:38:21 +000079#if (CONFIG_COMMANDS & CFG_CMD_DOC)
80void doc_init (void);
81#endif
82#if defined(CONFIG_HARD_I2C) || \
83 defined(CONFIG_SOFT_I2C)
84#include <i2c.h>
85#endif
stroesebedc4972003-05-23 11:16:49 +000086#if (CONFIG_COMMANDS & CFG_CMD_NAND)
87void nand_init (void);
88#endif
wdenkfe8c2802002-11-03 00:38:21 +000089
90static char *failed = "*** failed ***\n";
91
wdenk17d704e2004-04-10 20:43:50 +000092#if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
wdenkfe8c2802002-11-03 00:38:21 +000093extern flash_info_t flash_info[];
wdenk17d704e2004-04-10 20:43:50 +000094#endif
wdenkfe8c2802002-11-03 00:38:21 +000095
96#include <environment.h>
Wolfgang Denkd87080b2006-03-31 18:32:53 +020097
Wolfgang Denkbce84c42005-08-30 14:13:23 +020098DECLARE_GLOBAL_DATA_PTR;
wdenkfe8c2802002-11-03 00:38:21 +000099
wdenk7e780362004-04-08 22:31:29 +0000100#if defined(CFG_ENV_IS_EMBEDDED)
101#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
102#elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
wdenk04a85b32004-04-15 18:22:41 +0000103 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
wdenk7e780362004-04-08 22:31:29 +0000104 defined(CFG_ENV_IS_IN_NVRAM)
wdenkfe8c2802002-11-03 00:38:21 +0000105#define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
106#else
107#define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
108#endif
109
wdenk3b57fe02003-05-30 12:48:29 +0000110extern ulong __init_end;
111extern ulong _end;
wdenk3b57fe02003-05-30 12:48:29 +0000112ulong monitor_flash_len;
113
wdenk8bde7f72003-06-27 21:31:46 +0000114#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
115#include <bedbug/type.h>
116#endif
117
wdenkfe8c2802002-11-03 00:38:21 +0000118/*
119 * Begin and End of memory area for malloc(), and current "brk"
120 */
121static ulong mem_malloc_start = 0;
122static ulong mem_malloc_end = 0;
123static ulong mem_malloc_brk = 0;
124
125/************************************************************************
126 * Utilities *
127 ************************************************************************
128 */
129
130/*
131 * The Malloc area is immediately below the monitor copy in DRAM
132 */
133static void mem_malloc_init (void)
134{
wdenkfe8c2802002-11-03 00:38:21 +0000135 ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
136
137 mem_malloc_end = dest_addr;
138 mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
139 mem_malloc_brk = mem_malloc_start;
140
141 memset ((void *) mem_malloc_start,
142 0,
143 mem_malloc_end - mem_malloc_start);
144}
145
146void *sbrk (ptrdiff_t increment)
147{
148 ulong old = mem_malloc_brk;
149 ulong new = old + increment;
150
151 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
152 return (NULL);
153 }
154 mem_malloc_brk = new;
155 return ((void *) old);
156}
157
158char *strmhz (char *buf, long hz)
159{
160 long l, n;
161 long m;
162
163 n = hz / 1000000L;
164 l = sprintf (buf, "%ld", n);
165 m = (hz % 1000000L) / 1000L;
166 if (m != 0)
167 sprintf (buf + l, ".%03ld", m);
168 return (buf);
169}
170
wdenkfe8c2802002-11-03 00:38:21 +0000171/*
172 * All attempts to come up with a "common" initialization sequence
173 * that works for all boards and architectures failed: some of the
174 * requirements are just _too_ different. To get rid of the resulting
175 * mess of board dependend #ifdef'ed code we now make the whole
176 * initialization sequence configurable to the user.
177 *
178 * The requirements for any new initalization function is simple: it
179 * receives a pointer to the "global data" structure as it's only
180 * argument, and returns an integer return code, where 0 means
181 * "continue" and != 0 means "fatal error, hang the system".
182 */
183typedef int (init_fnc_t) (void);
184
185/************************************************************************
186 * Init Utilities *
187 ************************************************************************
188 * Some of this code should be moved into the core functions,
189 * but let's get it working (again) first...
190 */
191
192static int init_baudrate (void)
193{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200194 char tmp[64]; /* long enough for environment variables */
wdenkfe8c2802002-11-03 00:38:21 +0000195 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
196
197 gd->baudrate = (i > 0)
198 ? (int) simple_strtoul (tmp, NULL, 10)
199 : CONFIG_BAUDRATE;
wdenkfe8c2802002-11-03 00:38:21 +0000200 return (0);
201}
202
203/***********************************************************************/
204
Stefan Roesed96f41e2005-11-30 13:06:40 +0100205#ifdef CONFIG_ADD_RAM_INFO
206void board_add_ram_info(int);
207#endif
208
wdenkfe8c2802002-11-03 00:38:21 +0000209static int init_func_ram (void)
210{
wdenkfe8c2802002-11-03 00:38:21 +0000211#ifdef CONFIG_BOARD_TYPES
212 int board_type = gd->board_type;
213#else
214 int board_type = 0; /* use dummy arg */
215#endif
216 puts ("DRAM: ");
217
218 if ((gd->ram_size = initdram (board_type)) > 0) {
Stefan Roesed96f41e2005-11-30 13:06:40 +0100219 print_size (gd->ram_size, "");
220#ifdef CONFIG_ADD_RAM_INFO
221 board_add_ram_info(0);
222#endif
223 putc('\n');
wdenkfe8c2802002-11-03 00:38:21 +0000224 return (0);
225 }
226 puts (failed);
227 return (1);
228}
229
230/***********************************************************************/
231
232#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
233static int init_func_i2c (void)
234{
235 puts ("I2C: ");
236 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
237 puts ("ready\n");
238 return (0);
239}
240#endif
241
242/***********************************************************************/
243
244#if defined(CONFIG_WATCHDOG)
245static int init_func_watchdog_init (void)
246{
247 puts (" Watchdog enabled\n");
248 WATCHDOG_RESET ();
249 return (0);
250}
251# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
252
253static int init_func_watchdog_reset (void)
254{
255 WATCHDOG_RESET ();
256 return (0);
257}
258# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
259#else
260# define INIT_FUNC_WATCHDOG_INIT /* undef */
261# define INIT_FUNC_WATCHDOG_RESET /* undef */
262#endif /* CONFIG_WATCHDOG */
263
264/************************************************************************
265 * Initialization sequence *
266 ************************************************************************
267 */
268
269init_fnc_t *init_sequence[] = {
270
wdenkc837dcb2004-01-20 23:12:12 +0000271#if defined(CONFIG_BOARD_EARLY_INIT_F)
272 board_early_init_f,
wdenkfe8c2802002-11-03 00:38:21 +0000273#endif
wdenkc178d3d2004-01-24 20:25:54 +0000274
wdenk66ca92a2004-09-28 17:59:53 +0000275#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
wdenkfe8c2802002-11-03 00:38:21 +0000276 get_clocks, /* get CPU and bus clocks (etc.) */
Markus Klotzbuecher090eb732006-07-12 15:26:01 +0200277#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
278 && !defined(CONFIG_TQM885D)
wdenke9132ea2004-04-24 23:23:30 +0000279 adjust_sdram_tbs_8xx,
280#endif
wdenkfe8c2802002-11-03 00:38:21 +0000281 init_timebase,
wdenkc178d3d2004-01-24 20:25:54 +0000282#endif
wdenkfe8c2802002-11-03 00:38:21 +0000283#ifdef CFG_ALLOC_DPRAM
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -0500284#if !defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +0000285 dpram_init,
286#endif
wdenk7aa78612003-05-03 15:50:43 +0000287#endif
wdenkfe8c2802002-11-03 00:38:21 +0000288#if defined(CONFIG_BOARD_POSTCLK_INIT)
289 board_postclk_init,
290#endif
291 env_init,
wdenk66ca92a2004-09-28 17:59:53 +0000292#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
wdenkc178d3d2004-01-24 20:25:54 +0000293 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
294 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
295 init_timebase,
296#endif
wdenkfe8c2802002-11-03 00:38:21 +0000297 init_baudrate,
298 serial_init,
299 console_init_f,
300 display_options,
301#if defined(CONFIG_8260)
302 prt_8260_rsr,
303 prt_8260_clks,
304#endif /* CONFIG_8260 */
Eran Libertyf046ccd2005-07-28 10:08:46 -0500305
306#if defined(CONFIG_MPC83XX)
307 print_clock_conf,
308#endif
309
wdenkfe8c2802002-11-03 00:38:21 +0000310 checkcpu,
wdenkcbd8a352004-02-24 02:00:03 +0000311#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +0000312 prt_mpc5xxx_clks,
wdenkcbd8a352004-02-24 02:00:03 +0000313#endif /* CONFIG_MPC5xxx */
wdenk983fda82004-10-28 00:09:35 +0000314#if defined(CONFIG_MPC8220)
315 prt_mpc8220_clks,
316#endif
wdenkfe8c2802002-11-03 00:38:21 +0000317 checkboard,
318 INIT_FUNC_WATCHDOG_INIT
wdenkc837dcb2004-01-20 23:12:12 +0000319#if defined(CONFIG_MISC_INIT_F)
wdenkfe8c2802002-11-03 00:38:21 +0000320 misc_init_f,
321#endif
322 INIT_FUNC_WATCHDOG_RESET
323#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
324 init_func_i2c,
325#endif
326#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
327 dtt_init,
328#endif
wdenk4532cb62003-04-27 22:52:51 +0000329#ifdef CONFIG_POST
330 post_init_f,
331#endif
wdenkfe8c2802002-11-03 00:38:21 +0000332 INIT_FUNC_WATCHDOG_RESET
333 init_func_ram,
334#if defined(CFG_DRAM_TEST)
335 testdram,
336#endif /* CFG_DRAM_TEST */
337 INIT_FUNC_WATCHDOG_RESET
338
339 NULL, /* Terminate this list */
340};
341
342/************************************************************************
343 *
344 * This is the first part of the initialization sequence that is
345 * implemented in C, but still running from ROM.
346 *
347 * The main purpose is to provide a (serial) console interface as
348 * soon as possible (so we can see any error messages), and to
349 * initialize the RAM so that we can relocate the monitor code to
350 * RAM.
351 *
352 * Be aware of the restrictions: global data is read-only, BSS is not
353 * initialized, and stack space is limited to a few kB.
354 *
355 ************************************************************************
356 */
357
358void board_init_f (ulong bootflag)
359{
wdenkfe8c2802002-11-03 00:38:21 +0000360 bd_t *bd;
361 ulong len, addr, addr_sp;
Wolfgang Denk7bc5ee02005-08-26 01:36:03 +0200362 ulong *s;
wdenkfe8c2802002-11-03 00:38:21 +0000363 gd_t *id;
364 init_fnc_t **init_fnc_ptr;
365#ifdef CONFIG_PRAM
366 int i;
367 ulong reg;
368 uchar tmp[64]; /* long enough for environment variables */
369#endif
370
371 /* Pointer is writable since we allocated a register for it */
372 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
wdenk93f6a672004-07-01 20:28:03 +0000373 /* compiler optimization barrier needed for GCC >= 3.4 */
374 __asm__ __volatile__("": : :"memory");
wdenkfe8c2802002-11-03 00:38:21 +0000375
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -0500376#if !defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +0000377 /* Clear initial global data */
378 memset ((void *) gd, 0, sizeof (gd_t));
379#endif
380
381 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
382 if ((*init_fnc_ptr) () != 0) {
383 hang ();
384 }
385 }
386
387 /*
388 * Now that we have DRAM mapped and working, we can
389 * relocate the code and continue running from DRAM.
390 *
391 * Reserve memory at end of RAM for (top down in that order):
wdenk8bde7f72003-06-27 21:31:46 +0000392 * - kernel log buffer
wdenkfe8c2802002-11-03 00:38:21 +0000393 * - protected RAM
394 * - LCD framebuffer
395 * - monitor code
396 * - board info struct
397 */
wdenk3b57fe02003-05-30 12:48:29 +0000398 len = (ulong)&_end - CFG_MONITOR_BASE;
wdenkfe8c2802002-11-03 00:38:21 +0000399
400#ifndef CONFIG_VERY_BIG_RAM
401 addr = CFG_SDRAM_BASE + gd->ram_size;
402#else
403 /* only allow stack below 256M */
404 addr = CFG_SDRAM_BASE +
405 (gd->ram_size > 256 << 20) ? 256 << 20 : gd->ram_size;
406#endif
407
wdenk228f29a2002-12-08 09:53:23 +0000408#ifdef CONFIG_LOGBUFFER
409 /* reserve kernel log buffer */
410 addr -= (LOGBUFF_RESERVE);
wdenk9d2b18a2003-06-28 23:11:04 +0000411 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
wdenk228f29a2002-12-08 09:53:23 +0000412#endif
413
wdenkfe8c2802002-11-03 00:38:21 +0000414#ifdef CONFIG_PRAM
415 /*
416 * reserve protected RAM
417 */
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200418 i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
419 reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
wdenkfe8c2802002-11-03 00:38:21 +0000420 addr -= (reg << 10); /* size is in kB */
wdenk9d2b18a2003-06-28 23:11:04 +0000421 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
wdenkfe8c2802002-11-03 00:38:21 +0000422#endif /* CONFIG_PRAM */
423
424 /* round down to next 4 kB limit */
425 addr &= ~(4096 - 1);
wdenk9d2b18a2003-06-28 23:11:04 +0000426 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
wdenkfe8c2802002-11-03 00:38:21 +0000427
428#ifdef CONFIG_LCD
429 /* reserve memory for LCD display (always full pages) */
430 addr = lcd_setmem (addr);
431 gd->fb_base = addr;
432#endif /* CONFIG_LCD */
433
434#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
435 /* reserve memory for video display (always full pages) */
436 addr = video_setmem (addr);
437 gd->fb_base = addr;
438#endif /* CONFIG_VIDEO */
439
440 /*
441 * reserve memory for U-Boot code, data & bss
wdenk682011f2003-06-03 23:54:09 +0000442 * round down to next 4 kB limit
wdenkfe8c2802002-11-03 00:38:21 +0000443 */
444 addr -= len;
wdenk682011f2003-06-03 23:54:09 +0000445 addr &= ~(4096 - 1);
Wolfgang Denk7d314992005-10-05 00:00:54 +0200446#ifdef CONFIG_E500
447 /* round down to next 64 kB limit so that IVPR stays aligned */
448 addr &= ~(65536 - 1);
449#endif
wdenkfe8c2802002-11-03 00:38:21 +0000450
wdenk9d2b18a2003-06-28 23:11:04 +0000451 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
wdenkfe8c2802002-11-03 00:38:21 +0000452
wdenkc7de8292002-11-19 11:04:11 +0000453#ifdef CONFIG_AMIGAONEG3SE
454 gd->relocaddr = addr;
455#endif
456
wdenkfe8c2802002-11-03 00:38:21 +0000457 /*
458 * reserve memory for malloc() arena
459 */
460 addr_sp = addr - TOTAL_MALLOC_LEN;
wdenk9d2b18a2003-06-28 23:11:04 +0000461 debug ("Reserving %dk for malloc() at: %08lx\n",
wdenkfe8c2802002-11-03 00:38:21 +0000462 TOTAL_MALLOC_LEN >> 10, addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000463
464 /*
465 * (permanently) allocate a Board Info struct
466 * and a permanent copy of the "global" data
467 */
468 addr_sp -= sizeof (bd_t);
469 bd = (bd_t *) addr_sp;
470 gd->bd = bd;
wdenk9d2b18a2003-06-28 23:11:04 +0000471 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
wdenkfe8c2802002-11-03 00:38:21 +0000472 sizeof (bd_t), addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000473 addr_sp -= sizeof (gd_t);
474 id = (gd_t *) addr_sp;
wdenk9d2b18a2003-06-28 23:11:04 +0000475 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
wdenkfe8c2802002-11-03 00:38:21 +0000476 sizeof (gd_t), addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000477
478 /*
479 * Finally, we set up a new (bigger) stack.
480 *
481 * Leave some safety gap for SP, force alignment on 16 byte boundary
482 * Clear initial stack frame
483 */
484 addr_sp -= 16;
485 addr_sp &= ~0xF;
Wolfgang Denk7bc5ee02005-08-26 01:36:03 +0200486 s = (ulong *)addr_sp;
487 *s-- = 0;
488 *s-- = 0;
489 addr_sp = (ulong)s;
wdenk9d2b18a2003-06-28 23:11:04 +0000490 debug ("Stack Pointer at: %08lx\n", addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000491
492 /*
493 * Save local variables to board info struct
494 */
495
wdenkc837dcb2004-01-20 23:12:12 +0000496 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
wdenkfe8c2802002-11-03 00:38:21 +0000497 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
498
499#ifdef CONFIG_IP860
wdenkc837dcb2004-01-20 23:12:12 +0000500 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
501 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
wdenk983fda82004-10-28 00:09:35 +0000502#elif defined CONFIG_MPC8220
503 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
504 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
wdenkfe8c2802002-11-03 00:38:21 +0000505#else
wdenkc837dcb2004-01-20 23:12:12 +0000506 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
507 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
wdenkfe8c2802002-11-03 00:38:21 +0000508#endif
509
wdenk42d1f032003-10-15 23:53:47 +0000510#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
Jon Loeligerdebb7352006-04-26 17:58:56 -0500511 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
wdenkfe8c2802002-11-03 00:38:21 +0000512 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
513#endif
wdenkcbd8a352004-02-24 02:00:03 +0000514#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +0000515 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
516#endif
Eran Libertyf046ccd2005-07-28 10:08:46 -0500517#if defined(CONFIG_MPC83XX)
Timur Tabid239d742006-11-03 12:00:28 -0600518 bd->bi_immrbar = CFG_IMMR;
Eran Libertyf046ccd2005-07-28 10:08:46 -0500519#endif
wdenk983fda82004-10-28 00:09:35 +0000520#if defined(CONFIG_MPC8220)
521 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
522 bd->bi_inpfreq = gd->inp_clk;
523 bd->bi_pcifreq = gd->pci_clk;
524 bd->bi_vcofreq = gd->vco_clk;
525 bd->bi_pevfreq = gd->pev_clk;
526 bd->bi_flbfreq = gd->flb_clk;
527
Wolfgang Denkdd520bf2006-11-30 18:02:20 +0100528 /* store bootparam to sram (backward compatible), here? */
529 {
530 u32 *sram = (u32 *)CFG_SRAM_BASE;
531 *sram++ = gd->ram_size;
532 *sram++ = gd->bus_clk;
533 *sram++ = gd->inp_clk;
534 *sram++ = gd->cpu_clk;
535 *sram++ = gd->vco_clk;
536 *sram++ = gd->flb_clk;
537 *sram++ = 0xb8c3ba11; /* boot signature */
538 }
wdenk983fda82004-10-28 00:09:35 +0000539#endif
wdenkfe8c2802002-11-03 00:38:21 +0000540
541 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
542
543 WATCHDOG_RESET ();
544 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
545 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -0500546#if defined(CONFIG_CPM2)
wdenkfe8c2802002-11-03 00:38:21 +0000547 bd->bi_cpmfreq = gd->cpm_clk;
548 bd->bi_brgfreq = gd->brg_clk;
549 bd->bi_sccfreq = gd->scc_clk;
550 bd->bi_vco = gd->vco_out;
Jon Loeliger9c4c5ae2005-07-23 10:37:35 -0500551#endif /* CONFIG_CPM2 */
wdenkcbd8a352004-02-24 02:00:03 +0000552#if defined(CONFIG_MPC5xxx)
wdenk945af8d2003-07-16 21:53:01 +0000553 bd->bi_ipbfreq = gd->ipb_clk;
554 bd->bi_pcifreq = gd->pci_clk;
wdenkcbd8a352004-02-24 02:00:03 +0000555#endif /* CONFIG_MPC5xxx */
wdenkfe8c2802002-11-03 00:38:21 +0000556 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
557
558#ifdef CFG_EXTBDINFO
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200559 strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
560 strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
wdenkfe8c2802002-11-03 00:38:21 +0000561
562 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
563 bd->bi_plb_busfreq = gd->bus_clk;
Stefan Roese846b0dd2005-08-08 12:42:22 +0200564#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
wdenkfe8c2802002-11-03 00:38:21 +0000565 bd->bi_pci_busfreq = get_PCI_freq ();
wdenk109c0e32004-03-23 21:43:07 +0000566 bd->bi_opbfreq = get_OPB_freq ();
wdenk028ab6b2004-02-23 23:54:43 +0000567#elif defined(CONFIG_XILINX_ML300)
568 bd->bi_pci_busfreq = get_PCI_freq ();
wdenkfe8c2802002-11-03 00:38:21 +0000569#endif
570#endif
571
wdenk9d2b18a2003-06-28 23:11:04 +0000572 debug ("New Stack Pointer is: %08lx\n", addr_sp);
wdenkfe8c2802002-11-03 00:38:21 +0000573
574 WATCHDOG_RESET ();
575
576#ifdef CONFIG_POST
577 post_bootmode_init();
wdenk6dff5522003-07-15 07:45:49 +0000578 post_run (NULL, POST_ROM | post_bootmode_get(0));
wdenkfe8c2802002-11-03 00:38:21 +0000579#endif
580
581 WATCHDOG_RESET();
582
wdenk27b207f2003-07-24 23:38:38 +0000583 memcpy (id, (void *)gd, sizeof (gd_t));
wdenkfe8c2802002-11-03 00:38:21 +0000584
585 relocate_code (addr_sp, id, addr);
586
587 /* NOTREACHED - relocate_code() does not return */
588}
589
wdenkfe8c2802002-11-03 00:38:21 +0000590/************************************************************************
591 *
592 * This is the next part if the initialization sequence: we are now
593 * running from RAM and have a "normal" C environment, i. e. global
594 * data can be written, BSS has been cleared, the stack size in not
595 * that critical any more, etc.
596 *
597 ************************************************************************
598 */
wdenkfe8c2802002-11-03 00:38:21 +0000599void board_init_r (gd_t *id, ulong dest_addr)
600{
wdenkfe8c2802002-11-03 00:38:21 +0000601 cmd_tbl_t *cmdtp;
602 char *s, *e;
603 bd_t *bd;
604 int i;
605 extern void malloc_bin_reloc (void);
606#ifndef CFG_ENV_IS_NOWHERE
607 extern char * env_name_spec;
608#endif
609
610#ifndef CFG_NO_FLASH
611 ulong flash_size;
612#endif
613
614 gd = id; /* initialize RAM version of global data */
615 bd = gd->bd;
616
617 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
Marian Balakowiczbb105f22006-06-30 15:27:09 +0200618 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
619
620#ifdef CONFIG_SERIAL_MULTI
621 serial_initialize();
622#endif
wdenkfe8c2802002-11-03 00:38:21 +0000623
wdenk9d2b18a2003-06-28 23:11:04 +0000624 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
wdenkfe8c2802002-11-03 00:38:21 +0000625
626 WATCHDOG_RESET ();
627
wdenkc837dcb2004-01-20 23:12:12 +0000628#if defined(CONFIG_BOARD_EARLY_INIT_R)
629 board_early_init_r ();
630#endif
631
wdenk3b57fe02003-05-30 12:48:29 +0000632 monitor_flash_len = (ulong)&__init_end - dest_addr;
wdenkfe8c2802002-11-03 00:38:21 +0000633
634 /*
635 * We have to relocate the command table manually
636 */
wdenk8bde7f72003-06-27 21:31:46 +0000637 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
wdenkfe8c2802002-11-03 00:38:21 +0000638 ulong addr;
wdenkfe8c2802002-11-03 00:38:21 +0000639 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
640#if 0
641 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
642 cmdtp->name, (ulong) (cmdtp->cmd), addr);
643#endif
644 cmdtp->cmd =
645 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
646
647 addr = (ulong)(cmdtp->name) + gd->reloc_off;
648 cmdtp->name = (char *)addr;
649
650 if (cmdtp->usage) {
651 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
652 cmdtp->usage = (char *)addr;
653 }
654#ifdef CFG_LONGHELP
655 if (cmdtp->help) {
656 addr = (ulong)(cmdtp->help) + gd->reloc_off;
657 cmdtp->help = (char *)addr;
658 }
659#endif
660 }
661 /* there are some other pointer constants we must deal with */
662#ifndef CFG_ENV_IS_NOWHERE
663 env_name_spec += gd->reloc_off;
664#endif
665
666 WATCHDOG_RESET ();
667
wdenk56f94be2002-11-05 16:35:14 +0000668#ifdef CONFIG_LOGBUFFER
wdenk228f29a2002-12-08 09:53:23 +0000669 logbuff_init_ptrs ();
wdenk56f94be2002-11-05 16:35:14 +0000670#endif
wdenkfe8c2802002-11-03 00:38:21 +0000671#ifdef CONFIG_POST
wdenk228f29a2002-12-08 09:53:23 +0000672 post_output_backlog ();
wdenkfe8c2802002-11-03 00:38:21 +0000673 post_reloc ();
674#endif
675
676 WATCHDOG_RESET();
677
Kumar Gala2688e2f2006-02-10 15:40:06 -0600678#if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
679 defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
wdenkfe8c2802002-11-03 00:38:21 +0000680 icache_enable (); /* it's time to enable the instruction cache */
681#endif
682
Haiying Wang1c8f6d82006-08-15 15:12:55 -0400683#if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
wdenkc837dcb2004-01-20 23:12:12 +0000684 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
wdenk42d1f032003-10-15 23:53:47 +0000685#endif
686
wdenk3bac3512003-03-12 10:41:04 +0000687#if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
wdenkfe8c2802002-11-03 00:38:21 +0000688 /*
wdenk3bac3512003-03-12 10:41:04 +0000689 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
690 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
691 * bridge there.
wdenkfe8c2802002-11-03 00:38:21 +0000692 */
693 pci_init ();
wdenk3bac3512003-03-12 10:41:04 +0000694#endif
695#if defined(CONFIG_BAB7xx)
wdenkfe8c2802002-11-03 00:38:21 +0000696 /*
697 * Initialise the ISA bridge
698 */
699 initialise_w83c553f ();
700#endif
701
702 asm ("sync ; isync");
703
704 /*
705 * Setup trap handlers
706 */
707 trap_init (dest_addr);
708
709#if !defined(CFG_NO_FLASH)
710 puts ("FLASH: ");
711
712 if ((flash_size = flash_init ()) > 0) {
wdenk0cb61d72003-08-30 00:05:50 +0000713# ifdef CFG_FLASH_CHECKSUM
wdenkfe8c2802002-11-03 00:38:21 +0000714 print_size (flash_size, "");
715 /*
716 * Compute and print flash CRC if flashchecksum is set to 'y'
717 *
718 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
719 */
720 s = getenv ("flashchecksum");
721 if (s && (*s == 'y')) {
722 printf (" CRC: %08lX",
wdenk7e780362004-04-08 22:31:29 +0000723 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
724 );
wdenkfe8c2802002-11-03 00:38:21 +0000725 }
726 putc ('\n');
wdenk0cb61d72003-08-30 00:05:50 +0000727# else /* !CFG_FLASH_CHECKSUM */
wdenkfe8c2802002-11-03 00:38:21 +0000728 print_size (flash_size, "\n");
wdenk0cb61d72003-08-30 00:05:50 +0000729# endif /* CFG_FLASH_CHECKSUM */
wdenkfe8c2802002-11-03 00:38:21 +0000730 } else {
731 puts (failed);
732 hang ();
733 }
734
735 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
736 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
Heiko Schocherfa230442006-12-21 17:17:02 +0100737
738#if defined(CFG_UPDATE_FLASH_SIZE)
739 /* Make a update of the Memctrl. */
740 update_flash_size (flash_size);
741#endif
742
743
wdenk7e780362004-04-08 22:31:29 +0000744# if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
745 /* flash mapped at end of memory map */
746 bd->bi_flashoffset = TEXT_BASE + flash_size;
wdenk0cb61d72003-08-30 00:05:50 +0000747# elif CFG_MONITOR_BASE == CFG_FLASH_BASE
wdenk3b57fe02003-05-30 12:48:29 +0000748 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
wdenk0cb61d72003-08-30 00:05:50 +0000749# else
wdenkfe8c2802002-11-03 00:38:21 +0000750 bd->bi_flashoffset = 0;
wdenk0cb61d72003-08-30 00:05:50 +0000751# endif
752#else /* CFG_NO_FLASH */
wdenkfe8c2802002-11-03 00:38:21 +0000753
754 bd->bi_flashsize = 0;
755 bd->bi_flashstart = 0;
756 bd->bi_flashoffset = 0;
757#endif /* !CFG_NO_FLASH */
758
759 WATCHDOG_RESET ();
760
761 /* initialize higher level parts of CPU like time base and timers */
762 cpu_init_r ();
763
764 WATCHDOG_RESET ();
765
766 /* initialize malloc() area */
767 mem_malloc_init ();
768 malloc_bin_reloc ();
769
770#ifdef CONFIG_SPI
771# if !defined(CFG_ENV_IS_IN_EEPROM)
772 spi_init_f ();
773# endif
774 spi_init_r ();
775#endif
776
Stefan Roese887e2ec2006-09-07 11:51:23 +0200777#if (CONFIG_COMMANDS & CFG_CMD_NAND)
778 WATCHDOG_RESET ();
779 puts ("NAND: ");
780 nand_init(); /* go init the NAND */
781#endif
782
wdenkfe8c2802002-11-03 00:38:21 +0000783 /* relocate environment function pointers etc. */
784 env_relocate ();
785
786 /*
787 * Fill in missing fields of bd_info.
wdenk8bde7f72003-06-27 21:31:46 +0000788 * We do this here, where we have "normal" access to the
789 * environment; we used to do this still running from ROM,
790 * where had to use getenv_r(), which can be pretty slow when
791 * the environment is in EEPROM.
wdenkfe8c2802002-11-03 00:38:21 +0000792 */
wdenk7abf0c52004-04-18 21:45:42 +0000793
794#if defined(CFG_EXTBDINFO)
795#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
796#if defined(CONFIG_I2CFAST)
797 /*
798 * set bi_iic_fast for linux taking environment variable
799 * "i2cfast" into account
800 */
801 {
802 char *s = getenv ("i2cfast");
803 if (s && ((*s == 'y') || (*s == 'Y'))) {
804 bd->bi_iic_fast[0] = 1;
805 bd->bi_iic_fast[1] = 1;
806 } else {
807 bd->bi_iic_fast[0] = 0;
808 bd->bi_iic_fast[1] = 0;
809 }
810 }
811#else
812 bd->bi_iic_fast[0] = 0;
813 bd->bi_iic_fast[1] = 0;
814#endif /* CONFIG_I2CFAST */
815#endif /* CONFIG_405GP, CONFIG_405EP */
816#endif /* CFG_EXTBDINFO */
817
wdenkfe8c2802002-11-03 00:38:21 +0000818 s = getenv ("ethaddr");
Bartlomiej Sieka4707fb52006-10-13 21:09:09 +0200819#if defined (CONFIG_MBX) || \
820 defined (CONFIG_RPXCLASSIC) || \
821 defined(CONFIG_IAD210) || \
822 defined(CONFIG_V38B)
wdenkfe8c2802002-11-03 00:38:21 +0000823 if (s == NULL)
824 board_get_enetaddr (bd->bi_enetaddr);
825 else
826#endif
827 for (i = 0; i < 6; ++i) {
828 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
829 if (s)
830 s = (*e) ? e + 1 : e;
831 }
832#ifdef CONFIG_HERMES
833 if ((gd->board_type >> 16) == 2)
834 bd->bi_ethspeed = gd->board_type & 0xFFFF;
835 else
836 bd->bi_ethspeed = 0xFFFF;
837#endif
838
839#ifdef CONFIG_NX823
840 load_sernum_ethaddr ();
841#endif
842
wdenke2ffd592004-12-31 09:32:47 +0000843#ifdef CONFIG_HAS_ETH1
wdenkfe8c2802002-11-03 00:38:21 +0000844 /* handle the 2nd ethernet address */
845
846 s = getenv ("eth1addr");
847
848 for (i = 0; i < 6; ++i) {
849 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
850 if (s)
851 s = (*e) ? e + 1 : e;
852 }
853#endif
wdenke2ffd592004-12-31 09:32:47 +0000854#ifdef CONFIG_HAS_ETH2
wdenkfe8c2802002-11-03 00:38:21 +0000855 /* handle the 3rd ethernet address */
856
857 s = getenv ("eth2addr");
Stefan Roeseb79316f2005-08-15 12:31:23 +0200858#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
wdenkba56f622004-02-06 23:19:44 +0000859 if (s == NULL)
860 board_get_enetaddr(bd->bi_enet2addr);
861 else
862#endif
wdenkfe8c2802002-11-03 00:38:21 +0000863 for (i = 0; i < 6; ++i) {
864 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
865 if (s)
866 s = (*e) ? e + 1 : e;
867 }
868#endif
869
wdenke2ffd592004-12-31 09:32:47 +0000870#ifdef CONFIG_HAS_ETH3
wdenkba56f622004-02-06 23:19:44 +0000871 /* handle 4th ethernet address */
872 s = getenv("eth3addr");
Stefan Roeseb79316f2005-08-15 12:31:23 +0200873#if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
wdenkba56f622004-02-06 23:19:44 +0000874 if (s == NULL)
875 board_get_enetaddr(bd->bi_enet3addr);
876 else
877#endif
878 for (i = 0; i < 6; ++i) {
879 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
880 if (s)
881 s = (*e) ? e + 1 : e;
882 }
883#endif
wdenkfe8c2802002-11-03 00:38:21 +0000884
Haiying Wangbea3f282006-07-12 10:48:05 -0400885#ifdef CFG_ID_EEPROM
886 mac_read_from_eeprom();
887#endif
888
wdenkfe8c2802002-11-03 00:38:21 +0000889#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
Heiko Schocherfa230442006-12-21 17:17:02 +0100890 defined(CONFIG_TQM8272) || \
wdenk02b11f82004-05-12 22:54:36 +0000891 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
wdenkfe8c2802002-11-03 00:38:21 +0000892 load_sernum_ethaddr ();
893#endif
894 /* IP Address */
895 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
896
897 WATCHDOG_RESET ();
898
wdenk979bdbc2004-06-01 21:08:17 +0000899#if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
wdenkfe8c2802002-11-03 00:38:21 +0000900 /*
901 * Do pci configuration
902 */
903 pci_init ();
904#endif
905
906/** leave this here (after malloc(), environment and PCI are working) **/
907 /* Initialize devices */
908 devices_init ();
909
wdenk27b207f2003-07-24 23:38:38 +0000910 /* Initialize the jump table for applications */
911 jumptable_init ();
wdenkfe8c2802002-11-03 00:38:21 +0000912
913 /* Initialize the console (after the relocation and devices init) */
914 console_init_r ();
wdenkfe8c2802002-11-03 00:38:21 +0000915
916#if defined(CONFIG_CCM) || \
917 defined(CONFIG_COGENT) || \
918 defined(CONFIG_CPCI405) || \
919 defined(CONFIG_EVB64260) || \
wdenk56f94be2002-11-05 16:35:14 +0000920 defined(CONFIG_KUP4K) || \
wdenk0608e042004-03-25 19:29:38 +0000921 defined(CONFIG_KUP4X) || \
wdenkfe8c2802002-11-03 00:38:21 +0000922 defined(CONFIG_LWMON) || \
923 defined(CONFIG_PCU_E) || \
924 defined(CONFIG_W7O) || \
925 defined(CONFIG_MISC_INIT_R)
926 /* miscellaneous platform dependent initialisations */
927 misc_init_r ();
928#endif
929
930#ifdef CONFIG_HERMES
931 if (bd->bi_ethspeed != 0xFFFF)
932 hermes_start_lxt980 ((int) bd->bi_ethspeed);
933#endif
934
wdenkfe8c2802002-11-03 00:38:21 +0000935#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
936 WATCHDOG_RESET ();
937 puts ("KGDB: ");
938 kgdb_init ();
939#endif
940
wdenk9d2b18a2003-06-28 23:11:04 +0000941 debug ("U-Boot relocated to %08lx\n", dest_addr);
wdenkfe8c2802002-11-03 00:38:21 +0000942
943 /*
944 * Enable Interrupts
945 */
946 interrupt_init ();
947
948 /* Must happen after interrupts are initialized since
949 * an irq handler gets installed
950 */
wdenk42dfe7a2004-03-14 22:25:36 +0000951#ifdef CONFIG_SERIAL_SOFTWARE_FIFO
wdenkfe8c2802002-11-03 00:38:21 +0000952 serial_buffered_init();
953#endif
954
955#ifdef CONFIG_STATUS_LED
956 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
957#endif
958
959 udelay (20);
960
961 set_timer (0);
962
wdenkfe8c2802002-11-03 00:38:21 +0000963 /* Initialize from environment */
964 if ((s = getenv ("loadaddr")) != NULL) {
965 load_addr = simple_strtoul (s, NULL, 16);
966 }
967#if (CONFIG_COMMANDS & CFG_CMD_NET)
968 if ((s = getenv ("bootfile")) != NULL) {
969 copy_filename (BootFile, s, sizeof (BootFile));
970 }
971#endif /* CFG_CMD_NET */
972
973 WATCHDOG_RESET ();
974
975#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
976 WATCHDOG_RESET ();
977 puts ("SCSI: ");
978 scsi_init ();
979#endif
980
981#if (CONFIG_COMMANDS & CFG_CMD_DOC)
982 WATCHDOG_RESET ();
983 puts ("DOC: ");
984 doc_init ();
985#endif
986
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200987#if (CONFIG_COMMANDS & CFG_CMD_NET)
988#if defined(CONFIG_NET_MULTI)
wdenkfe8c2802002-11-03 00:38:21 +0000989 WATCHDOG_RESET ();
990 puts ("Net: ");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200991#endif
wdenkfe8c2802002-11-03 00:38:21 +0000992 eth_initialize (bd);
993#endif
994
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200995#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
996 defined(CONFIG_CCM) || \
997 defined(CONFIG_ELPT860) || \
998 defined(CONFIG_EP8260) || \
999 defined(CONFIG_IP860) || \
1000 defined(CONFIG_IVML24) || \
1001 defined(CONFIG_IVMS8) || \
1002 defined(CONFIG_MPC8260ADS) || \
1003 defined(CONFIG_MPC8266ADS) || \
1004 defined(CONFIG_MPC8560ADS) || \
1005 defined(CONFIG_PCU_E) || \
1006 defined(CONFIG_RPXSUPER) || \
1007 defined(CONFIG_STXGP3) || \
1008 defined(CONFIG_SPD823TS) || \
1009 defined(CONFIG_RESET_PHY_R) )
1010
1011 WATCHDOG_RESET ();
1012 debug ("Reset Ethernet PHY\n");
1013 reset_phy ();
1014#endif
1015
wdenkfe8c2802002-11-03 00:38:21 +00001016#ifdef CONFIG_POST
wdenk6dff5522003-07-15 07:45:49 +00001017 post_run (NULL, POST_RAM | post_bootmode_get(0));
wdenkfe8c2802002-11-03 00:38:21 +00001018#endif
1019
1020#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
1021 WATCHDOG_RESET ();
1022 puts ("PCMCIA:");
1023 pcmcia_init ();
1024#endif
1025
1026#if (CONFIG_COMMANDS & CFG_CMD_IDE)
1027 WATCHDOG_RESET ();
1028# ifdef CONFIG_IDE_8xx_PCCARD
1029 puts ("PCMCIA:");
1030# else
1031 puts ("IDE: ");
1032#endif
1033 ide_init ();
1034#endif /* CFG_CMD_IDE */
1035
1036#ifdef CONFIG_LAST_STAGE_INIT
1037 WATCHDOG_RESET ();
1038 /*
1039 * Some parts can be only initialized if all others (like
1040 * Interrupts) are up and running (i.e. the PC-style ISA
1041 * keyboard).
1042 */
1043 last_stage_init ();
1044#endif
1045
1046#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
1047 WATCHDOG_RESET ();
1048 bedbug_init ();
1049#endif
1050
wdenk228f29a2002-12-08 09:53:23 +00001051#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
wdenkfe8c2802002-11-03 00:38:21 +00001052 /*
1053 * Export available size of memory for Linux,
1054 * taking into account the protected RAM at top of memory
1055 */
1056 {
1057 ulong pram;
wdenkfe8c2802002-11-03 00:38:21 +00001058 uchar memsz[32];
wdenk228f29a2002-12-08 09:53:23 +00001059#ifdef CONFIG_PRAM
1060 char *s;
wdenkfe8c2802002-11-03 00:38:21 +00001061
1062 if ((s = getenv ("pram")) != NULL) {
1063 pram = simple_strtoul (s, NULL, 10);
1064 } else {
1065 pram = CONFIG_PRAM;
1066 }
wdenk228f29a2002-12-08 09:53:23 +00001067#else
1068 pram=0;
1069#endif
1070#ifdef CONFIG_LOGBUFFER
1071 /* Also take the logbuffer into account (pram is in kB) */
1072 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1073#endif
Wolfgang Denk77ddac92005-10-13 16:45:02 +02001074 sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1075 setenv ("mem", (char *)memsz);
wdenkfe8c2802002-11-03 00:38:21 +00001076 }
1077#endif
1078
wdenk1c437712004-01-16 00:30:56 +00001079#ifdef CONFIG_PS2KBD
1080 puts ("PS/2: ");
1081 kbd_init();
1082#endif
1083
wdenk4532cb62003-04-27 22:52:51 +00001084#ifdef CONFIG_MODEM_SUPPORT
1085 {
1086 extern int do_mdm_init;
1087 do_mdm_init = gd->do_mdm_init;
1088 }
1089#endif
1090
wdenkfe8c2802002-11-03 00:38:21 +00001091 /* Initialization complete - start the monitor */
1092
1093 /* main_loop() can return to retry autoboot, if so just run it again. */
1094 for (;;) {
1095 WATCHDOG_RESET ();
1096 main_loop ();
1097 }
1098
1099 /* NOTREACHED - no way out of command loop except booting */
1100}
1101
1102void hang (void)
1103{
1104 puts ("### ERROR ### Please RESET the board ###\n");
wdenk63e73c92004-02-23 22:22:28 +00001105#ifdef CONFIG_SHOW_BOOT_PROGRESS
1106 show_boot_progress(-30);
1107#endif
wdenkfe8c2802002-11-03 00:38:21 +00001108 for (;;);
1109}
1110
wdenk4532cb62003-04-27 22:52:51 +00001111#ifdef CONFIG_MODEM_SUPPORT
1112/* called from main loop (common/main.c) */
Wolfgang Denk77ddac92005-10-13 16:45:02 +02001113/* 'inline' - We have to do it fast */
1114static inline void mdm_readline(char *buf, int bufsiz)
1115{
1116 char c;
1117 char *p;
1118 int n;
1119
1120 n = 0;
1121 p = buf;
1122 for(;;) {
1123 c = serial_getc();
1124
1125 /* dbg("(%c)", c); */
1126
1127 switch(c) {
1128 case '\r':
1129 break;
1130 case '\n':
1131 *p = '\0';
1132 return;
1133
1134 default:
1135 if(n++ > bufsiz) {
1136 *p = '\0';
1137 return; /* sanity check */
1138 }
1139 *p = c;
1140 p++;
1141 break;
1142 }
1143 }
1144}
1145
wdenk4532cb62003-04-27 22:52:51 +00001146extern void dbg(const char *fmt, ...);
1147int mdm_init (void)
1148{
1149 char env_str[16];
1150 char *init_str;
1151 int i;
1152 extern char console_buffer[];
wdenk4532cb62003-04-27 22:52:51 +00001153 extern void enable_putc(void);
1154 extern int hwflow_onoff(int);
1155
1156 enable_putc(); /* enable serial_putc() */
1157
1158#ifdef CONFIG_HWFLOW
1159 init_str = getenv("mdm_flow_control");
1160 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1161 hwflow_onoff (1);
1162 else
1163 hwflow_onoff(-1);
1164#endif
1165
1166 for (i = 1;;i++) {
1167 sprintf(env_str, "mdm_init%d", i);
1168 if ((init_str = getenv(env_str)) != NULL) {
1169 serial_puts(init_str);
1170 serial_puts("\n");
1171 for(;;) {
1172 mdm_readline(console_buffer, CFG_CBSIZE);
1173 dbg("ini%d: [%s]", i, console_buffer);
1174
1175 if ((strcmp(console_buffer, "OK") == 0) ||
1176 (strcmp(console_buffer, "ERROR") == 0)) {
1177 dbg("ini%d: cmd done", i);
1178 break;
1179 } else /* in case we are originating call ... */
1180 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1181 dbg("ini%d: connect", i);
1182 return 0;
1183 }
1184 }
1185 } else
1186 break; /* no init string - stop modem init */
1187
1188 udelay(100000);
1189 }
1190
1191 udelay(100000);
1192
1193 /* final stage - wait for connect */
1194 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1195 message from modem */
1196 mdm_readline(console_buffer, CFG_CBSIZE);
1197 dbg("ini_f: [%s]", console_buffer);
1198 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1199 dbg("ini_f: connected");
1200 return 0;
1201 }
1202 }
1203
1204 return 0;
1205}
1206
wdenk4532cb62003-04-27 22:52:51 +00001207#endif
1208
wdenkfe8c2802002-11-03 00:38:21 +00001209#if 0 /* We could use plain global data, but the resulting code is bigger */
1210/*
1211 * Pointer to initial global data area
1212 *
1213 * Here we initialize it.
1214 */
1215#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1216#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1217DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1218#endif /* 0 */
1219
1220/************************************************************************/