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Fabio Estevam7dd65452012-09-24 08:09:33 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
Otavio Salvador903e7792012-10-02 09:22:10 +00004 * Configuration settings for the Freescale i.MX6Q SabreAuto board.
Fabio Estevam7dd65452012-09-24 08:09:33 +00005 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevam7dd65452012-09-24 08:09:33 +00007 */
8
9#ifndef __MX6QSABREAUTO_CONFIG_H
10#define __MX6QSABREAUTO_CONFIG_H
Fabio Estevam7dd65452012-09-24 08:09:33 +000011
12#define CONFIG_MACH_TYPE 3529
13#define CONFIG_MXC_UART_BASE UART4_BASE
Otavio Salvador51535d92012-09-26 11:37:01 +000014#define CONFIG_CONSOLE_DEV "ttymxc3"
Fabio Estevam186feb02014-05-08 14:25:23 -030015#if defined CONFIG_MX6Q
Otavio Salvadorbf0c2242013-01-10 09:45:09 +000016#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb"
Fabio Estevam186feb02014-05-08 14:25:23 -030017#elif defined CONFIG_MX6DL
18#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabreauto.dtb"
19#endif
Otavio Salvador903e7792012-10-02 09:22:10 +000020#define CONFIG_MMCROOT "/dev/mmcblk0p2"
Fabio Estevam7dd65452012-09-24 08:09:33 +000021#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
22
Knut Wohlrab73448b12013-01-21 23:11:21 +000023/* USB Configs */
24#define CONFIG_CMD_USB
25#define CONFIG_USB_EHCI
26#define CONFIG_USB_EHCI_MX6
27#define CONFIG_USB_STORAGE
28#define CONFIG_USB_HOST_ETHER
29#define CONFIG_USB_ETHER_ASIX
Troy Kiskyd1a52862013-10-10 15:27:59 -070030#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
31#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
Knut Wohlrab73448b12013-01-21 23:11:21 +000032#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
33#define CONFIG_MXC_USB_FLAGS 0
34
Ye.Li8fe280f2014-10-30 18:53:49 +080035#define CONFIG_PCA953X
36#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} }
37
Pierre Aubertc1747972013-06-04 09:00:15 +020038#include "mx6sabre_common.h"
Otavio Salvador51535d92012-09-26 11:37:01 +000039
Shawn Guode7d02a2012-12-30 14:14:59 +000040#define CONFIG_SYS_FSL_USDHC_NUM 2
41#if defined(CONFIG_ENV_IS_IN_MMC)
42#define CONFIG_SYS_MMC_ENV_DEV 0
43#endif
44
Renato Frias19578162013-05-13 18:01:12 +000045/* I2C Configs */
46#define CONFIG_CMD_I2C
tremb089d032013-09-21 18:13:36 +020047#define CONFIG_SYS_I2C
48#define CONFIG_SYS_I2C_MXC
Renato Frias19578162013-05-13 18:01:12 +000049#define CONFIG_SYS_I2C_SPEED 100000
50
Ye.Li83bb3212014-11-12 14:02:05 +080051/* NAND flash command */
52#define CONFIG_CMD_NAND
53#define CONFIG_CMD_NAND_TRIMFFS
54
55/* NAND stuff */
56#define CONFIG_NAND_MXS
57#define CONFIG_SYS_MAX_NAND_DEVICE 1
58#define CONFIG_SYS_NAND_BASE 0x40000000
59#define CONFIG_SYS_NAND_5_ADDR_CYCLE
60#define CONFIG_SYS_NAND_ONFI_DETECTION
61
62/* DMA stuff, needed for GPMI/MXS NAND support */
63#define CONFIG_APBH_DMA
64#define CONFIG_APBH_DMA_BURST
65#define CONFIG_APBH_DMA_BURST8
66
Fabio Estevam7dd65452012-09-24 08:09:33 +000067#endif /* __MX6QSABREAUTO_CONFIG_H */