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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Scott McNuttc9d4f462010-03-19 19:03:28 -04002/*
3 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
4 * Scott McNutt <smcnutt@psyent.com>
Scott McNuttc9d4f462010-03-19 19:03:28 -04005 */
6
Scott McNuttc9d4f462010-03-19 19:03:28 -04007#include <common.h>
Thomas Chouda2f8382015-10-21 21:26:54 +08008#include <dm.h>
9#include <errno.h>
Marek Vasutb207d642012-09-13 16:49:51 +020010#include <serial.h>
Thomas Chou89241482015-10-31 20:53:23 +080011#include <asm/io.h>
Simon Glasscd93d622020-05-10 11:40:13 -060012#include <linux/bitops.h>
Thomas Chou89241482015-10-31 20:53:23 +080013
Thomas Chou89241482015-10-31 20:53:23 +080014/* status register */
15#define ALTERA_UART_TMT BIT(5) /* tx empty */
16#define ALTERA_UART_TRDY BIT(6) /* tx ready */
17#define ALTERA_UART_RRDY BIT(7) /* rx ready */
Scott McNuttc9d4f462010-03-19 19:03:28 -040018
Thomas Chouda2f8382015-10-21 21:26:54 +080019struct altera_uart_regs {
20 u32 rxdata; /* Rx data reg */
21 u32 txdata; /* Tx data reg */
22 u32 status; /* Status reg */
23 u32 control; /* Control reg */
24 u32 divisor; /* Baud rate divisor reg */
25 u32 endofpacket; /* End-of-packet reg */
26};
27
Simon Glass8a8d24b2020-12-03 16:55:23 -070028struct altera_uart_plat {
Thomas Chouda2f8382015-10-21 21:26:54 +080029 struct altera_uart_regs *regs;
30 unsigned int uartclk;
31};
Thomas Chou86450712014-08-25 16:50:14 +080032
Thomas Chouda2f8382015-10-21 21:26:54 +080033static int altera_uart_setbrg(struct udevice *dev, int baudrate)
Marek Vasutb207d642012-09-13 16:49:51 +020034{
Simon Glass0fd3d912020-12-22 19:30:28 -070035 struct altera_uart_plat *plat = dev_get_plat(dev);
Thomas Chouda2f8382015-10-21 21:26:54 +080036 struct altera_uart_regs *const regs = plat->regs;
37 u32 div;
38
39 div = (plat->uartclk / baudrate) - 1;
40 writel(div, &regs->divisor);
41
42 return 0;
Marek Vasutb207d642012-09-13 16:49:51 +020043}
44
Thomas Chouda2f8382015-10-21 21:26:54 +080045static int altera_uart_putc(struct udevice *dev, const char ch)
46{
Simon Glass0fd3d912020-12-22 19:30:28 -070047 struct altera_uart_plat *plat = dev_get_plat(dev);
Thomas Chouda2f8382015-10-21 21:26:54 +080048 struct altera_uart_regs *const regs = plat->regs;
49
50 if (!(readl(&regs->status) & ALTERA_UART_TRDY))
51 return -EAGAIN;
52
53 writel(ch, &regs->txdata);
54
55 return 0;
56}
57
58static int altera_uart_pending(struct udevice *dev, bool input)
59{
Simon Glass0fd3d912020-12-22 19:30:28 -070060 struct altera_uart_plat *plat = dev_get_plat(dev);
Thomas Chouda2f8382015-10-21 21:26:54 +080061 struct altera_uart_regs *const regs = plat->regs;
62 u32 st = readl(&regs->status);
63
64 if (input)
65 return st & ALTERA_UART_RRDY ? 1 : 0;
66 else
67 return !(st & ALTERA_UART_TMT);
68}
69
70static int altera_uart_getc(struct udevice *dev)
71{
Simon Glass0fd3d912020-12-22 19:30:28 -070072 struct altera_uart_plat *plat = dev_get_plat(dev);
Thomas Chouda2f8382015-10-21 21:26:54 +080073 struct altera_uart_regs *const regs = plat->regs;
74
75 if (!(readl(&regs->status) & ALTERA_UART_RRDY))
76 return -EAGAIN;
77
78 return readl(&regs->rxdata) & 0xff;
79}
80
81static int altera_uart_probe(struct udevice *dev)
Marek Vasutb207d642012-09-13 16:49:51 +020082{
83 return 0;
84}
Scott McNuttc9d4f462010-03-19 19:03:28 -040085
Simon Glassd1998a92020-12-03 16:55:21 -070086static int altera_uart_of_to_plat(struct udevice *dev)
Scott McNuttc9d4f462010-03-19 19:03:28 -040087{
Simon Glass8a8d24b2020-12-03 16:55:23 -070088 struct altera_uart_plat *plat = dev_get_plat(dev);
Scott McNuttc9d4f462010-03-19 19:03:28 -040089
Masahiro Yamada25484932020-07-17 14:36:48 +090090 plat->regs = map_physmem(dev_read_addr(dev),
Thomas Chou1ec60b92015-11-14 10:38:09 +080091 sizeof(struct altera_uart_regs),
92 MAP_NOCACHE);
Simon Goldschmidt41b22c02019-05-09 22:11:58 +020093 plat->uartclk = dev_read_u32_default(dev, "clock-frequency", 0);
Scott McNuttc9d4f462010-03-19 19:03:28 -040094
Marek Vasutb207d642012-09-13 16:49:51 +020095 return 0;
Scott McNuttc9d4f462010-03-19 19:03:28 -040096}
97
Thomas Chouda2f8382015-10-21 21:26:54 +080098static const struct dm_serial_ops altera_uart_ops = {
99 .putc = altera_uart_putc,
100 .pending = altera_uart_pending,
101 .getc = altera_uart_getc,
102 .setbrg = altera_uart_setbrg,
Marek Vasutb207d642012-09-13 16:49:51 +0200103};
104
Thomas Chouda2f8382015-10-21 21:26:54 +0800105static const struct udevice_id altera_uart_ids[] = {
Thomas Chou89241482015-10-31 20:53:23 +0800106 { .compatible = "altr,uart-1.0" },
107 {}
Thomas Chouda2f8382015-10-21 21:26:54 +0800108};
109
110U_BOOT_DRIVER(altera_uart) = {
111 .name = "altera_uart",
112 .id = UCLASS_SERIAL,
113 .of_match = altera_uart_ids,
Simon Glassd1998a92020-12-03 16:55:21 -0700114 .of_to_plat = altera_uart_of_to_plat,
Simon Glass8a8d24b2020-12-03 16:55:23 -0700115 .plat_auto = sizeof(struct altera_uart_plat),
Thomas Chouda2f8382015-10-21 21:26:54 +0800116 .probe = altera_uart_probe,
117 .ops = &altera_uart_ops,
Thomas Chouda2f8382015-10-21 21:26:54 +0800118};
119
120#ifdef CONFIG_DEBUG_UART_ALTERA_UART
121
122#include <debug_uart.h>
123
Thomas Choue03c17d2015-11-03 14:19:02 +0800124static inline void _debug_uart_init(void)
Marek Vasutb207d642012-09-13 16:49:51 +0200125{
Thomas Chouda2f8382015-10-21 21:26:54 +0800126 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
127 u32 div;
128
129 div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1;
130 writel(div, &regs->divisor);
Marek Vasutb207d642012-09-13 16:49:51 +0200131}
132
Thomas Chouda2f8382015-10-21 21:26:54 +0800133static inline void _debug_uart_putc(int ch)
Marek Vasutb207d642012-09-13 16:49:51 +0200134{
Thomas Chouda2f8382015-10-21 21:26:54 +0800135 struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE;
136
137 while (1) {
138 u32 st = readl(&regs->status);
139
140 if (st & ALTERA_UART_TRDY)
141 break;
142 }
143
144 writel(ch, &regs->txdata);
Marek Vasutb207d642012-09-13 16:49:51 +0200145}
Thomas Chouda2f8382015-10-21 21:26:54 +0800146
147DEBUG_UART_FUNCS
148
149#endif