blob: 8ceff00925fffbe54332da2b9c7b1fa6ab289598 [file] [log] [blame]
Jin Zhengxiong4782ac82006-08-23 19:10:44 +08001/*
2 * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
3 * Author: Jason Jin<Jason.jin@freescale.com>
4 * Zhang Wei<wei.zhang@freescale.com>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 *
24 * with the reference on libata and ahci drvier in kernel
25 *
26 */
27#include <common.h>
28
29#ifdef CONFIG_SCSI_AHCI
30
31#include <command.h>
32#include <pci.h>
33#include <asm/processor.h>
34#include <asm/errno.h>
35#include <asm/io.h>
36#include <malloc.h>
37#include <scsi.h>
38#include <ata.h>
39#include <linux/ctype.h>
40#include <ahci.h>
41
42struct ahci_probe_ent *probe_ent = NULL;
43hd_driveid_t *ataid[AHCI_MAX_PORTS];
44
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050045#define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
46
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080047
48static inline u32 ahci_port_base(u32 base, u32 port)
49{
50 return base + 0x100 + (port * 0x80);
51}
52
53
54static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
55 unsigned int port_idx)
56{
57 base = ahci_port_base(base, port_idx);
58
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050059 port->cmd_addr = base;
60 port->scr_addr = base + PORT_SCR;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080061}
62
63
64#define msleep(a) udelay(a * 1000)
65#define ssleep(a) msleep(a * 1000)
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050066
67static int waiting_for_cmd_completed(volatile u8 *offset,
68 int timeout_msec,
69 u32 sign)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080070{
71 int i;
72 u32 status;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050073
74 for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080075 msleep(1);
76
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050077 return (i < timeout_msec) ? 0 : -1;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080078}
79
80
81static int ahci_host_init(struct ahci_probe_ent *probe_ent)
82{
83 pci_dev_t pdev = probe_ent->dev;
84 volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
85 u32 tmp, cap_save;
86 u16 tmp16;
87 int i, j;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050088 volatile u8 *port_mmio;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080089 unsigned short vendor;
90
91 cap_save = readl(mmio + HOST_CAP);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -050092 cap_save &= ((1 << 28) | (1 << 17));
Jin Zhengxiong4782ac82006-08-23 19:10:44 +080093 cap_save |= (1 << 27);
94
95 /* global controller reset */
96 tmp = readl(mmio + HOST_CTL);
97 if ((tmp & HOST_RESET) == 0)
98 writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
99
100 /* reset must complete within 1 second, or
101 * the hardware should be considered fried.
102 */
103 ssleep(1);
104
105 tmp = readl(mmio + HOST_CTL);
106 if (tmp & HOST_RESET) {
107 debug("controller reset failed (0x%x)\n", tmp);
108 return -1;
109 }
110
111 writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
112 writel(cap_save, mmio + HOST_CAP);
113 writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
114
115 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
116
117 if (vendor == PCI_VENDOR_ID_INTEL) {
118 u16 tmp16;
119 pci_read_config_word(pdev, 0x92, &tmp16);
120 tmp16 |= 0xf;
121 pci_write_config_word(pdev, 0x92, tmp16);
122 }
123
124 probe_ent->cap = readl(mmio + HOST_CAP);
125 probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
126 probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
127
128 debug("cap 0x%x port_map 0x%x n_ports %d\n",
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500129 probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800130
131 for (i = 0; i < probe_ent->n_ports; i++) {
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500132 probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
133 port_mmio = (u8 *) probe_ent->port[i].port_mmio;
134 ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800135
136 /* make sure port is not active */
137 tmp = readl(port_mmio + PORT_CMD);
138 if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
139 PORT_CMD_FIS_RX | PORT_CMD_START)) {
140 tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
141 PORT_CMD_FIS_RX | PORT_CMD_START);
142 writel_with_flush(tmp, port_mmio + PORT_CMD);
143
144 /* spec says 500 msecs for each bit, so
145 * this is slightly incorrect.
146 */
147 msleep(500);
148 }
149
150 writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
151
152 j = 0;
153 while (j < 100) {
154 msleep(10);
155 tmp = readl(port_mmio + PORT_SCR_STAT);
156 if ((tmp & 0xf) == 0x3)
157 break;
158 j++;
159 }
160
161 tmp = readl(port_mmio + PORT_SCR_ERR);
162 debug("PORT_SCR_ERR 0x%x\n", tmp);
163 writel(tmp, port_mmio + PORT_SCR_ERR);
164
165 /* ack any pending irq events for this port */
166 tmp = readl(port_mmio + PORT_IRQ_STAT);
167 debug("PORT_IRQ_STAT 0x%x\n", tmp);
168 if (tmp)
169 writel(tmp, port_mmio + PORT_IRQ_STAT);
170
171 writel(1 << i, mmio + HOST_IRQ_STAT);
172
173 /* set irq mask (enables interrupts) */
174 writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
175
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500176 /*register linkup ports */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800177 tmp = readl(port_mmio + PORT_SCR_STAT);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500178 debug("Port %d status: 0x%x\n", i, tmp);
179 if ((tmp & 0xf) == 0x03)
180 probe_ent->link_port_map |= (0x01 << i);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800181 }
182
183 tmp = readl(mmio + HOST_CTL);
184 debug("HOST_CTL 0x%x\n", tmp);
185 writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
186 tmp = readl(mmio + HOST_CTL);
187 debug("HOST_CTL 0x%x\n", tmp);
188
189 pci_read_config_word(pdev, PCI_COMMAND, &tmp16);
190 tmp |= PCI_COMMAND_MASTER;
191 pci_write_config_word(pdev, PCI_COMMAND, tmp16);
192
193 return 0;
194}
195
196
197static void ahci_print_info(struct ahci_probe_ent *probe_ent)
198{
199 pci_dev_t pdev = probe_ent->dev;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500200 volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800201 u32 vers, cap, impl, speed;
202 const char *speed_s;
203 u16 cc;
204 const char *scc_s;
205
206 vers = readl(mmio + HOST_VERSION);
207 cap = probe_ent->cap;
208 impl = probe_ent->port_map;
209
210 speed = (cap >> 20) & 0xf;
211 if (speed == 1)
212 speed_s = "1.5";
213 else if (speed == 2)
214 speed_s = "3";
215 else
216 speed_s = "?";
217
218 pci_read_config_word(pdev, 0x0a, &cc);
219 if (cc == 0x0101)
220 scc_s = "IDE";
221 else if (cc == 0x0106)
222 scc_s = "SATA";
223 else if (cc == 0x0104)
224 scc_s = "RAID";
225 else
226 scc_s = "unknown";
227
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500228 printf("AHCI %02x%02x.%02x%02x "
229 "%u slots %u ports %s Gbps 0x%x impl %s mode\n",
230 (vers >> 24) & 0xff,
231 (vers >> 16) & 0xff,
232 (vers >> 8) & 0xff,
233 vers & 0xff,
234 ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800235
236 printf("flags: "
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500237 "%s%s%s%s%s%s"
238 "%s%s%s%s%s%s%s\n",
239 cap & (1 << 31) ? "64bit " : "",
240 cap & (1 << 30) ? "ncq " : "",
241 cap & (1 << 28) ? "ilck " : "",
242 cap & (1 << 27) ? "stag " : "",
243 cap & (1 << 26) ? "pm " : "",
244 cap & (1 << 25) ? "led " : "",
245 cap & (1 << 24) ? "clo " : "",
246 cap & (1 << 19) ? "nz " : "",
247 cap & (1 << 18) ? "only " : "",
248 cap & (1 << 17) ? "pmp " : "",
249 cap & (1 << 15) ? "pio " : "",
250 cap & (1 << 14) ? "slum " : "",
251 cap & (1 << 13) ? "part " : "");
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800252}
253
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500254static int ahci_init_one(pci_dev_t pdev)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800255{
256 u32 iobase, vendor;
257 int rc;
258
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500259 memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800260
261 probe_ent = malloc(sizeof(probe_ent));
262 memset(probe_ent, 0, sizeof(probe_ent));
263 probe_ent->dev = pdev;
264
265 pci_read_config_dword(pdev, AHCI_PCI_BAR, &iobase);
266 iobase &= ~0xf;
267
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500268 probe_ent->host_flags = ATA_FLAG_SATA
269 | ATA_FLAG_NO_LEGACY
270 | ATA_FLAG_MMIO
271 | ATA_FLAG_PIO_DMA
272 | ATA_FLAG_NO_ATAPI;
273 probe_ent->pio_mask = 0x1f;
274 probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800275
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500276 probe_ent->mmio_base = iobase;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800277
278 /* Take from kernel:
279 * JMicron-specific fixup:
280 * make sure we're in AHCI mode
281 */
282 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500283 if (vendor == 0x197b)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800284 pci_write_config_byte(pdev, 0x41, 0xa1);
285
286 /* initialize adapter */
287 rc = ahci_host_init(probe_ent);
288 if (rc)
289 goto err_out;
290
291 ahci_print_info(probe_ent);
292
293 return 0;
294
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500295 err_out:
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800296 return rc;
297}
298
299
300#define MAX_DATA_BYTE_COUNT (4*1024*1024)
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500301
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800302static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
303{
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800304 struct ahci_ioports *pp = &(probe_ent->port[port]);
305 struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
306 u32 sg_count;
307 int i;
308
309 sg_count = ((buf_len - 1) / MAX_DATA_BYTE_COUNT) + 1;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500310 if (sg_count > AHCI_MAX_SG) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800311 printf("Error:Too much sg!\n");
312 return -1;
313 }
314
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500315 for (i = 0; i < sg_count; i++) {
316 ahci_sg->addr =
317 cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800318 ahci_sg->addr_hi = 0;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500319 ahci_sg->flags_size = cpu_to_le32(0x3fffff &
320 (buf_len < MAX_DATA_BYTE_COUNT
321 ? (buf_len - 1)
322 : (MAX_DATA_BYTE_COUNT - 1)));
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800323 ahci_sg++;
324 buf_len -= MAX_DATA_BYTE_COUNT;
325 }
326
327 return sg_count;
328}
329
330
331static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
332{
333 pp->cmd_slot->opts = cpu_to_le32(opts);
334 pp->cmd_slot->status = 0;
335 pp->cmd_slot->tbl_addr = cpu_to_le32(pp->cmd_tbl & 0xffffffff);
336 pp->cmd_slot->tbl_addr_hi = 0;
337}
338
339
340static void ahci_set_feature(u8 port)
341{
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800342 struct ahci_ioports *pp = &(probe_ent->port[port]);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500343 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
344 u32 cmd_fis_len = 5; /* five dwords */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800345 u8 fis[20];
346
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500347 /*set feature */
348 memset(fis, 0, 20);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800349 fis[0] = 0x27;
350 fis[1] = 1 << 7;
351 fis[2] = ATA_CMD_SETF;
352 fis[3] = SETFEATURES_XFER;
353 fis[12] = __ilog2(probe_ent->udma_mask + 1) + 0x40 - 0x01;
354
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500355 memcpy((unsigned char *)pp->cmd_tbl, fis, 20);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800356 ahci_fill_cmd_slot(pp, cmd_fis_len);
357 writel(1, port_mmio + PORT_CMD_ISSUE);
358 readl(port_mmio + PORT_CMD_ISSUE);
359
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500360 if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800361 printf("set feature error!\n");
362 }
363}
364
365
366static int ahci_port_start(u8 port)
367{
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800368 struct ahci_ioports *pp = &(probe_ent->port[port]);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500369 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800370 u32 port_status;
371 u32 mem;
372
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500373 debug("Enter start port: %d\n", port);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800374 port_status = readl(port_mmio + PORT_SCR_STAT);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500375 debug("Port %d status: %x\n", port, port_status);
376 if ((port_status & 0xf) != 0x03) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800377 printf("No Link on this port!\n");
378 return -1;
379 }
380
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500381 mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800382 if (!mem) {
383 free(pp);
384 printf("No mem for table!\n");
385 return -ENOMEM;
386 }
387
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500388 mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
389 memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800390
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800391 /*
392 * First item in chunk of DMA memory: 32-slot command table,
393 * 32 bytes each in size
394 */
395 pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500396 debug("cmd_slot = 0x%x\n", pp->cmd_slot);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800397 mem += (AHCI_CMD_SLOT_SZ + 224);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500398
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800399 /*
400 * Second item: Received-FIS area
401 */
402 pp->rx_fis = mem;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800403 mem += AHCI_RX_FIS_SZ;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500404
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800405 /*
406 * Third item: data area for storing a single command
407 * and its scatter-gather table
408 */
409 pp->cmd_tbl = mem;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500410 debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800411
412 mem += AHCI_CMD_TBL_HDR;
413 pp->cmd_tbl_sg = (struct ahci_sg *)mem;
414
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500415 writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800416
417 writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
418
419 writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500420 PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
421 PORT_CMD_START, port_mmio + PORT_CMD);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800422
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500423 debug("Exit start port %d\n", port);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800424
425 return 0;
426}
427
428
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500429static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf,
430 int buf_len)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800431{
432
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500433 struct ahci_ioports *pp = &(probe_ent->port[port]);
434 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800435 u32 opts;
436 u32 port_status;
437 int sg_count;
438
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500439 debug("Enter get_ahci_device_data: for port %d\n", port);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800440
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500441 if (port > probe_ent->n_ports) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800442 printf("Invaild port number %d\n", port);
443 return -1;
444 }
445
446 port_status = readl(port_mmio + PORT_SCR_STAT);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500447 if ((port_status & 0xf) != 0x03) {
448 debug("No Link on port %d!\n", port);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800449 return -1;
450 }
451
452 memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
453
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500454 sg_count = ahci_fill_sg(port, buf, buf_len);
455 opts = (fis_len >> 2) | (sg_count << 16);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800456 ahci_fill_cmd_slot(pp, opts);
457
458 writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
459
460 if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
461 printf("timeout exit!\n");
462 return -1;
463 }
464 debug("get_ahci_device_data: %d byte transferred.\n",
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500465 pp->cmd_slot->status);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800466
467 return 0;
468}
469
470
471static char *ata_id_strcpy(u16 *target, u16 *src, int len)
472{
473 int i;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500474 for (i = 0; i < len / 2; i++)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800475 target[i] = le16_to_cpu(src[i]);
476 return (char *)target;
477}
478
479
480static void dump_ataid(hd_driveid_t *ataid)
481{
482 debug("(49)ataid->capability = 0x%x\n", ataid->capability);
483 debug("(53)ataid->field_valid =0x%x\n", ataid->field_valid);
484 debug("(63)ataid->dma_mword = 0x%x\n", ataid->dma_mword);
485 debug("(64)ataid->eide_pio_modes = 0x%x\n", ataid->eide_pio_modes);
486 debug("(75)ataid->queue_depth = 0x%x\n", ataid->queue_depth);
487 debug("(80)ataid->major_rev_num = 0x%x\n", ataid->major_rev_num);
488 debug("(81)ataid->minor_rev_num = 0x%x\n", ataid->minor_rev_num);
489 debug("(82)ataid->command_set_1 = 0x%x\n", ataid->command_set_1);
490 debug("(83)ataid->command_set_2 = 0x%x\n", ataid->command_set_2);
491 debug("(84)ataid->cfsse = 0x%x\n", ataid->cfsse);
492 debug("(85)ataid->cfs_enable_1 = 0x%x\n", ataid->cfs_enable_1);
493 debug("(86)ataid->cfs_enable_2 = 0x%x\n", ataid->cfs_enable_2);
494 debug("(87)ataid->csf_default = 0x%x\n", ataid->csf_default);
495 debug("(88)ataid->dma_ultra = 0x%x\n", ataid->dma_ultra);
496 debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
497}
498
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500499
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800500/*
501 * SCSI INQUIRY command operation.
502 */
503static int ata_scsiop_inquiry(ccb *pccb)
504{
505 u8 hdr[] = {
506 0,
507 0,
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500508 0x5, /* claim SPC-3 version compatibility */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800509 2,
510 95 - 4,
511 };
512 u8 fis[20];
513 u8 *tmpid;
514 u8 port;
515
516 /* Clean ccb data buffer */
517 memset(pccb->pdata, 0, pccb->datalen);
518
519 memcpy(pccb->pdata, hdr, sizeof(hdr));
520
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500521 if (pccb->datalen <= 35)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800522 return 0;
523
524 memset(fis, 0, 20);
525 /* Construct the FIS */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500526 fis[0] = 0x27; /* Host to device FIS. */
527 fis[1] = 1 << 7; /* Command FIS. */
528 fis[2] = ATA_CMD_IDENT; /* Command byte. */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800529
530 /* Read id from sata */
531 port = pccb->target;
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500532 if (!(tmpid = malloc(sizeof(hd_driveid_t))))
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800533 return -ENOMEM;
534
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500535 if (get_ahci_device_data(port, (u8 *) & fis, 20,
536 tmpid, sizeof(hd_driveid_t))) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800537 debug("scsi_ahci: SCSI inquiry command failure.\n");
538 return -EIO;
539 }
540
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500541 if (ataid[port])
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800542 free(ataid[port]);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500543 ataid[port] = (hd_driveid_t *) tmpid;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800544
545 memcpy(&pccb->pdata[8], "ATA ", 8);
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500546 ata_id_strcpy((u16 *) &pccb->pdata[16], (u16 *)ataid[port]->model, 16);
547 ata_id_strcpy((u16 *) &pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800548
549 dump_ataid(ataid[port]);
550 return 0;
551}
552
553
554/*
555 * SCSI READ10 command operation.
556 */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500557static int ata_scsiop_read10(ccb * pccb)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800558{
559 u64 lba = 0;
560 u32 len = 0;
561 u8 fis[20];
562
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500563 lba = (((u64) pccb->cmd[2]) << 24) | (((u64) pccb->cmd[3]) << 16)
564 | (((u64) pccb->cmd[4]) << 8) | ((u64) pccb->cmd[5]);
565 len = (((u32) pccb->cmd[7]) << 8) | ((u32) pccb->cmd[8]);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800566
567 /* For 10-byte and 16-byte SCSI R/W commands, transfer
568 * length 0 means transfer 0 block of data.
569 * However, for ATA R/W commands, sector count 0 means
570 * 256 or 65536 sectors, not 0 sectors as in SCSI.
571 *
572 * WARNING: one or two older ATA drives treat 0 as 0...
573 */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500574 if (!len)
575 return 0;
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800576 memset(fis, 0, 20);
577
578 /* Construct the FIS */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500579 fis[0] = 0x27; /* Host to device FIS. */
580 fis[1] = 1 << 7; /* Command FIS. */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800581 fis[2] = ATA_CMD_RD_DMA; /* Command byte. */
582
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500583 /* LBA address, only support LBA28 in this driver */
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800584 fis[4] = pccb->cmd[5];
585 fis[5] = pccb->cmd[4];
586 fis[6] = pccb->cmd[3];
587 fis[7] = (pccb->cmd[2] & 0x0f) | 0xe0;
588
589 /* Sector Count */
590 fis[12] = pccb->cmd[8];
591 fis[13] = pccb->cmd[7];
592
593 /* Read from ahci */
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500594 if (get_ahci_device_data(pccb->target, (u8 *) & fis, 20,
595 pccb->pdata, pccb->datalen)) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800596 debug("scsi_ahci: SCSI READ10 command failure.\n");
597 return -EIO;
598 }
599
600 return 0;
601}
602
603
604/*
605 * SCSI READ CAPACITY10 command operation.
606 */
607static int ata_scsiop_read_capacity10(ccb *pccb)
608{
609 u8 buf[8];
610
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500611 if (!ataid[pccb->target]) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800612 printf("scsi_ahci: SCSI READ CAPACITY10 command failure. "
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500613 "\tNo ATA info!\n"
614 "\tPlease run SCSI commmand INQUIRY firstly!\n");
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800615 return -EPERM;
616 }
617
618 memset(buf, 0, 8);
619
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500620 *(u32 *) buf = le32_to_cpu(ataid[pccb->target]->lba_capacity);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800621
622 buf[6] = 512 >> 8;
623 buf[7] = 512 & 0xff;
624
625 memcpy(pccb->pdata, buf, 8);
626
627 return 0;
628}
629
630
631/*
632 * SCSI TEST UNIT READY command operation.
633 */
634static int ata_scsiop_test_unit_ready(ccb *pccb)
635{
636 return (ataid[pccb->target]) ? 0 : -EPERM;
637}
638
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500639
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800640int scsi_exec(ccb *pccb)
641{
642 int ret;
643
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500644 switch (pccb->cmd[0]) {
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800645 case SCSI_READ10:
646 ret = ata_scsiop_read10(pccb);
647 break;
648 case SCSI_RD_CAPAC:
649 ret = ata_scsiop_read_capacity10(pccb);
650 break;
651 case SCSI_TST_U_RDY:
652 ret = ata_scsiop_test_unit_ready(pccb);
653 break;
654 case SCSI_INQUIRY:
655 ret = ata_scsiop_inquiry(pccb);
656 break;
657 default:
658 printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]);
659 return FALSE;
660 }
661
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500662 if (ret) {
663 debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800664 return FALSE;
665 }
666 return TRUE;
667
668}
669
670
671void scsi_low_level_init(int busdevfunc)
672{
673 int i;
674 u32 linkmap;
675
676 ahci_init_one(busdevfunc);
677
678 linkmap = probe_ent->link_port_map;
679
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500680 for (i = 0; i < CFG_SCSI_MAX_SCSI_ID; i++) {
681 if (((linkmap >> i) & 0x01)) {
682 if (ahci_port_start((u8) i)) {
683 printf("Can not start port %d\n", i);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800684 continue;
685 }
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500686 ahci_set_feature((u8) i);
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800687 }
688 }
689}
690
691
692void scsi_bus_reset(void)
693{
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500694 /*Not implement*/
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800695}
696
697
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500698void scsi_print_error(ccb * pccb)
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800699{
Jon Loeliger4a7cc0f2006-08-23 11:04:43 -0500700 /*The ahci error info can be read in the ahci driver*/
Jin Zhengxiong4782ac82006-08-23 19:10:44 +0800701}
702#endif