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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefano Babiceae49882011-01-20 08:05:15 +00002/*
3 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
4 *
5 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6 *
7 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
8 *
9 * Configuration for the MX35pdk Freescale board.
Stefano Babiceae49882011-01-20 08:05:15 +000010 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15#include <asm/arch/imx-regs.h>
16
17 /* High Level Configuration Options */
Stefano Babiceae49882011-01-20 08:05:15 +000018#define CONFIG_MX35
Stefano Babiceae49882011-01-20 08:05:15 +000019
Gong Qianyu18fb0e32015-10-26 19:47:42 +080020#define CONFIG_SYS_FSL_CLK
Stefano Babiceae49882011-01-20 08:05:15 +000021
22/* Set TEXT at the beginning of the NOR flash */
Stefano Babiceae49882011-01-20 08:05:15 +000023
Stefano Babiceae49882011-01-20 08:05:15 +000024#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
25#define CONFIG_REVISION_TAG
26#define CONFIG_SETUP_MEMORY_TAGS
27#define CONFIG_INITRD_TAG
28
29/*
30 * Size of malloc() pool
31 */
32#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
33
34/*
35 * Hardware drivers
36 */
tremb089d032013-09-21 18:13:36 +020037#define CONFIG_SYS_I2C
38#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020039#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
40#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070041#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Stefano Babiceae49882011-01-20 08:05:15 +000042
Stefano Babiceae49882011-01-20 08:05:15 +000043/*
44 * PMIC Configs
45 */
Łukasz Majewskibe3b51a2012-11-13 03:22:14 +000046#define CONFIG_POWER
47#define CONFIG_POWER_I2C
48#define CONFIG_POWER_FSL
Simon Glass913702c2014-05-20 06:01:34 -060049#define CONFIG_POWER_FSL_MC13892
Stefano Babiceae49882011-01-20 08:05:15 +000050#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
Fabio Estevamd28d6a92011-10-25 01:35:37 +000051#define CONFIG_RTC_MC13XXX
Stefano Babiceae49882011-01-20 08:05:15 +000052
53/*
54 * MFD MC9SDZ60
55 */
56#define CONFIG_FSL_MC9SDZ60
57#define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
58
59/*
60 * UART (console)
61 */
62#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010063#define CONFIG_MXC_UART_BASE UART1_BASE
Stefano Babiceae49882011-01-20 08:05:15 +000064
65/* allow to overwrite serial and ethaddr */
66#define CONFIG_ENV_OVERWRITE
Stefano Babiceae49882011-01-20 08:05:15 +000067
68/*
69 * Command definition
70 */
Stefano Babiceae49882011-01-20 08:05:15 +000071
Stefano Babiceae49882011-01-20 08:05:15 +000072#define CONFIG_NET_RETRY_COUNT 100
73
Stefano Babiceae49882011-01-20 08:05:15 +000074
75#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
76
77/*
78 * Ethernet on the debug board (SMC911)
79 */
Stefano Babiceae49882011-01-20 08:05:15 +000080#define CONFIG_HAS_ETH1
Stefano Babiceae49882011-01-20 08:05:15 +000081#define CONFIG_ETHPRIME
82
83/*
84 * Ethernet on SOC (FEC)
85 */
86#define CONFIG_FEC_MXC
87#define IMX_FEC_BASE FEC_BASE_ADDR
88#define CONFIG_FEC_MXC_PHYADDR 0x1F
89
Stefano Babiceae49882011-01-20 08:05:15 +000090#define CONFIG_ARP_TIMEOUT 200UL
91
92/*
93 * Miscellaneous configurable options
94 */
Stefano Babiceae49882011-01-20 08:05:15 +000095
96#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
97#define CONFIG_SYS_MEMTEST_END 0x10000
98
Stefano Babiceae49882011-01-20 08:05:15 +000099#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
100
Stefano Babiceae49882011-01-20 08:05:15 +0000101/*
102 * Physical Memory Map
103 */
Stefano Babiceae49882011-01-20 08:05:15 +0000104#define PHYS_SDRAM_1 CSD0_BASE_ADDR
105#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
Stefano Babic6b5acfc2011-08-02 14:42:36 +0200106#define PHYS_SDRAM_2 CSD1_BASE_ADDR
107#define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
Stefano Babiceae49882011-01-20 08:05:15 +0000108
109#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
110#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
111#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
112#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
113 GENERATED_GBL_DATA_SIZE)
114#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
115 CONFIG_SYS_GBL_DATA_OFFSET)
116
117/*
118 * MTD Command for mtdparts
119 */
Stefano Babiceae49882011-01-20 08:05:15 +0000120#define CONFIG_FLASH_CFI_MTD
Stefano Babiceae49882011-01-20 08:05:15 +0000121
122/*
123 * FLASH and environment organization
124 */
125#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
126#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
127#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
128/* Monitor at beginning of flash */
129#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
130#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
131
132#define CONFIG_ENV_SECT_SIZE (128 * 1024)
133#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
134
135/* Address and size of Redundant Environment Sector */
136#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
137#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
138
139#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
140 CONFIG_SYS_MONITOR_LEN)
141
Stefano Babiceae49882011-01-20 08:05:15 +0000142#if defined(CONFIG_FSL_ENV_IN_NAND)
Stefano Babiceae49882011-01-20 08:05:15 +0000143 #define CONFIG_ENV_OFFSET (1024 * 1024)
144#endif
145
146/*
147 * CFI FLASH driver setup
148 */
149#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
150#define CONFIG_FLASH_CFI_DRIVER
151
152/* A non-standard buffered write algorithm */
153#define CONFIG_FLASH_SPANSION_S29WS_N
154#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
155#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
156
157/*
158 * NAND FLASH driver setup
159 */
Stefano Babiceae49882011-01-20 08:05:15 +0000160#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
161#define CONFIG_SYS_MAX_NAND_DEVICE 1
162#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
163#define CONFIG_MXC_NAND_HWECC
164#define CONFIG_SYS_NAND_LARGEPAGE
165
Benoît Thébaudeau961a7622012-11-13 09:58:25 +0000166/* EHCI driver */
Benoît Thébaudeau961a7622012-11-13 09:58:25 +0000167#define CONFIG_EHCI_IS_TDI
168#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
169#define CONFIG_USB_EHCI_MXC
170#define CONFIG_MXC_USB_PORT 0
171#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \
172 MXC_EHCI_POWER_PINS_ENABLED | \
173 MXC_EHCI_OC_PIN_ACTIVE_LOW)
174#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
175
Stefano Babic32925392012-09-05 21:47:42 +0000176/* mmc driver */
Stefano Babic32925392012-09-05 21:47:42 +0000177#define CONFIG_SYS_FSL_ESDHC_ADDR 0
178#define CONFIG_SYS_FSL_ESDHC_NUM 1
179
Stefano Babiceae49882011-01-20 08:05:15 +0000180/*
181 * Default environment and default scripts
182 * to update uboot and load kernel
183 */
Stefano Babiceae49882011-01-20 08:05:15 +0000184
185#define CONFIG_HOSTNAME "mx35pdk"
186#define CONFIG_EXTRA_ENV_SETTINGS \
187 "netdev=eth1\0" \
188 "ethprime=smc911x\0" \
189 "nfsargs=setenv bootargs root=/dev/nfs rw " \
190 "nfsroot=${serverip}:${rootpath}\0" \
191 "ramargs=setenv bootargs root=/dev/ram rw\0" \
192 "addip_sta=setenv bootargs ${bootargs} " \
193 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
194 ":${hostname}:${netdev}:off panic=1\0" \
195 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
196 "addip=if test -n ${ipdyn};then run addip_dyn;" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200197 "else run addip_sta;fi\0" \
Stefano Babiceae49882011-01-20 08:05:15 +0000198 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
199 "addtty=setenv bootargs ${bootargs}" \
200 " console=ttymxc0,${baudrate}\0" \
201 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
202 "loadaddr=80800000\0" \
203 "kernel_addr_r=80800000\0" \
Mario Six5bc05432018-03-28 14:38:20 +0200204 "hostname=" CONFIG_HOSTNAME "\0" \
205 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
206 "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0" \
Stefano Babiceae49882011-01-20 08:05:15 +0000207 "flash_self=run ramargs addip addtty addmtd addmisc;" \
208 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
209 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
210 "bootm ${kernel_addr}\0" \
211 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
212 "run nfsargs addip addtty addmtd addmisc;" \
213 "bootm ${kernel_addr_r}\0" \
214 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
215 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
Mario Six5bc05432018-03-28 14:38:20 +0200216 "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \
Stefano Babiceae49882011-01-20 08:05:15 +0000217 "load=tftp ${loadaddr} ${u-boot}\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200218 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
Stefano Babic32925392012-09-05 21:47:42 +0000219 "update=protect off ${uboot_addr} +80000;" \
220 "erase ${uboot_addr} +80000;" \
Stefano Babiceae49882011-01-20 08:05:15 +0000221 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
222 "upd=if run load;then echo Updating u-boot;if run update;" \
223 "then echo U-Boot updated;" \
224 "else echo Error updating u-boot !;" \
225 "echo Board without bootloader !!;" \
226 "fi;" \
227 "else echo U-Boot not downloaded..exiting;fi\0" \
228 "bootcmd=run net_nfs\0"
229
230#endif /* __CONFIG_H */