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Marcel Ziswiler25ab9792022-07-21 15:27:35 +02001// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
Igor Opaniuka5de86c2020-07-15 13:31:02 +03002/*
Marcel Ziswiler25ab9792022-07-21 15:27:35 +02003 * Copyright 2020-2022 Toradex
Igor Opaniuka5de86c2020-07-15 13:31:02 +03004 */
5
Fabio Estevam45651a32023-09-12 12:11:00 -03006#include "imx7s-u-boot.dtsi"
7
Marcel Ziswiler25ab9792022-07-21 15:27:35 +02008&{/aliases} {
9 /* SDHCI instance order: eMMC, SD/MMC */
10 mmc0 = &usdhc3;
11 mmc1 = &usdhc1;
12};
13
Igor Opaniuka5de86c2020-07-15 13:31:02 +030014&lcdif {
15 status = "okay";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_lcdif_dat
18 &pinctrl_lcdif_ctrl>;
19 display = <&display0>;
Simon Glass8c103c32023-02-13 08:56:33 -070020 bootph-all;
Igor Opaniuka5de86c2020-07-15 13:31:02 +030021
22 display0: display0 {
23 bits-per-pixel = <18>;
24 bus-width = <18>;
25 status = "okay";
26
27 display-timings {
28 native-mode = <&timing_vga>;
29 timing_vga: 640x480 {
30 clock-frequency = <25175000>;
31 hactive = <640>;
32 vactive = <480>;
33 hback-porch = <40>;
34 hfront-porch = <24>;
35 vback-porch = <32>;
36 vfront-porch = <11>;
37 hsync-len = <96>;
38 vsync-len = <2>;
39
40 de-active = <1>;
41 hsync-active = <0>;
42 vsync-active = <0>;
43 pixelclk-active = <0>;
44 };
45 };
46 };
47};