blob: 4cea5bd02192aeadab215758a686bb4924418d1b [file] [log] [blame]
Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunayf8598d92018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunayf8598d92018-03-12 10:46:18 +01004 */
Patrice Chotard395f1292019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay8e194772019-06-21 15:26:40 +02007#include <bootm.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +02008#include <clk.h>
Patrick Delaunayd1a597f2019-07-30 19:16:44 +02009#include <config.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020010#include <dm.h>
Simon Glass3a7d5572019-08-01 09:46:42 -060011#include <env.h>
Simon Glassf3998fd2019-08-02 09:44:25 -060012#include <env_internal.h>
Simon Glass4d72caa2020-05-10 11:40:01 -060013#include <fdt_support.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +010014#include <g_dnl.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020015#include <generic-phy.h>
Simon Glassdb41d652019-12-28 10:45:07 -070016#include <hang.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010017#include <i2c.h>
Simon Glass52559322019-11-14 12:57:46 -070018#include <init.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010019#include <led.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060020#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -070021#include <malloc.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010022#include <misc.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020023#include <mtd_node.h>
Simon Glass90526e92020-05-10 11:39:56 -060024#include <net.h>
Patrick Delaunay53e3d522019-08-01 11:29:03 +020025#include <netdev.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020026#include <phy.h>
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +020027#include <remoteproc.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020028#include <reset.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010029#include <syscon.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010030#include <usb.h>
Patrick Delaunaydd281082019-07-30 19:16:39 +020031#include <watchdog.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020032#include <asm/io.h>
Patrick Delaunay842ebb52019-02-27 17:01:18 +010033#include <asm/gpio.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010034#include <asm/arch/stm32.h>
Patrice Chotard7f90cd62019-05-02 18:36:01 +020035#include <asm/arch/sys_proto.h>
Patrick Delaunaye81f8d12019-07-02 13:26:07 +020036#include <jffs2/load_kernel.h>
Simon Glasscd93d622020-05-10 11:40:13 -060037#include <linux/bitops.h>
Simon Glassc05ed002020-05-10 11:40:11 -060038#include <linux/delay.h>
Simon Glass61b29b82020-02-03 07:36:15 -070039#include <linux/err.h>
Patrick Delaunay5ef642c2020-04-22 14:29:16 +020040#include <linux/iopoll.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020041#include <power/regulator.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010042#include <usb/dwc2_udc.h>
Patrick Delaunayf8598d92018-03-12 10:46:18 +010043
Patrick Delaunay45459742019-02-27 17:01:24 +010044/* SYSCFG registers */
45#define SYSCFG_BOOTR 0x00
46#define SYSCFG_PMCSETR 0x04
47#define SYSCFG_IOCTRLSETR 0x18
48#define SYSCFG_ICNR 0x1C
49#define SYSCFG_CMPCR 0x20
50#define SYSCFG_CMPENSETR 0x24
51#define SYSCFG_PMCCLRR 0x44
52
53#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
54#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
55
56#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
57#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
58#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
59#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
60#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
61
62#define SYSCFG_CMPCR_SW_CTRL BIT(1)
63#define SYSCFG_CMPCR_READY BIT(8)
64
65#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
66
67#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
68#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
69
70#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
71
72#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullieredacf262019-05-17 15:08:43 +020073#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
74#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
75#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay45459742019-02-27 17:01:24 +010076
Patrick Delaunayf8598d92018-03-12 10:46:18 +010077/*
78 * Get a global data pointer
79 */
80DECLARE_GLOBAL_DATA_PTR;
81
Patrice Chotard28c064e2019-04-30 18:09:38 +020082#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard395f1292019-02-12 16:50:40 +010083#define USB_WARNING_LOW_THRESHOLD_UV 660000
84#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotard28c064e2019-04-30 18:09:38 +020085#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard395f1292019-02-12 16:50:40 +010086
Patrick Delaunayd1a4b092020-05-25 12:19:46 +020087int board_early_init_f(void)
88{
89 /* nothing to do, only used in SPL */
90 return 0;
91}
92
Patrick Delaunayd461f102019-02-12 11:44:41 +010093int checkboard(void)
94{
95 int ret;
96 char *mode;
97 u32 otp;
98 struct udevice *dev;
99 const char *fdt_compat;
100 int fdt_compat_len;
101
Patrick Delaunay43df0a12020-03-18 09:22:49 +0100102 if (IS_ENABLED(CONFIG_TFABOOT))
Patrick Delaunayd461f102019-02-12 11:44:41 +0100103 mode = "trusted";
104 else
105 mode = "basic";
106
107 printf("Board: stm32mp1 in %s mode", mode);
108 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
109 &fdt_compat_len);
110 if (fdt_compat && fdt_compat_len)
111 printf(" (%s)", fdt_compat);
112 puts("\n");
113
Patrick Delaunay888dc682020-03-24 09:05:00 +0100114 /* display the STMicroelectronics board identification */
Patrick Delaunay61f6d462020-02-12 19:37:42 +0100115 if (CONFIG_IS_ENABLED(CMD_STBOARD)) {
116 ret = uclass_get_device_by_driver(UCLASS_MISC,
117 DM_GET_DRIVER(stm32mp_bsec),
118 &dev);
119 if (!ret)
120 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
121 &otp, sizeof(otp));
122 if (ret > 0 && otp)
123 printf("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
124 otp >> 16,
125 (otp >> 12) & 0xF,
126 (otp >> 4) & 0xF,
127 ((otp >> 8) & 0xF) - 1 + 'A',
128 otp & 0xF);
Patrick Delaunayd461f102019-02-12 11:44:41 +0100129 }
130
131 return 0;
132}
133
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100134static void board_key_check(void)
135{
136#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
137 ofnode node;
138 struct gpio_desc gpio;
139 enum forced_boot_mode boot_mode = BOOT_NORMAL;
140
141 node = ofnode_path("/config");
142 if (!ofnode_valid(node)) {
143 debug("%s: no /config node?\n", __func__);
144 return;
145 }
146#ifdef CONFIG_FASTBOOT
147 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
148 &gpio, GPIOD_IS_IN)) {
149 debug("%s: could not find a /config/st,fastboot-gpios\n",
150 __func__);
151 } else {
152 if (dm_gpio_get_value(&gpio)) {
153 puts("Fastboot key pressed, ");
154 boot_mode = BOOT_FASTBOOT;
155 }
156
157 dm_gpio_free(NULL, &gpio);
158 }
159#endif
160#ifdef CONFIG_CMD_STM32PROG
161 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
162 &gpio, GPIOD_IS_IN)) {
163 debug("%s: could not find a /config/st,stm32prog-gpios\n",
164 __func__);
165 } else {
166 if (dm_gpio_get_value(&gpio)) {
167 puts("STM32Programmer key pressed, ");
168 boot_mode = BOOT_STM32PROG;
169 }
170 dm_gpio_free(NULL, &gpio);
171 }
172#endif
173
174 if (boot_mode != BOOT_NORMAL) {
175 puts("entering download mode...\n");
176 clrsetbits_le32(TAMP_BOOT_CONTEXT,
177 TAMP_BOOT_FORCED_MASK,
178 boot_mode);
179 }
180#endif
181}
182
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100183#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200184
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100185/* STMicroelectronics STUSB1600 Type-C controller */
186#define STUSB1600_CC_CONNECTION_STATUS 0x0E
187
188/* STUSB1600_CC_CONNECTION_STATUS bitfields */
189#define STUSB1600_CC_ATTACH BIT(0)
190
191static int stusb1600_init(struct udevice **dev_stusb1600)
192{
193 ofnode node;
194 struct udevice *dev, *bus;
195 int ret;
196 u32 chip_addr;
197
198 *dev_stusb1600 = NULL;
199
200 /* if node stusb1600 is present, means DK1 or DK2 board */
201 node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
202 if (!ofnode_valid(node))
203 return -ENODEV;
204
205 ret = ofnode_read_u32(node, "reg", &chip_addr);
206 if (ret)
207 return -EINVAL;
208
209 ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
210 &bus);
211 if (ret) {
212 printf("bus for stusb1600 not found\n");
213 return -ENODEV;
214 }
215
216 ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
217 if (!ret)
218 *dev_stusb1600 = dev;
219
220 return ret;
221}
222
223static int stusb1600_cable_connected(struct udevice *dev)
224{
225 u8 status;
226
227 if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
228 return 0;
229
230 return status & STUSB1600_CC_ATTACH;
231}
232
233#include <usb/dwc2_udc.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100234int g_dnl_board_usb_cable_connected(void)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200235{
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100236 struct udevice *stusb1600;
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100237 struct udevice *dwc2_udc_otg;
Patrice Chotard4c834b92018-08-10 17:12:14 +0200238 int ret;
239
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100240 if (!stusb1600_init(&stusb1600))
241 return stusb1600_cable_connected(stusb1600);
242
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100243 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
244 DM_GET_DRIVER(dwc2_udc_otg),
245 &dwc2_udc_otg);
246 if (!ret)
247 debug("dwc2_udc_otg init failed\n");
Patrice Chotard4c834b92018-08-10 17:12:14 +0200248
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100249 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard4c834b92018-08-10 17:12:14 +0200250}
Patrick Delaunayfb90fcf2019-09-13 15:24:17 +0200251
252#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
253#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
254
255int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
256{
257 if (!strcmp(name, "usb_dnl_dfu"))
258 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
259 else if (!strcmp(name, "usb_dnl_fastboot"))
260 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
261 &dev->idProduct);
262 else
263 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
264
265 return 0;
266}
267
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100268#endif /* CONFIG_USB_GADGET */
Patrice Chotard4c834b92018-08-10 17:12:14 +0200269
Patrice Chotard395f1292019-02-12 16:50:40 +0100270static int get_led(struct udevice **dev, char *led_string)
271{
272 char *led_name;
273 int ret;
274
275 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
276 if (!led_name) {
277 pr_debug("%s: could not find %s config string\n",
278 __func__, led_string);
279 return -ENOENT;
280 }
281 ret = led_get_by_label(led_name, dev);
282 if (ret) {
283 debug("%s: get=%d\n", __func__, ret);
284 return ret;
285 }
286
287 return 0;
288}
289
290static int setup_led(enum led_state_t cmd)
291{
292 struct udevice *dev;
293 int ret;
294
Patrick Delaunay0c952952020-04-22 14:29:12 +0200295 if (!CONFIG_IS_ENABLED(LED))
296 return 0;
297
Patrice Chotard395f1292019-02-12 16:50:40 +0100298 ret = get_led(&dev, "u-boot,boot-led");
299 if (ret)
300 return ret;
301
302 ret = led_set_state(dev, cmd);
303 return ret;
304}
Patrick Delaunaydd281082019-07-30 19:16:39 +0200305
306static void __maybe_unused led_error_blink(u32 nb_blink)
307{
Patrick Delaunaydd281082019-07-30 19:16:39 +0200308 int ret;
309 struct udevice *led;
310 u32 i;
Patrick Delaunaydd281082019-07-30 19:16:39 +0200311
312 if (!nb_blink)
313 return;
314
Patrick Delaunay0c952952020-04-22 14:29:12 +0200315 if (CONFIG_IS_ENABLED(LED)) {
316 ret = get_led(&led, "u-boot,error-led");
317 if (!ret) {
318 /* make u-boot,error-led blinking */
319 /* if U32_MAX and 125ms interval, for 17.02 years */
320 for (i = 0; i < 2 * nb_blink; i++) {
321 led_set_state(led, LEDST_TOGGLE);
322 mdelay(125);
323 WATCHDOG_RESET();
324 }
325 led_set_state(led, LEDST_ON);
Patrick Delaunaydd281082019-07-30 19:16:39 +0200326 }
327 }
Patrick Delaunaydd281082019-07-30 19:16:39 +0200328
329 /* infinite: the boot process must be stopped */
330 if (nb_blink == U32_MAX)
331 hang();
332}
Patrice Chotard395f1292019-02-12 16:50:40 +0100333
Patrick Delaunay41542472019-07-30 19:16:43 +0200334#ifdef CONFIG_ADC
Patrice Chotard395f1292019-02-12 16:50:40 +0100335static int board_check_usb_power(void)
336{
337 struct ofnode_phandle_args adc_args;
338 struct udevice *adc;
Patrice Chotard395f1292019-02-12 16:50:40 +0100339 ofnode node;
340 unsigned int raw;
341 int max_uV = 0;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200342 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100343 int ret, uV, adc_count;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200344 u32 nb_blink;
345 u8 i;
Patrice Chotard395f1292019-02-12 16:50:40 +0100346 node = ofnode_path("/config");
347 if (!ofnode_valid(node)) {
348 debug("%s: no /config node?\n", __func__);
349 return -ENOENT;
350 }
351
352 /*
353 * Retrieve the ADC channels devices and get measurement
354 * for each of them
355 */
356 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
357 "#io-channel-cells");
358 if (adc_count < 0) {
359 if (adc_count == -ENOENT)
360 return 0;
361
362 pr_err("%s: can't find adc channel (%d)\n", __func__,
363 adc_count);
364
365 return adc_count;
366 }
367
368 for (i = 0; i < adc_count; i++) {
369 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
370 "#io-channel-cells", 0, i,
371 &adc_args)) {
372 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
373 __func__);
374 return 0;
375 }
376
377 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
378 &adc);
379
380 if (ret) {
381 pr_err("%s: Can't get adc device(%d)\n", __func__,
382 ret);
383 return ret;
384 }
385
386 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
387 &raw);
388 if (ret) {
389 pr_err("%s: single shot failed for %s[%d]!\n",
390 __func__, adc->name, adc_args.args[0]);
391 return ret;
392 }
393 /* Convert to uV */
394 if (!adc_raw_to_uV(adc, raw, &uV)) {
395 if (uV > max_uV)
396 max_uV = uV;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200397 if (uV < min_uV)
398 min_uV = uV;
Patrice Chotard395f1292019-02-12 16:50:40 +0100399 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
400 adc->name, adc_args.args[0], raw, uV);
401 } else {
402 pr_err("%s: Can't get uV value for %s[%d]\n",
403 __func__, adc->name, adc_args.args[0]);
404 }
405 }
406
407 /*
408 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
409 * board is plugged on an USB-C 3A power supply and boot process can
410 * continue.
411 */
412 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotard28c064e2019-04-30 18:09:38 +0200413 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
414 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard395f1292019-02-12 16:50:40 +0100415 return 0;
416
Patrice Chotard28c064e2019-04-30 18:09:38 +0200417 pr_err("****************************************************\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100418
Patrice Chotard28c064e2019-04-30 18:09:38 +0200419 /*
420 * If highest and lowest value are either both below
421 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
422 * means USB TYPE-C is in unattached mode, this is an issue, make
423 * u-boot,error-led blinking and stop boot process.
424 */
425 if ((max_uV > USB_LOW_THRESHOLD_UV &&
426 min_uV > USB_LOW_THRESHOLD_UV) ||
427 (max_uV <= USB_LOW_THRESHOLD_UV &&
428 min_uV <= USB_LOW_THRESHOLD_UV)) {
429 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
430 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
431 /* with 125ms interval, led will blink for 17.02 years ....*/
432 nb_blink = U32_MAX;
433 }
434
435 if (max_uV > USB_LOW_THRESHOLD_UV &&
436 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
437 min_uV <= USB_LOW_THRESHOLD_UV) {
438 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100439 nb_blink = 2;
Patrice Chotard28c064e2019-04-30 18:09:38 +0200440 }
441
442 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
443 max_uV <= USB_START_LOW_THRESHOLD_UV &&
444 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrice Chotard5eff1682020-04-30 18:41:05 +0200445 pr_err("* WARNING 1.5A power supply detected *\n");
Patrice Chotard395f1292019-02-12 16:50:40 +0100446 nb_blink = 3;
447 }
448
Patrice Chotard28c064e2019-04-30 18:09:38 +0200449 /*
450 * If highest value is above 2.15 Volts that means that the USB TypeC
451 * supplies more than 3 Amp, this is not compliant with TypeC specification
452 */
453 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
454 pr_err("* USB TYPE-C charger not compliant with *\n");
455 pr_err("* specification *\n");
456 pr_err("****************************************************\n\n");
457 /* with 125ms interval, led will blink for 17.02 years ....*/
458 nb_blink = U32_MAX;
459 } else {
460 pr_err("* Current too low, use a 3A power supply! *\n");
461 pr_err("****************************************************\n\n");
462 }
Patrice Chotard395f1292019-02-12 16:50:40 +0100463
Patrick Delaunaydd281082019-07-30 19:16:39 +0200464 led_error_blink(nb_blink);
Patrice Chotard395f1292019-02-12 16:50:40 +0100465
466 return 0;
467}
Patrick Delaunay41542472019-07-30 19:16:43 +0200468#endif /* CONFIG_ADC */
Patrice Chotard395f1292019-02-12 16:50:40 +0100469
Patrick Delaunay45459742019-02-27 17:01:24 +0100470static void sysconf_init(void)
471{
Patrick Delaunay654706b2020-04-01 09:07:33 +0200472#ifndef CONFIG_TFABOOT
Patrick Delaunay45459742019-02-27 17:01:24 +0100473 u8 *syscfg;
474#ifdef CONFIG_DM_REGULATOR
475 struct udevice *pwr_dev;
476 struct udevice *pwr_reg;
477 struct udevice *dev;
Patrick Delaunay45459742019-02-27 17:01:24 +0100478 u32 otp = 0;
479#endif
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200480 int ret;
481 u32 bootr, val;
Patrick Delaunay45459742019-02-27 17:01:24 +0100482
483 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
484
485 /* interconnect update : select master using the port 1 */
486 /* LTDC = AXI_M9 */
487 /* GPU = AXI_M8 */
488 /* today information is hardcoded in U-Boot */
489 writel(BIT(9), syscfg + SYSCFG_ICNR);
490
491 /* disable Pull-Down for boot pin connected to VDD */
492 bootr = readl(syscfg + SYSCFG_BOOTR);
493 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
494 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
495 writel(bootr, syscfg + SYSCFG_BOOTR);
496
497#ifdef CONFIG_DM_REGULATOR
498 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
499 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
500 * The customer will have to disable this for low frequencies
501 * or if AFMUX is selected but the function not used, typically for
502 * TRACE. Otherwise, impact on power consumption.
503 *
504 * WARNING:
505 * enabling High Speed mode while VDD>2.7V
506 * with the OTP product_below_2v5 (OTP 18, BIT 13)
507 * erroneously set to 1 can damage the IC!
508 * => U-Boot set the register only if VDD < 2.7V (in DT)
509 * but this value need to be consistent with board design
510 */
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200511 ret = uclass_get_device_by_driver(UCLASS_PMIC,
512 DM_GET_DRIVER(stm32mp_pwr_pmic),
513 &pwr_dev);
Patrick Delaunay45459742019-02-27 17:01:24 +0100514 if (!ret) {
515 ret = uclass_get_device_by_driver(UCLASS_MISC,
516 DM_GET_DRIVER(stm32mp_bsec),
517 &dev);
518 if (ret) {
519 pr_err("Can't find stm32mp_bsec driver\n");
520 return;
521 }
522
523 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayff6618e2019-08-02 13:08:06 +0200524 if (ret > 0)
Patrick Delaunay45459742019-02-27 17:01:24 +0100525 otp = otp & BIT(13);
526
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200527 /* get VDD = vdd-supply */
528 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay45459742019-02-27 17:01:24 +0100529 &pwr_reg);
530
531 /* check if VDD is Low Voltage */
532 if (!ret) {
533 if (regulator_get_value(pwr_reg) < 2700000) {
534 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
535 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
536 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
537 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
538 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
539 syscfg + SYSCFG_IOCTRLSETR);
540
541 if (!otp)
542 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
543 } else {
544 if (otp)
545 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
546 }
547 } else {
548 debug("VDD unknown");
549 }
550 }
551#endif
552
553 /* activate automatic I/O compensation
554 * warning: need to ensure CSI enabled and ready in clock driver
555 */
556 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
557
Patrick Delaunay5ef642c2020-04-22 14:29:16 +0200558 /* poll until ready (1s timeout) */
559 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
560 val & SYSCFG_CMPCR_READY,
561 1000000);
562 if (ret) {
563 pr_err("SYSCFG: I/O compensation failed, timeout.\n");
564 led_error_blink(10);
565 }
566
Patrick Delaunay45459742019-02-27 17:01:24 +0100567 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
568#endif
569}
570
Patrick Delaunayd573e462019-07-30 19:16:38 +0200571#ifdef CONFIG_DM_REGULATOR
572/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
573static int dk2_i2c1_fix(void)
574{
575 ofnode node;
576 struct gpio_desc hdmi, audio;
577 int ret = 0;
578
579 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
580 if (!ofnode_valid(node)) {
581 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
582 return -ENOENT;
583 }
584
585 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
586 &hdmi, GPIOD_IS_OUT)) {
587 pr_debug("%s: could not find reset-gpios\n",
588 __func__);
589 return -ENOENT;
590 }
591
592 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
593 if (!ofnode_valid(node)) {
594 pr_debug("%s: no cs42l51@4a ?\n", __func__);
595 return -ENOENT;
596 }
597
598 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
599 &audio, GPIOD_IS_OUT)) {
600 pr_debug("%s: could not find reset-gpios\n",
601 __func__);
602 return -ENOENT;
603 }
604
605 /* before power up, insure that HDMI and AUDIO IC is under reset */
606 ret = dm_gpio_set_value(&hdmi, 1);
607 if (ret) {
608 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
609 goto error;
610 }
611 ret = dm_gpio_set_value(&audio, 1);
612 if (ret) {
613 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
614 goto error;
615 }
616
617 /* power-up audio IC */
618 regulator_autoset_by_name("v1v8_audio", NULL);
619
620 /* power-up HDMI IC */
621 regulator_autoset_by_name("v1v2_hdmi", NULL);
622 regulator_autoset_by_name("v3v3_hdmi", NULL);
623
624error:
625 return ret;
626}
627
628static bool board_is_dk2(void)
629{
Patrick Delaunay84625482020-01-13 15:17:42 +0100630 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
Patrick Delaunayd573e462019-07-30 19:16:38 +0200631 of_machine_is_compatible("st,stm32mp157c-dk2"))
632 return true;
633
634 return false;
635}
636#endif
637
Patrick Delaunay055065a2020-04-22 14:29:13 +0200638static bool board_is_ev1(void)
639{
640 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
641 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
642 of_machine_is_compatible("st,stm32mp157c-ev1") ||
643 of_machine_is_compatible("st,stm32mp157d-ev1") ||
644 of_machine_is_compatible("st,stm32mp157f-ev1")))
645 return true;
646
647 return false;
648}
649
650/* touchscreen driver: only used for pincontrol configuration */
651static const struct udevice_id goodix_ids[] = {
652 { .compatible = "goodix,gt9147", },
653 { }
654};
655
656U_BOOT_DRIVER(goodix) = {
657 .name = "goodix",
658 .id = UCLASS_NOP,
659 .of_match = goodix_ids,
660};
661
662static void board_ev1_init(void)
663{
664 struct udevice *dev;
665
666 /* configure IRQ line on EV1 for touchscreen before LCD reset */
667 uclass_get_device_by_driver(UCLASS_NOP, DM_GET_DRIVER(goodix), &dev);
668}
669
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100670/* board dependent setup after realloc */
671int board_init(void)
672{
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100673 struct udevice *dev;
674
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100675 /* address of boot parameters */
676 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
677
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100678 /* probe all PINCTRL for hog */
679 for (uclass_first_device(UCLASS_PINCTRL, &dev);
680 dev;
681 uclass_next_device(&dev)) {
682 pr_debug("probe pincontrol = %s\n", dev->name);
683 }
684
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100685 board_key_check();
686
Patrick Delaunay055065a2020-04-22 14:29:13 +0200687 if (board_is_ev1())
688 board_ev1_init();
689
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200690#ifdef CONFIG_DM_REGULATOR
Patrick Delaunayd573e462019-07-30 19:16:38 +0200691 if (board_is_dk2())
692 dk2_i2c1_fix();
693
Patrick Delaunayf59ad452019-07-05 17:20:09 +0200694 regulators_enable_boot_on(_DEBUG);
695#endif
696
Patrick Delaunay45459742019-02-27 17:01:24 +0100697 sysconf_init();
698
Patrick Delaunay71ba2cb2020-04-10 19:14:01 +0200699 if (CONFIG_IS_ENABLED(LED))
Patrick Delaunay1f5118b2018-07-27 16:37:08 +0200700 led_default_state();
701
Patrick Delaunay0c952952020-04-22 14:29:12 +0200702 setup_led(LEDST_ON);
703
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100704 return 0;
705}
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100706
707int board_late_init(void)
708{
709#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
710 const void *fdt_compat;
711 int fdt_compat_len;
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200712 int ret;
713 u32 otp;
714 struct udevice *dev;
715 char buf[10];
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100716
717 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
718 &fdt_compat_len);
719 if (fdt_compat && fdt_compat_len) {
Patrick Delaunay99f67432020-04-22 14:29:14 +0200720 if (strncmp(fdt_compat, "st,", 3) != 0) {
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100721 env_set("board_name", fdt_compat);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200722 } else {
723 char dtb_name[256];
724 int buf_len = sizeof(dtb_name);
725
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100726 env_set("board_name", fdt_compat + 3);
Patrick Delaunay99f67432020-04-22 14:29:14 +0200727
728 strncpy(dtb_name, fdt_compat + 3, buf_len);
729 buf_len -= strlen(fdt_compat + 3);
730 strncat(dtb_name, ".dtb", buf_len);
731 env_set("fdtfile", dtb_name);
732 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100733 }
Patrick Delaunay8b8b3d62019-07-30 19:16:37 +0200734 ret = uclass_get_device_by_driver(UCLASS_MISC,
735 DM_GET_DRIVER(stm32mp_bsec),
736 &dev);
737
738 if (!ret)
739 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
740 &otp, sizeof(otp));
741 if (!ret && otp) {
742 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
743 env_set("board_id", buf);
744
745 snprintf(buf, sizeof(buf), "0x%04x",
746 ((otp >> 8) & 0xF) - 1 + 0xA);
747 env_set("board_rev", buf);
748 }
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100749#endif
750
Patrick Delaunay41542472019-07-30 19:16:43 +0200751#ifdef CONFIG_ADC
Patrice Chotard395f1292019-02-12 16:50:40 +0100752 /* for DK1/DK2 boards */
753 board_check_usb_power();
Patrick Delaunay41542472019-07-30 19:16:43 +0200754#endif /* CONFIG_ADC */
Patrice Chotard395f1292019-02-12 16:50:40 +0100755
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100756 return 0;
757}
Patrice Chotard395f1292019-02-12 16:50:40 +0100758
759void board_quiesce_devices(void)
760{
761 setup_led(LEDST_OFF);
762}
Patrice Chotard87471642019-05-02 18:07:14 +0200763
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200764/* eth init function : weak called in eqos driver */
765int board_interface_eth_init(struct udevice *dev,
766 phy_interface_t interface_type)
Christophe Roullieredacf262019-05-17 15:08:43 +0200767{
768 u8 *syscfg;
769 u32 value;
Patrick Delaunay53e3d522019-08-01 11:29:03 +0200770 bool eth_clk_sel_reg = false;
771 bool eth_ref_clk_sel_reg = false;
772
773 /* Gigabit Ethernet 125MHz clock selection. */
774 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
775
776 /* Ethernet 50Mhz RMII clock selection */
777 eth_ref_clk_sel_reg =
778 dev_read_bool(dev, "st,eth_ref_clk_sel");
Christophe Roullieredacf262019-05-17 15:08:43 +0200779
780 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
781
782 if (!syscfg)
783 return -ENODEV;
784
785 switch (interface_type) {
786 case PHY_INTERFACE_MODE_MII:
787 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
788 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
789 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
790 break;
791 case PHY_INTERFACE_MODE_GMII:
792 if (eth_clk_sel_reg)
793 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
794 SYSCFG_PMCSETR_ETH_CLK_SEL;
795 else
796 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
797 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
798 break;
799 case PHY_INTERFACE_MODE_RMII:
800 if (eth_ref_clk_sel_reg)
801 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
802 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
803 else
804 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
805 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
806 break;
807 case PHY_INTERFACE_MODE_RGMII:
808 case PHY_INTERFACE_MODE_RGMII_ID:
809 case PHY_INTERFACE_MODE_RGMII_RXID:
810 case PHY_INTERFACE_MODE_RGMII_TXID:
811 if (eth_clk_sel_reg)
812 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
813 SYSCFG_PMCSETR_ETH_CLK_SEL;
814 else
815 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
816 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
817 break;
818 default:
819 debug("%s: Do not manage %d interface\n",
820 __func__, interface_type);
821 /* Do not manage others interfaces */
822 return -EINVAL;
823 }
824
825 /* clear and set ETH configuration bits */
826 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
827 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
828 syscfg + SYSCFG_PMCCLRR);
829 writel(value, syscfg + SYSCFG_PMCSETR);
830
831 return 0;
832}
833
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200834enum env_location env_get_location(enum env_operation op, int prio)
835{
836 u32 bootmode = get_bootmode();
837
838 if (prio)
839 return ENVL_UNKNOWN;
840
841 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
842#ifdef CONFIG_ENV_IS_IN_EXT4
843 case BOOT_FLASH_SD:
844 case BOOT_FLASH_EMMC:
845 return ENVL_EXT4;
846#endif
847#ifdef CONFIG_ENV_IS_IN_UBI
848 case BOOT_FLASH_NAND:
Patrick Delaunayb664a742020-03-18 09:22:52 +0100849 case BOOT_FLASH_SPINAND:
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200850 return ENVL_UBI;
851#endif
Patrice Chotarde5c38fd2019-05-09 14:25:36 +0200852#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
853 case BOOT_FLASH_NOR:
854 return ENVL_SPI_FLASH;
855#endif
Patrice Chotard8f24b1a2019-05-02 18:28:05 +0200856 default:
857 return ENVL_NOWHERE;
858 }
859}
860
Patrice Chotard7f90cd62019-05-02 18:36:01 +0200861#if defined(CONFIG_ENV_IS_IN_EXT4)
862const char *env_ext4_get_intf(void)
863{
864 u32 bootmode = get_bootmode();
865
866 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
867 case BOOT_FLASH_SD:
868 case BOOT_FLASH_EMMC:
869 return "mmc";
870 default:
871 return "";
872 }
873}
874
875const char *env_ext4_get_dev_part(void)
876{
877 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
878 u32 bootmode = get_bootmode();
879
880 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
881}
882#endif
883
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200884#if defined(CONFIG_OF_BOARD_SETUP)
885int ft_board_setup(void *blob, bd_t *bd)
886{
887#ifdef CONFIG_FDT_FIXUP_PARTITIONS
888 struct node_info nodes[] = {
889 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
Patrick Delaunayb664a742020-03-18 09:22:52 +0100890 { "st,stm32f469-qspi", MTD_DEV_TYPE_SPINAND},
Patrick Delaunaye81f8d12019-07-02 13:26:07 +0200891 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
892 };
893 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
894#endif
895
896 return 0;
897}
898#endif
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200899
900static void board_copro_image_process(ulong fw_image, size_t fw_size)
901{
902 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
903
904 if (!rproc_is_initialized())
905 if (rproc_init()) {
906 printf("Remote Processor %d initialization failed\n",
907 id);
908 return;
909 }
910
911 ret = rproc_load(id, fw_image, fw_size);
912 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
913 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
914
Fabien Dessenne790d5b32019-10-30 14:38:32 +0100915 if (!ret)
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200916 rproc_start(id);
Patrick Delaunaya68ae8d2019-08-02 15:07:20 +0200917}
918
919U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);