blob: acb59f24cc6a3d089d739e96de3e62b64d800714 [file] [log] [blame]
Patrick Delaunaya6743132018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunaya6743132018-07-09 15:17:19 +02008#include "stm32mp157c.dtsi"
Patrick Delaunayfe915332019-07-30 19:16:12 +02009#include "stm32mp157xaa-pinctrl.dtsi"
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010010#include <dt-bindings/gpio/gpio.h>
Patrick Delaunayd46c22b2019-02-04 11:26:16 +010011#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010012
13/ {
Patrick Delaunaya6743132018-07-09 15:17:19 +020014 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010015 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
16
17 chosen {
Patrice Chotard23661602019-02-12 16:50:38 +010018 stdout-path = "serial0:115200n8";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010019 };
20
Patrick Delaunaya6743132018-07-09 15:17:19 +020021 memory@c0000000 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +020022 device_type = "memory";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010023 reg = <0xC0000000 0x40000000>;
24 };
Patrice Chotard21299d32018-04-26 17:13:11 +020025
Patrick Delaunayfe915332019-07-30 19:16:12 +020026 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 ranges;
30
Patrick Delaunay62d620c2019-11-06 16:16:33 +010031 mcuram2: mcuram2@10000000 {
32 compatible = "shared-dma-pool";
33 reg = <0x10000000 0x40000>;
34 no-map;
35 };
36
37 vdev0vring0: vdev0vring0@10040000 {
38 compatible = "shared-dma-pool";
39 reg = <0x10040000 0x1000>;
40 no-map;
41 };
42
43 vdev0vring1: vdev0vring1@10041000 {
44 compatible = "shared-dma-pool";
45 reg = <0x10041000 0x1000>;
46 no-map;
47 };
48
49 vdev0buffer: vdev0buffer@10042000 {
50 compatible = "shared-dma-pool";
51 reg = <0x10042000 0x4000>;
52 no-map;
53 };
54
55 mcuram: mcuram@30000000 {
56 compatible = "shared-dma-pool";
57 reg = <0x30000000 0x40000>;
58 no-map;
59 };
60
61 retram: retram@38000000 {
62 compatible = "shared-dma-pool";
63 reg = <0x38000000 0x10000>;
64 no-map;
65 };
66
Patrick Delaunayfe915332019-07-30 19:16:12 +020067 gpu_reserved: gpu@e8000000 {
68 reg = <0xe8000000 0x8000000>;
69 no-map;
70 };
71 };
72
Patrice Chotard23661602019-02-12 16:50:38 +010073 aliases {
74 serial0 = &uart4;
75 };
76
Patrice Chotard21299d32018-04-26 17:13:11 +020077 sd_switch: regulator-sd_switch {
78 compatible = "regulator-gpio";
79 regulator-name = "sd_switch";
80 regulator-min-microvolt = <1800000>;
81 regulator-max-microvolt = <2900000>;
82 regulator-type = "voltage";
83 regulator-always-on;
84
85 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
86 gpios-states = <0>;
87 states = <1800000 0x1 2900000 0x0>;
88 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010089};
90
Patrick Delaunay35a54d42019-07-11 11:15:28 +020091&dts {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010092 status = "okay";
93};
94
Patrick Delaunayfe915332019-07-30 19:16:12 +020095&gpu {
96 contiguous-area = <&gpu_reserved>;
97 status = "okay";
98};
99
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100100&i2c4 {
101 pinctrl-names = "default";
102 pinctrl-0 = <&i2c4_pins_a>;
103 i2c-scl-rising-time-ns = <185>;
104 i2c-scl-falling-time-ns = <20>;
105 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200106 /* spare dmas for other usage */
107 /delete-property/dmas;
108 /delete-property/dma-names;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100109
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200110 pmic: stpmic@33 {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100111 compatible = "st,stpmic1";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100112 reg = <0x33>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200113 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100114 interrupt-controller;
115 #interrupt-cells = <2>;
116 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +0200117
Patrice Chotard21299d32018-04-26 17:13:11 +0200118 regulators {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +0100119 compatible = "st,stpmic1-regulators";
Patrice Chotard21299d32018-04-26 17:13:11 +0200120 ldo1-supply = <&v3v3>;
121 ldo2-supply = <&v3v3>;
122 ldo3-supply = <&vdd_ddr>;
123 ldo5-supply = <&v3v3>;
124 ldo6-supply = <&v3v3>;
125 pwr_sw1-supply = <&bst_out>;
126 pwr_sw2-supply = <&bst_out>;
127
128 vddcore: buck1 {
129 regulator-name = "vddcore";
130 regulator-min-microvolt = <800000>;
131 regulator-max-microvolt = <1350000>;
132 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200133 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200134 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200135 };
136
137 vdd_ddr: buck2 {
138 regulator-name = "vdd_ddr";
139 regulator-min-microvolt = <1350000>;
140 regulator-max-microvolt = <1350000>;
141 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200142 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200143 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200144 };
145
146 vdd: buck3 {
147 regulator-name = "vdd";
148 regulator-min-microvolt = <3300000>;
149 regulator-max-microvolt = <3300000>;
150 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200151 st,mask-reset;
152 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200153 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200154 };
155
156 v3v3: buck4 {
157 regulator-name = "v3v3";
158 regulator-min-microvolt = <3300000>;
159 regulator-max-microvolt = <3300000>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200160 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200161 regulator-over-current-protection;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200162 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200163 };
164
165 vdda: ldo1 {
166 regulator-name = "vdda";
167 regulator-min-microvolt = <2900000>;
168 regulator-max-microvolt = <2900000>;
169 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200170 };
171
172 v2v8: ldo2 {
173 regulator-name = "v2v8";
174 regulator-min-microvolt = <2800000>;
175 regulator-max-microvolt = <2800000>;
176 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200177 };
178
179 vtt_ddr: ldo3 {
180 regulator-name = "vtt_ddr";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200181 regulator-min-microvolt = <500000>;
182 regulator-max-microvolt = <750000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200183 regulator-always-on;
184 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200185 };
186
187 vdd_usb: ldo4 {
188 regulator-name = "vdd_usb";
189 regulator-min-microvolt = <3300000>;
190 regulator-max-microvolt = <3300000>;
191 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200192 };
193
194 vdd_sd: ldo5 {
195 regulator-name = "vdd_sd";
196 regulator-min-microvolt = <2900000>;
197 regulator-max-microvolt = <2900000>;
198 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200199 regulator-boot-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200200 };
201
202 v1v8: ldo6 {
203 regulator-name = "v1v8";
204 regulator-min-microvolt = <1800000>;
205 regulator-max-microvolt = <1800000>;
206 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200207 };
208
209 vref_ddr: vref_ddr {
210 regulator-name = "vref_ddr";
211 regulator-always-on;
212 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200213 };
214
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100215 bst_out: boost {
Patrice Chotard21299d32018-04-26 17:13:11 +0200216 regulator-name = "bst_out";
217 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100218 };
Patrice Chotard21299d32018-04-26 17:13:11 +0200219
220 vbus_otg: pwr_sw1 {
221 regulator-name = "vbus_otg";
222 interrupts = <IT_OCP_OTG 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200223 };
224
225 vbus_sw: pwr_sw2 {
226 regulator-name = "vbus_sw";
227 interrupts = <IT_OCP_SWOUT 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200228 regulator-active-discharge;
229 };
230 };
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200231
232 onkey {
233 compatible = "st,stpmic1-onkey";
234 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
235 interrupt-names = "onkey-falling", "onkey-rising";
236 power-off-time-sec = <10>;
237 status = "okay";
238 };
239
240 watchdog {
241 compatible = "st,stpmic1-wdt";
242 status = "disabled";
243 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100244 };
245};
246
Fabien Dessenne1958dae2019-05-14 11:20:37 +0200247&ipcc {
248 status = "okay";
249};
250
Patrice Chotard23661602019-02-12 16:50:38 +0100251&iwdg2 {
252 timeout-sec = <32>;
253 status = "okay";
254};
255
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200256&m4_rproc {
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100257 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
258 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200259 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
260 mbox-names = "vq0", "vq1", "shutdown";
Patrick Delaunay62d620c2019-11-06 16:16:33 +0100261 interrupt-parent = <&exti>;
262 interrupts = <68 1>;
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200263 status = "okay";
264};
265
Patrick Delaunay7915b992020-01-28 10:10:59 +0100266&pwr_regulators {
267 vdd-supply = <&vdd>;
268 vdd_3v3_usbfs-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200269};
270
Patrice Chotard23661602019-02-12 16:50:38 +0100271&rng1 {
272 status = "okay";
273};
274
275&rtc {
276 status = "okay";
277};
278
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100279&sdmmc1 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200280 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100281 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200282 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
283 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100284 broken-cd;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100285 st,sig-dir;
286 st,neg-edge;
287 st,use-ckin;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100288 bus-width = <4>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200289 vmmc-supply = <&vdd_sd>;
290 vqmmc-supply = <&sd_switch>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100291 status = "okay";
292};
293
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100294&sdmmc2 {
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100295 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100296 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100297 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
298 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100299 non-removable;
300 no-sd;
301 no-sdio;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100302 st,neg-edge;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100303 bus-width = <8>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200304 vmmc-supply = <&v3v3>;
Patrick Delaunay4d7d0e22019-11-06 16:16:34 +0100305 vqmmc-supply = <&v3v3>;
306 mmc-ddr-3_3v;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100307 status = "okay";
308};
309
Patrice Chotard23661602019-02-12 16:50:38 +0100310&timers6 {
311 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200312 /* spare dmas for other usage */
313 /delete-property/dmas;
314 /delete-property/dma-names;
Patrice Chotard23661602019-02-12 16:50:38 +0100315 timer@5 {
316 status = "okay";
317 };
318};
319
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100320&uart4 {
321 pinctrl-names = "default";
322 pinctrl-0 = <&uart4_pins_a>;
323 status = "okay";
324};
Patrick Delaunaya6743132018-07-09 15:17:19 +0200325
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200326&usbotg_hs {
327 vbus-supply = <&vbus_otg>;
328};
329
Patrick Delaunaya6743132018-07-09 15:17:19 +0200330&usbphyc_port0 {
331 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200332};
333
334&usbphyc_port1 {
335 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200336};