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Patrick Delaunaya6743132018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay3d2d1152018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunaya6743132018-07-09 15:17:19 +02008#include "stm32mp157c.dtsi"
Patrick Delaunayfe915332019-07-30 19:16:12 +02009#include "stm32mp157xaa-pinctrl.dtsi"
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010010#include <dt-bindings/gpio/gpio.h>
Patrick Delaunayd46c22b2019-02-04 11:26:16 +010011#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010012
13/ {
Patrick Delaunaya6743132018-07-09 15:17:19 +020014 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010015 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
16
17 chosen {
Patrice Chotard23661602019-02-12 16:50:38 +010018 stdout-path = "serial0:115200n8";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010019 };
20
Patrick Delaunaya6743132018-07-09 15:17:19 +020021 memory@c0000000 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +020022 device_type = "memory";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010023 reg = <0xC0000000 0x40000000>;
24 };
Patrice Chotard21299d32018-04-26 17:13:11 +020025
Patrick Delaunayfe915332019-07-30 19:16:12 +020026 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
29 ranges;
30
31 gpu_reserved: gpu@e8000000 {
32 reg = <0xe8000000 0x8000000>;
33 no-map;
34 };
35 };
36
Patrice Chotard23661602019-02-12 16:50:38 +010037 aliases {
38 serial0 = &uart4;
39 };
40
Patrice Chotard21299d32018-04-26 17:13:11 +020041 sd_switch: regulator-sd_switch {
42 compatible = "regulator-gpio";
43 regulator-name = "sd_switch";
44 regulator-min-microvolt = <1800000>;
45 regulator-max-microvolt = <2900000>;
46 regulator-type = "voltage";
47 regulator-always-on;
48
49 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
50 gpios-states = <0>;
51 states = <1800000 0x1 2900000 0x0>;
52 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010053};
54
Patrick Delaunay35a54d42019-07-11 11:15:28 +020055&dts {
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010056 status = "okay";
57};
58
Patrick Delaunayfe915332019-07-30 19:16:12 +020059&gpu {
60 contiguous-area = <&gpu_reserved>;
61 status = "okay";
62};
63
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010064&i2c4 {
65 pinctrl-names = "default";
66 pinctrl-0 = <&i2c4_pins_a>;
67 i2c-scl-rising-time-ns = <185>;
68 i2c-scl-falling-time-ns = <20>;
69 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +020070 /* spare dmas for other usage */
71 /delete-property/dmas;
72 /delete-property/dma-names;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010073
Patrick Delaunay35a54d42019-07-11 11:15:28 +020074 pmic: stpmic@33 {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +010075 compatible = "st,stpmic1";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010076 reg = <0x33>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +020077 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +010078 interrupt-controller;
79 #interrupt-cells = <2>;
80 status = "okay";
Patrice Chotard21299d32018-04-26 17:13:11 +020081
Patrice Chotard21299d32018-04-26 17:13:11 +020082 regulators {
Patrick Delaunay42f01aa2019-02-04 11:26:17 +010083 compatible = "st,stpmic1-regulators";
Patrice Chotard21299d32018-04-26 17:13:11 +020084 ldo1-supply = <&v3v3>;
85 ldo2-supply = <&v3v3>;
86 ldo3-supply = <&vdd_ddr>;
87 ldo5-supply = <&v3v3>;
88 ldo6-supply = <&v3v3>;
89 pwr_sw1-supply = <&bst_out>;
90 pwr_sw2-supply = <&bst_out>;
91
92 vddcore: buck1 {
93 regulator-name = "vddcore";
94 regulator-min-microvolt = <800000>;
95 regulator-max-microvolt = <1350000>;
96 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +020097 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +020098 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +020099 };
100
101 vdd_ddr: buck2 {
102 regulator-name = "vdd_ddr";
103 regulator-min-microvolt = <1350000>;
104 regulator-max-microvolt = <1350000>;
105 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200106 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200107 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200108 };
109
110 vdd: buck3 {
111 regulator-name = "vdd";
112 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <3300000>;
114 regulator-always-on;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200115 st,mask-reset;
116 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200117 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200118 };
119
120 v3v3: buck4 {
121 regulator-name = "v3v3";
122 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <3300000>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200124 regulator-always-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200125 regulator-over-current-protection;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200126 regulator-initial-mode = <0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200127 };
128
129 vdda: ldo1 {
130 regulator-name = "vdda";
131 regulator-min-microvolt = <2900000>;
132 regulator-max-microvolt = <2900000>;
133 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200134 };
135
136 v2v8: ldo2 {
137 regulator-name = "v2v8";
138 regulator-min-microvolt = <2800000>;
139 regulator-max-microvolt = <2800000>;
140 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200141 };
142
143 vtt_ddr: ldo3 {
144 regulator-name = "vtt_ddr";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200145 regulator-min-microvolt = <500000>;
146 regulator-max-microvolt = <750000>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200147 regulator-always-on;
148 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200149 };
150
151 vdd_usb: ldo4 {
152 regulator-name = "vdd_usb";
153 regulator-min-microvolt = <3300000>;
154 regulator-max-microvolt = <3300000>;
155 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200156 };
157
158 vdd_sd: ldo5 {
159 regulator-name = "vdd_sd";
160 regulator-min-microvolt = <2900000>;
161 regulator-max-microvolt = <2900000>;
162 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200163 regulator-boot-on;
Patrice Chotard21299d32018-04-26 17:13:11 +0200164 };
165
166 v1v8: ldo6 {
167 regulator-name = "v1v8";
168 regulator-min-microvolt = <1800000>;
169 regulator-max-microvolt = <1800000>;
170 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200171 };
172
173 vref_ddr: vref_ddr {
174 regulator-name = "vref_ddr";
175 regulator-always-on;
176 regulator-over-current-protection;
Patrice Chotard21299d32018-04-26 17:13:11 +0200177 };
178
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100179 bst_out: boost {
Patrice Chotard21299d32018-04-26 17:13:11 +0200180 regulator-name = "bst_out";
181 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunaye07a86b2019-11-06 16:16:32 +0100182 };
Patrice Chotard21299d32018-04-26 17:13:11 +0200183
184 vbus_otg: pwr_sw1 {
185 regulator-name = "vbus_otg";
186 interrupts = <IT_OCP_OTG 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200187 };
188
189 vbus_sw: pwr_sw2 {
190 regulator-name = "vbus_sw";
191 interrupts = <IT_OCP_SWOUT 0>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200192 regulator-active-discharge;
193 };
194 };
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200195
196 onkey {
197 compatible = "st,stpmic1-onkey";
198 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
199 interrupt-names = "onkey-falling", "onkey-rising";
200 power-off-time-sec = <10>;
201 status = "okay";
202 };
203
204 watchdog {
205 compatible = "st,stpmic1-wdt";
206 status = "disabled";
207 };
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100208 };
209};
210
Fabien Dessenne1958dae2019-05-14 11:20:37 +0200211&ipcc {
212 status = "okay";
213};
214
Patrice Chotard23661602019-02-12 16:50:38 +0100215&iwdg2 {
216 timeout-sec = <32>;
217 status = "okay";
218};
219
Patrick Delaunay5d2901a2019-08-02 15:07:18 +0200220&m4_rproc {
221 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
222 mbox-names = "vq0", "vq1", "shutdown";
223 status = "okay";
224};
225
Patrick Delaunaya6743132018-07-09 15:17:19 +0200226&pwr {
Patrick Delaunay5e959ab2019-07-30 19:16:42 +0200227 pwr-regulators {
228 vdd-supply = <&vdd>;
229 vdd_3v3_usbfs-supply = <&vdd_usb>;
230 };
Patrick Delaunaya6743132018-07-09 15:17:19 +0200231};
232
Patrice Chotard23661602019-02-12 16:50:38 +0100233&rng1 {
234 status = "okay";
235};
236
237&rtc {
238 status = "okay";
239};
240
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100241&sdmmc1 {
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200242 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100243 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200244 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
245 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100246 broken-cd;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100247 st,sig-dir;
248 st,neg-edge;
249 st,use-ckin;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100250 bus-width = <4>;
Patrice Chotard21299d32018-04-26 17:13:11 +0200251 vmmc-supply = <&vdd_sd>;
252 vqmmc-supply = <&sd_switch>;
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100253 status = "okay";
254};
255
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100256&sdmmc2 {
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100257 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
258 non-removable;
259 no-sd;
260 no-sdio;
Patrice Chotardc89b87c2019-02-12 17:17:58 +0100261 st,sig-dir;
262 st,neg-edge;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100263 bus-width = <8>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200264 vmmc-supply = <&v3v3>;
265 vqmmc-supply = <&vdd>;
Patrick Delaunay0ed232b2018-03-20 10:54:52 +0100266 status = "okay";
267};
268
Patrice Chotard23661602019-02-12 16:50:38 +0100269&timers6 {
270 status = "okay";
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200271 /* spare dmas for other usage */
272 /delete-property/dmas;
273 /delete-property/dma-names;
Patrice Chotard23661602019-02-12 16:50:38 +0100274 timer@5 {
275 status = "okay";
276 };
277};
278
Patrick Delaunay3d2d1152018-03-12 10:46:17 +0100279&uart4 {
280 pinctrl-names = "default";
281 pinctrl-0 = <&uart4_pins_a>;
282 status = "okay";
283};
Patrick Delaunaya6743132018-07-09 15:17:19 +0200284
Patrick Delaunay35a54d42019-07-11 11:15:28 +0200285&usbotg_hs {
286 vbus-supply = <&vbus_otg>;
287};
288
Patrick Delaunaya6743132018-07-09 15:17:19 +0200289&usbphyc_port0 {
290 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200291};
292
293&usbphyc_port1 {
294 phy-supply = <&vdd_usb>;
Patrick Delaunaya6743132018-07-09 15:17:19 +0200295};