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wdenk149dded2003-09-10 18:20:28 +00001/*
2 * URB OHCI HCD (Host Controller Driver) for USB on the S3C2400.
3 *
4 * (C) Copyright 2003
Detlev Zundel792a09e2009-05-13 10:54:10 +02005 * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
wdenk149dded2003-09-10 18:20:28 +00006 *
wdenk9d46ea42005-03-14 23:56:42 +00007 * Note: Much of this code has been derived from Linux 2.4
8 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
9 * (C) Copyright 2000-2002 David Brownell
10 *
wdenk149dded2003-09-10 18:20:28 +000011 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 *
wdenk149dded2003-09-10 18:20:28 +000029 */
30/*
31 * IMPORTANT NOTES
Mike Frysingerc7d703f2009-01-01 18:27:27 -050032 * 1 - this driver is intended for use with USB Mass Storage Devices
wdenk149dded2003-09-10 18:20:28 +000033 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
34 */
35
36#include <common.h>
wdenka2663ea2003-12-07 18:32:37 +000037/* #include <pci.h> no PCI on the S3C24X0 */
wdenk149dded2003-09-10 18:20:28 +000038
39#ifdef CONFIG_USB_OHCI
40
wdenka2663ea2003-12-07 18:32:37 +000041#if defined(CONFIG_S3C2400)
wdenk149dded2003-09-10 18:20:28 +000042#include <s3c2400.h>
wdenka2663ea2003-12-07 18:32:37 +000043#elif defined(CONFIG_S3C2410)
44#include <s3c2410.h>
45#endif
46
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +090047#include <asm/io.h>
wdenk149dded2003-09-10 18:20:28 +000048#include <malloc.h>
49#include <usb.h>
50#include "usb_ohci.h"
51
52#define OHCI_USE_NPS /* force NoPowerSwitching mode */
53#undef OHCI_VERBOSE_DEBUG /* not always helpful */
54
55
56/* For initializing controller (mask in an HCFS mode too) */
57#define OHCI_CONTROL_INIT \
58 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
59
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +090060#define min_t(type, x, y) \
61 ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
wdenk149dded2003-09-10 18:20:28 +000062
63#undef DEBUG
64#ifdef DEBUG
65#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
66#else
67#define dbg(format, arg...) do {} while(0)
68#endif /* DEBUG */
69#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
70#undef SHOW_INFO
71#ifdef SHOW_INFO
72#define info(format, arg...) printf("INFO: " format "\n", ## arg)
73#else
74#define info(format, arg...) do {} while(0)
75#endif
76
77#define m16_swap(x) swap_16(x)
78#define m32_swap(x) swap_32(x)
79
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +090080/* global struct ohci */
81static struct ohci gohci;
wdenk149dded2003-09-10 18:20:28 +000082/* this must be aligned to a 256 byte boundary */
83struct ohci_hcca ghcca[1];
84/* a pointer to the aligned storage */
85struct ohci_hcca *phcca;
86/* this allocates EDs for all possible endpoints */
87struct ohci_device ohci_dev;
88/* urb_priv */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +090089struct urb_priv urb_priv;
dzu8a42eac2003-09-29 21:55:54 +000090/* RHSC flag */
91int got_rhsc;
92/* device which was disconnected */
93struct usb_device *devgone;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +020094/* flag guarding URB transation */
95int urb_finished = 0;
wdenk149dded2003-09-10 18:20:28 +000096
97/*-------------------------------------------------------------------------*/
98
99/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
100 * The erratum (#4) description is incorrect. AMD's workaround waits
101 * till some bits (mostly reserved) are clear; ok for all revs.
102 */
103#define OHCI_QUIRK_AMD756 0xabcd
104#define read_roothub(hc, register, mask) ({ \
105 u32 temp = readl (&hc->regs->roothub.register); \
106 if (hc->flags & OHCI_QUIRK_AMD756) \
107 while (temp & mask) \
108 temp = readl (&hc->regs->roothub.register); \
109 temp; })
110
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900111static u32 roothub_a(struct ohci *hc)
112{
113 return read_roothub(hc, a, 0xfc0fe000);
114}
115static inline u32 roothub_b(struct ohci *hc)
116{
117 return readl(&hc->regs->roothub.b);
118}
119static inline u32 roothub_status(struct ohci *hc)
120{
121 return readl(&hc->regs->roothub.status);
122}
123static u32 roothub_portstatus(struct ohci *hc, int i)
124{
125 return read_roothub(hc, portstatus[i], 0xffe0fce0);
126}
wdenk149dded2003-09-10 18:20:28 +0000127
128/* forward declaration */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900129static int hc_interrupt(void);
130static void td_submit_job(struct usb_device *dev, unsigned long pipe,
131 void *buffer, int transfer_len,
132 struct devrequest *setup, struct urb_priv *urb,
133 int interval);
wdenk149dded2003-09-10 18:20:28 +0000134
135/*-------------------------------------------------------------------------*
136 * URB support functions
137 *-------------------------------------------------------------------------*/
138
139/* free HCD-private data associated with this URB */
140
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900141static void urb_free_priv(struct urb_priv *urb)
wdenk149dded2003-09-10 18:20:28 +0000142{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900143 int i;
144 int last;
145 struct td *td;
wdenk149dded2003-09-10 18:20:28 +0000146
147 last = urb->length - 1;
148 if (last >= 0) {
149 for (i = 0; i <= last; i++) {
150 td = urb->td[i];
151 if (td) {
152 td->usb_dev = NULL;
153 urb->td[i] = NULL;
154 }
155 }
156 }
157}
158
159/*-------------------------------------------------------------------------*/
160
161#ifdef DEBUG
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900162static int sohci_get_current_frame_number(struct usb_device *dev);
wdenk149dded2003-09-10 18:20:28 +0000163
164/* debug| print the main components of an URB
165 * small: 0) header + data packets 1) just header */
166
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900167static void pkt_print(struct usb_device *dev, unsigned long pipe, void *buffer,
168 int transfer_len, struct devrequest *setup, char *str,
169 int small)
wdenk149dded2003-09-10 18:20:28 +0000170{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900171 struct urb_priv *purb = &urb_priv;
wdenk149dded2003-09-10 18:20:28 +0000172
173 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900174 str,
175 sohci_get_current_frame_number(dev),
176 usb_pipedevice(pipe),
177 usb_pipeendpoint(pipe),
178 usb_pipeout(pipe) ? 'O' : 'I',
179 usb_pipetype(pipe) < 2 ?
180 (usb_pipeint(pipe) ? "INTR" : "ISOC") :
181 (usb_pipecontrol(pipe) ? "CTRL" : "BULK"),
182 purb->actual_length, transfer_len, dev->status);
wdenk149dded2003-09-10 18:20:28 +0000183#ifdef OHCI_VERBOSE_DEBUG
184 if (!small) {
185 int i, len;
186
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900187 if (usb_pipecontrol(pipe)) {
188 printf(__FILE__ ": cmd(8):");
189 for (i = 0; i < 8; i++)
190 printf(" %02x", ((__u8 *) setup)[i]);
191 printf("\n");
wdenk149dded2003-09-10 18:20:28 +0000192 }
193 if (transfer_len > 0 && buffer) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900194 printf(__FILE__ ": data(%d/%d):",
195 purb->actual_length, transfer_len);
196 len = usb_pipeout(pipe) ?
197 transfer_len : purb->actual_length;
wdenk149dded2003-09-10 18:20:28 +0000198 for (i = 0; i < 16 && i < len; i++)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900199 printf(" %02x", ((__u8 *) buffer)[i]);
200 printf("%s\n", i < len ? "..." : "");
wdenk149dded2003-09-10 18:20:28 +0000201 }
202 }
203#endif
204}
205
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900206/* just for debugging; prints non-empty branches of the
207 int ed tree inclusive iso eds*/
208void ep_print_int_eds(struct ohci *ohci, char *str)
209{
wdenk149dded2003-09-10 18:20:28 +0000210 int i, j;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900211 __u32 *ed_p;
212 for (i = 0; i < 32; i++) {
wdenk149dded2003-09-10 18:20:28 +0000213 j = 5;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900214 ed_p = &(ohci->hcca->int_table[i]);
wdenk149dded2003-09-10 18:20:28 +0000215 if (*ed_p == 0)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900216 continue;
217 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
wdenk149dded2003-09-10 18:20:28 +0000218 while (*ed_p != 0 && j--) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900219 struct ed *ed = (struct ed *) m32_swap(ed_p);
220 printf(" ed: %4x;", ed->hwINFO);
wdenk149dded2003-09-10 18:20:28 +0000221 ed_p = &ed->hwNextED;
222 }
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900223 printf("\n");
wdenk149dded2003-09-10 18:20:28 +0000224 }
225}
226
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900227static void ohci_dump_intr_mask(char *label, __u32 mask)
wdenk149dded2003-09-10 18:20:28 +0000228{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900229 dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
230 label,
231 mask,
232 (mask & OHCI_INTR_MIE) ? " MIE" : "",
233 (mask & OHCI_INTR_OC) ? " OC" : "",
234 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
235 (mask & OHCI_INTR_FNO) ? " FNO" : "",
236 (mask & OHCI_INTR_UE) ? " UE" : "",
237 (mask & OHCI_INTR_RD) ? " RD" : "",
238 (mask & OHCI_INTR_SF) ? " SF" : "",
239 (mask & OHCI_INTR_WDH) ? " WDH" : "",
240 (mask & OHCI_INTR_SO) ? " SO" : "");
wdenk149dded2003-09-10 18:20:28 +0000241}
242
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900243static void maybe_print_eds(char *label, __u32 value)
wdenk149dded2003-09-10 18:20:28 +0000244{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900245 struct ed *edp = (struct ed *) value;
wdenk149dded2003-09-10 18:20:28 +0000246
247 if (value) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900248 dbg("%s %08x", label, value);
249 dbg("%08x", edp->hwINFO);
250 dbg("%08x", edp->hwTailP);
251 dbg("%08x", edp->hwHeadP);
252 dbg("%08x", edp->hwNextED);
wdenk149dded2003-09-10 18:20:28 +0000253 }
254}
255
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900256static char *hcfs2string(int state)
wdenk149dded2003-09-10 18:20:28 +0000257{
258 switch (state) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900259 case OHCI_USB_RESET:
260 return "reset";
261 case OHCI_USB_RESUME:
262 return "resume";
263 case OHCI_USB_OPER:
264 return "operational";
265 case OHCI_USB_SUSPEND:
266 return "suspend";
wdenk149dded2003-09-10 18:20:28 +0000267 }
268 return "?";
269}
270
271/* dump control and status registers */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900272static void ohci_dump_status(struct ohci *controller)
wdenk149dded2003-09-10 18:20:28 +0000273{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900274 struct ohci_regs *regs = controller->regs;
275 __u32 temp;
wdenk149dded2003-09-10 18:20:28 +0000276
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900277 temp = readl(&regs->revision) & 0xff;
wdenk149dded2003-09-10 18:20:28 +0000278 if (temp != 0x10)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900279 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
wdenk149dded2003-09-10 18:20:28 +0000280
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900281 temp = readl(&regs->control);
282 dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
283 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
284 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
285 (temp & OHCI_CTRL_IR) ? " IR" : "",
286 hcfs2string(temp & OHCI_CTRL_HCFS),
287 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
288 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
289 (temp & OHCI_CTRL_IE) ? " IE" : "",
290 (temp & OHCI_CTRL_PLE) ? " PLE" : "", temp & OHCI_CTRL_CBSR);
wdenk149dded2003-09-10 18:20:28 +0000291
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900292 temp = readl(&regs->cmdstatus);
293 dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
294 (temp & OHCI_SOC) >> 16,
295 (temp & OHCI_OCR) ? " OCR" : "",
296 (temp & OHCI_BLF) ? " BLF" : "",
297 (temp & OHCI_CLF) ? " CLF" : "", (temp & OHCI_HCR) ? " HCR" : "");
wdenk149dded2003-09-10 18:20:28 +0000298
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900299 ohci_dump_intr_mask("intrstatus", readl(&regs->intrstatus));
300 ohci_dump_intr_mask("intrenable", readl(&regs->intrenable));
wdenk149dded2003-09-10 18:20:28 +0000301
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900302 maybe_print_eds("ed_periodcurrent", readl(&regs->ed_periodcurrent));
wdenk149dded2003-09-10 18:20:28 +0000303
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900304 maybe_print_eds("ed_controlhead", readl(&regs->ed_controlhead));
305 maybe_print_eds("ed_controlcurrent", readl(&regs->ed_controlcurrent));
wdenk149dded2003-09-10 18:20:28 +0000306
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900307 maybe_print_eds("ed_bulkhead", readl(&regs->ed_bulkhead));
308 maybe_print_eds("ed_bulkcurrent", readl(&regs->ed_bulkcurrent));
wdenk149dded2003-09-10 18:20:28 +0000309
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900310 maybe_print_eds("donehead", readl(&regs->donehead));
wdenk149dded2003-09-10 18:20:28 +0000311}
312
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900313static void ohci_dump_roothub(struct ohci *controller, int verbose)
wdenk149dded2003-09-10 18:20:28 +0000314{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900315 __u32 temp, ndp, i;
wdenk149dded2003-09-10 18:20:28 +0000316
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900317 temp = roothub_a(controller);
wdenk149dded2003-09-10 18:20:28 +0000318 ndp = (temp & RH_A_NDP);
319
320 if (verbose) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900321 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
322 ((temp & RH_A_POTPGT) >> 24) & 0xff,
323 (temp & RH_A_NOCP) ? " NOCP" : "",
324 (temp & RH_A_OCPM) ? " OCPM" : "",
325 (temp & RH_A_DT) ? " DT" : "",
326 (temp & RH_A_NPS) ? " NPS" : "",
327 (temp & RH_A_PSM) ? " PSM" : "", ndp);
328 temp = roothub_b(controller);
329 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
330 temp, (temp & RH_B_PPCM) >> 16, (temp & RH_B_DR)
331 );
332 temp = roothub_status(controller);
333 dbg("roothub.status: %08x%s%s%s%s%s%s",
334 temp,
335 (temp & RH_HS_CRWE) ? " CRWE" : "",
336 (temp & RH_HS_OCIC) ? " OCIC" : "",
337 (temp & RH_HS_LPSC) ? " LPSC" : "",
338 (temp & RH_HS_DRWE) ? " DRWE" : "",
339 (temp & RH_HS_OCI) ? " OCI" : "",
340 (temp & RH_HS_LPS) ? " LPS" : "");
wdenk149dded2003-09-10 18:20:28 +0000341 }
342
343 for (i = 0; i < ndp; i++) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900344 temp = roothub_portstatus(controller, i);
345 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
346 i,
347 temp,
348 (temp & RH_PS_PRSC) ? " PRSC" : "",
349 (temp & RH_PS_OCIC) ? " OCIC" : "",
350 (temp & RH_PS_PSSC) ? " PSSC" : "",
351 (temp & RH_PS_PESC) ? " PESC" : "",
352 (temp & RH_PS_CSC) ? " CSC" : "",
353 (temp & RH_PS_LSDA) ? " LSDA" : "",
354 (temp & RH_PS_PPS) ? " PPS" : "",
355 (temp & RH_PS_PRS) ? " PRS" : "",
356 (temp & RH_PS_POCI) ? " POCI" : "",
357 (temp & RH_PS_PSS) ? " PSS" : "",
358 (temp & RH_PS_PES) ? " PES" : "",
359 (temp & RH_PS_CCS) ? " CCS" : "");
wdenk149dded2003-09-10 18:20:28 +0000360 }
361}
362
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900363static void ohci_dump(struct ohci *controller, int verbose)
wdenk149dded2003-09-10 18:20:28 +0000364{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900365 dbg("OHCI controller usb-%s state", controller->slot_name);
wdenk149dded2003-09-10 18:20:28 +0000366
367 /* dumps some of the state we know about */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900368 ohci_dump_status(controller);
wdenk149dded2003-09-10 18:20:28 +0000369 if (verbose)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900370 ep_print_int_eds(controller, "hcca");
371 dbg("hcca frame #%04x", controller->hcca->frame_no);
372 ohci_dump_roothub(controller, 1);
wdenk149dded2003-09-10 18:20:28 +0000373}
374
wdenk149dded2003-09-10 18:20:28 +0000375#endif /* DEBUG */
376
377/*-------------------------------------------------------------------------*
378 * Interface functions (URB)
379 *-------------------------------------------------------------------------*/
380
381/* get a transfer request */
382
383int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900384 int transfer_len, struct devrequest *setup, int interval)
wdenk149dded2003-09-10 18:20:28 +0000385{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900386 struct ohci *ohci;
387 struct ed *ed;
388 struct urb_priv *purb_priv;
wdenk149dded2003-09-10 18:20:28 +0000389 int i, size = 0;
390
391 ohci = &gohci;
392
393 /* when controller's hung, permit only roothub cleanup attempts
394 * such as powering down ports */
395 if (ohci->disabled) {
396 err("sohci_submit_job: EPIPE");
397 return -1;
398 }
399
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200400 /* if we have an unfinished URB from previous transaction let's
401 * fail and scream as quickly as possible so as not to corrupt
402 * further communication */
403 if (!urb_finished) {
404 err("sohci_submit_job: URB NOT FINISHED");
405 return -1;
406 }
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900407 /* we're about to begin a new transaction here
408 so mark the URB unfinished */
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200409 urb_finished = 0;
410
wdenk149dded2003-09-10 18:20:28 +0000411 /* every endpoint has a ed, locate and fill it */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900412 ed = ep_add_ed(dev, pipe);
413 if (!ed) {
wdenk149dded2003-09-10 18:20:28 +0000414 err("sohci_submit_job: ENOMEM");
415 return -1;
416 }
417
418 /* for the private part of the URB we need the number of TDs (size) */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900419 switch (usb_pipetype(pipe)) {
420 case PIPE_BULK:
421 /* one TD for every 4096 Byte */
422 size = (transfer_len - 1) / 4096 + 1;
423 break;
424 case PIPE_CONTROL:
425 /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
426 size = (transfer_len == 0) ? 2 : (transfer_len - 1) / 4096 + 3;
427 break;
wdenk149dded2003-09-10 18:20:28 +0000428 }
429
430 if (size >= (N_URB_TD - 1)) {
431 err("need %d TDs, only have %d", size, N_URB_TD);
432 return -1;
433 }
434 purb_priv = &urb_priv;
435 purb_priv->pipe = pipe;
436
437 /* fill the private part of the URB */
438 purb_priv->length = size;
439 purb_priv->ed = ed;
440 purb_priv->actual_length = 0;
441
442 /* allocate the TDs */
443 /* note that td[0] was allocated in ep_add_ed */
444 for (i = 0; i < size; i++) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900445 purb_priv->td[i] = td_alloc(dev);
wdenk149dded2003-09-10 18:20:28 +0000446 if (!purb_priv->td[i]) {
447 purb_priv->length = i;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900448 urb_free_priv(purb_priv);
wdenk149dded2003-09-10 18:20:28 +0000449 err("sohci_submit_job: ENOMEM");
450 return -1;
451 }
452 }
453
454 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900455 urb_free_priv(purb_priv);
wdenk149dded2003-09-10 18:20:28 +0000456 err("sohci_submit_job: EINVAL");
457 return -1;
458 }
459
460 /* link the ed into a chain if is not already */
461 if (ed->state != ED_OPER)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900462 ep_link(ohci, ed);
wdenk149dded2003-09-10 18:20:28 +0000463
464 /* fill the TDs and link it to the ed */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900465 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv,
466 interval);
wdenk149dded2003-09-10 18:20:28 +0000467
468 return 0;
469}
470
471/*-------------------------------------------------------------------------*/
472
473#ifdef DEBUG
474/* tell us the current USB frame number */
475
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900476static int sohci_get_current_frame_number(struct usb_device *usb_dev)
wdenk149dded2003-09-10 18:20:28 +0000477{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900478 struct ohci *ohci = &gohci;
wdenk149dded2003-09-10 18:20:28 +0000479
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900480 return m16_swap(ohci->hcca->frame_no);
wdenk149dded2003-09-10 18:20:28 +0000481}
482#endif
483
484/*-------------------------------------------------------------------------*
485 * ED handling functions
486 *-------------------------------------------------------------------------*/
487
488/* link an ed into one of the HC chains */
489
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900490static int ep_link(struct ohci *ohci, struct ed *edi)
wdenk149dded2003-09-10 18:20:28 +0000491{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900492 struct ed *ed = edi;
wdenk149dded2003-09-10 18:20:28 +0000493
494 ed->state = ED_OPER;
495
496 switch (ed->type) {
497 case PIPE_CONTROL:
498 ed->hwNextED = 0;
499 if (ohci->ed_controltail == NULL) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900500 writel((u32)ed, &ohci->regs->ed_controlhead);
wdenk149dded2003-09-10 18:20:28 +0000501 } else {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900502 ohci->ed_controltail->hwNextED = (__u32) m32_swap(ed);
wdenk149dded2003-09-10 18:20:28 +0000503 }
504 ed->ed_prev = ohci->ed_controltail;
505 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900506 !ohci->ed_rm_list[1] && !ohci->sleeping) {
wdenk149dded2003-09-10 18:20:28 +0000507 ohci->hc_control |= OHCI_CTRL_CLE;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900508 writel(ohci->hc_control, &ohci->regs->control);
wdenk149dded2003-09-10 18:20:28 +0000509 }
510 ohci->ed_controltail = edi;
511 break;
512
513 case PIPE_BULK:
514 ed->hwNextED = 0;
515 if (ohci->ed_bulktail == NULL) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900516 writel((u32)ed, &ohci->regs->ed_bulkhead);
wdenk149dded2003-09-10 18:20:28 +0000517 } else {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900518 ohci->ed_bulktail->hwNextED = (__u32) m32_swap(ed);
wdenk149dded2003-09-10 18:20:28 +0000519 }
520 ed->ed_prev = ohci->ed_bulktail;
521 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900522 !ohci->ed_rm_list[1] && !ohci->sleeping) {
wdenk149dded2003-09-10 18:20:28 +0000523 ohci->hc_control |= OHCI_CTRL_BLE;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900524 writel(ohci->hc_control, &ohci->regs->control);
wdenk149dded2003-09-10 18:20:28 +0000525 }
526 ohci->ed_bulktail = edi;
527 break;
528 }
529 return 0;
530}
531
532/*-------------------------------------------------------------------------*/
533
534/* unlink an ed from one of the HC chains.
535 * just the link to the ed is unlinked.
536 * the link from the ed still points to another operational ed or 0
537 * so the HC can eventually finish the processing of the unlinked ed */
538
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900539static int ep_unlink(struct ohci *ohci, struct ed *ed)
wdenk149dded2003-09-10 18:20:28 +0000540{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900541 struct ed *next;
542 ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
wdenk149dded2003-09-10 18:20:28 +0000543
544 switch (ed->type) {
545 case PIPE_CONTROL:
546 if (ed->ed_prev == NULL) {
547 if (!ed->hwNextED) {
548 ohci->hc_control &= ~OHCI_CTRL_CLE;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900549 writel(ohci->hc_control, &ohci->regs->control);
wdenk149dded2003-09-10 18:20:28 +0000550 }
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900551 writel(m32_swap(*((__u32 *) &ed->hwNextED)),
552 &ohci->regs->ed_controlhead);
wdenk149dded2003-09-10 18:20:28 +0000553 } else {
554 ed->ed_prev->hwNextED = ed->hwNextED;
555 }
556 if (ohci->ed_controltail == ed) {
557 ohci->ed_controltail = ed->ed_prev;
558 } else {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900559 next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
560 next->ed_prev = ed->ed_prev;
wdenk149dded2003-09-10 18:20:28 +0000561 }
562 break;
563
564 case PIPE_BULK:
565 if (ed->ed_prev == NULL) {
566 if (!ed->hwNextED) {
567 ohci->hc_control &= ~OHCI_CTRL_BLE;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900568 writel(ohci->hc_control, &ohci->regs->control);
wdenk149dded2003-09-10 18:20:28 +0000569 }
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900570 writel(m32_swap(*((__u32 *) &ed->hwNextED)),
571 &ohci->regs->ed_bulkhead);
wdenk149dded2003-09-10 18:20:28 +0000572 } else {
573 ed->ed_prev->hwNextED = ed->hwNextED;
574 }
575 if (ohci->ed_bulktail == ed) {
576 ohci->ed_bulktail = ed->ed_prev;
577 } else {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900578 next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
579 next->ed_prev = ed->ed_prev;
wdenk149dded2003-09-10 18:20:28 +0000580 }
581 break;
582 }
583 ed->state = ED_UNLINK;
584 return 0;
585}
586
wdenk149dded2003-09-10 18:20:28 +0000587/*-------------------------------------------------------------------------*/
588
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900589/* add/reinit an endpoint; this should be done once at the usb_set_configuration
590 * command, but the USB stack is a little bit stateless so we do it at every
591 * transaction. If the state of the ed is ED_NEW then a dummy td is added and
592 * the state is changed to ED_UNLINK. In all other cases the state is left
593 * unchanged. The ed info fields are setted anyway even though most of them
594 * should not change */
wdenk149dded2003-09-10 18:20:28 +0000595
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900596static struct ed *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe)
wdenk149dded2003-09-10 18:20:28 +0000597{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900598 struct td *td;
599 struct ed *ed_ret;
600 struct ed *ed;
wdenk149dded2003-09-10 18:20:28 +0000601
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900602 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
603 (usb_pipecontrol(pipe) ? 0 :
604 usb_pipeout(pipe))];
wdenk149dded2003-09-10 18:20:28 +0000605
606 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
607 err("ep_add_ed: pending delete");
608 /* pending delete request */
609 return NULL;
610 }
611
612 if (ed->state == ED_NEW) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900613 ed->hwINFO = m32_swap(OHCI_ED_SKIP); /* skip ed */
wdenk42d1f032003-10-15 23:53:47 +0000614 /* dummy td; end of td list for ed */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900615 td = td_alloc(usb_dev);
616 ed->hwTailP = (__u32) m32_swap(td);
wdenk149dded2003-09-10 18:20:28 +0000617 ed->hwHeadP = ed->hwTailP;
618 ed->state = ED_UNLINK;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900619 ed->type = usb_pipetype(pipe);
wdenk149dded2003-09-10 18:20:28 +0000620 ohci_dev.ed_cnt++;
621 }
622
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900623 ed->hwINFO = m32_swap(usb_pipedevice(pipe)
624 | usb_pipeendpoint(pipe) << 7
625 | (usb_pipeisoc(pipe) ? 0x8000 : 0)
626 | (usb_pipecontrol(pipe) ? 0 :
627 (usb_pipeout(pipe) ? 0x800 : 0x1000))
628 | usb_pipeslow(pipe) << 13 |
629 usb_maxpacket(usb_dev, pipe) << 16);
wdenk149dded2003-09-10 18:20:28 +0000630
631 return ed_ret;
632}
633
634/*-------------------------------------------------------------------------*
635 * TD handling functions
636 *-------------------------------------------------------------------------*/
637
638/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
639
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900640static void td_fill(struct ohci *ohci, unsigned int info, void *data, int len,
641 struct usb_device *dev, int index,
642 struct urb_priv *urb_priv)
wdenk149dded2003-09-10 18:20:28 +0000643{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900644 struct td *td, *td_pt;
wdenk149dded2003-09-10 18:20:28 +0000645#ifdef OHCI_FILL_TRACE
646 int i;
647#endif
648
649 if (index > urb_priv->length) {
650 err("index > length");
651 return;
652 }
653 /* use this td as the next dummy */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900654 td_pt = urb_priv->td[index];
wdenk149dded2003-09-10 18:20:28 +0000655 td_pt->hwNextTD = 0;
656
657 /* fill the old dummy TD */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900658 td = urb_priv->td[index] =
659 (struct td *) (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
wdenk149dded2003-09-10 18:20:28 +0000660
661 td->ed = urb_priv->ed;
662 td->next_dl_td = NULL;
663 td->index = index;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900664 td->data = (__u32) data;
wdenk149dded2003-09-10 18:20:28 +0000665#ifdef OHCI_FILL_TRACE
Remy Bohmer9dbc3662008-10-10 10:23:22 +0200666 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
wdenk149dded2003-09-10 18:20:28 +0000667 for (i = 0; i < len; i++)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900668 printf("td->data[%d] %#2x ", i,
669 ((unsigned char *)td->data)[i]);
wdenk149dded2003-09-10 18:20:28 +0000670 printf("\n");
671 }
672#endif
673 if (!len)
674 data = 0;
675
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900676 td->hwINFO = (__u32) m32_swap(info);
677 td->hwCBP = (__u32) m32_swap(data);
wdenk149dded2003-09-10 18:20:28 +0000678 if (data)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900679 td->hwBE = (__u32) m32_swap(data + len - 1);
wdenk149dded2003-09-10 18:20:28 +0000680 else
681 td->hwBE = 0;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900682 td->hwNextTD = (__u32) m32_swap(td_pt);
wdenk149dded2003-09-10 18:20:28 +0000683
684 /* append to queue */
685 td->ed->hwTailP = td->hwNextTD;
686}
687
688/*-------------------------------------------------------------------------*/
689
690/* prepare all TDs of a transfer */
691
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900692static void td_submit_job(struct usb_device *dev, unsigned long pipe,
693 void *buffer, int transfer_len,
694 struct devrequest *setup, struct urb_priv *urb,
695 int interval)
wdenk149dded2003-09-10 18:20:28 +0000696{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900697 struct ohci *ohci = &gohci;
wdenk149dded2003-09-10 18:20:28 +0000698 int data_len = transfer_len;
699 void *data;
700 int cnt = 0;
701 __u32 info = 0;
wdenk42d1f032003-10-15 23:53:47 +0000702 unsigned int toggle = 0;
wdenk149dded2003-09-10 18:20:28 +0000703
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900704 /* OHCI handles the DATA-toggles itself, we just
705 use the USB-toggle bits for reseting */
706 if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
wdenk42d1f032003-10-15 23:53:47 +0000707 toggle = TD_T_TOGGLE;
wdenk149dded2003-09-10 18:20:28 +0000708 } else {
wdenk42d1f032003-10-15 23:53:47 +0000709 toggle = TD_T_DATA0;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900710 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe),
711 1);
wdenk149dded2003-09-10 18:20:28 +0000712 }
713 urb->td_cnt = 0;
714 if (data_len)
715 data = buffer;
716 else
717 data = 0;
718
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900719 switch (usb_pipetype(pipe)) {
wdenk149dded2003-09-10 18:20:28 +0000720 case PIPE_BULK:
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900721 info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN;
722 while (data_len > 4096) {
723 td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
724 4096, dev, cnt, urb);
725 data += 4096;
726 data_len -= 4096;
727 cnt++;
wdenk149dded2003-09-10 18:20:28 +0000728 }
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900729 info = usb_pipeout(pipe) ?
730 TD_CC | TD_DP_OUT :
731 TD_CC | TD_R | TD_DP_IN;
732 td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
733 data_len, dev, cnt, urb);
wdenk149dded2003-09-10 18:20:28 +0000734 cnt++;
735
736 if (!ohci->sleeping)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900737 /* start bulk list */
738 writel(OHCI_BLF, &ohci->regs->cmdstatus);
wdenk149dded2003-09-10 18:20:28 +0000739 break;
740
741 case PIPE_CONTROL:
742 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900743 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
wdenk149dded2003-09-10 18:20:28 +0000744 if (data_len > 0) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900745 info = usb_pipeout(pipe) ?
746 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
747 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
wdenk149dded2003-09-10 18:20:28 +0000748 /* NOTE: mishandles transfers >8K, some >4K */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900749 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
wdenk149dded2003-09-10 18:20:28 +0000750 }
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900751 info = usb_pipeout(pipe) ?
752 TD_CC | TD_DP_IN | TD_T_DATA1 :
753 TD_CC | TD_DP_OUT | TD_T_DATA1;
754 td_fill(ohci, info, data, 0, dev, cnt++, urb);
wdenk149dded2003-09-10 18:20:28 +0000755 if (!ohci->sleeping)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900756 /* start Control list */
757 writel(OHCI_CLF, &ohci->regs->cmdstatus);
wdenk149dded2003-09-10 18:20:28 +0000758 break;
759 }
760 if (urb->length != cnt)
761 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
762}
763
764/*-------------------------------------------------------------------------*
765 * Done List handling functions
766 *-------------------------------------------------------------------------*/
767
768
769/* calculate the transfer length and update the urb */
770
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900771static void dl_transfer_length(struct td *td)
wdenk149dded2003-09-10 18:20:28 +0000772{
773 __u32 tdINFO, tdBE, tdCBP;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900774 struct urb_priv *lurb_priv = &urb_priv;
wdenk149dded2003-09-10 18:20:28 +0000775
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900776 tdINFO = m32_swap(td->hwINFO);
777 tdBE = m32_swap(td->hwBE);
778 tdCBP = m32_swap(td->hwCBP);
wdenk149dded2003-09-10 18:20:28 +0000779
Remy Bohmer9dbc3662008-10-10 10:23:22 +0200780 if (!(usb_pipecontrol(lurb_priv->pipe) &&
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900781 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
wdenk149dded2003-09-10 18:20:28 +0000782 if (tdBE != 0) {
783 if (td->hwCBP == 0)
784 lurb_priv->actual_length += tdBE - td->data + 1;
785 else
786 lurb_priv->actual_length += tdCBP - td->data;
787 }
788 }
789}
790
791/*-------------------------------------------------------------------------*/
792
793/* replies to the request have to be on a FIFO basis so
794 * we reverse the reversed done-list */
795
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900796static struct td *dl_reverse_done_list(struct ohci *ohci)
wdenk149dded2003-09-10 18:20:28 +0000797{
798 __u32 td_list_hc;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900799 __u32 tmp;
800 struct td *td_rev = NULL;
801 struct td *td_list = NULL;
802 struct urb_priv *lurb_priv = NULL;
wdenk149dded2003-09-10 18:20:28 +0000803
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900804 td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
wdenk149dded2003-09-10 18:20:28 +0000805 ohci->hcca->done_head = 0;
806
807 while (td_list_hc) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900808 td_list = (struct td *) td_list_hc;
wdenk149dded2003-09-10 18:20:28 +0000809
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900810 if (TD_CC_GET(m32_swap(td_list->hwINFO))) {
wdenk149dded2003-09-10 18:20:28 +0000811 lurb_priv = &urb_priv;
812 dbg(" USB-error/status: %x : %p",
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900813 TD_CC_GET(m32_swap(td_list->hwINFO)), td_list);
814 if (td_list->ed->hwHeadP & m32_swap(0x1)) {
815 if (lurb_priv &&
816 ((td_list->index+1) < lurb_priv->length)) {
817 tmp = lurb_priv->length - 1;
wdenk149dded2003-09-10 18:20:28 +0000818 td_list->ed->hwHeadP =
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900819 (lurb_priv->td[tmp]->hwNextTD &
820 m32_swap(0xfffffff0)) |
821 (td_list->ed->hwHeadP &
822 m32_swap(0x2));
823 lurb_priv->td_cnt += lurb_priv->length -
824 td_list->index - 1;
wdenk149dded2003-09-10 18:20:28 +0000825 } else
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900826 td_list->ed->hwHeadP &=
827 m32_swap(0xfffffff2);
wdenk149dded2003-09-10 18:20:28 +0000828 }
829 }
830
831 td_list->next_dl_td = td_rev;
832 td_rev = td_list;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900833 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
wdenk149dded2003-09-10 18:20:28 +0000834 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200835
wdenk149dded2003-09-10 18:20:28 +0000836 return td_list;
837}
838
839/*-------------------------------------------------------------------------*/
840
841/* td done list */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900842static int dl_done_list(struct ohci *ohci, struct td *td_list)
wdenk149dded2003-09-10 18:20:28 +0000843{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900844 struct td *td_list_next = NULL;
845 struct ed *ed;
wdenk149dded2003-09-10 18:20:28 +0000846 int cc = 0;
847 int stat = 0;
848 /* urb_t *urb; */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900849 struct urb_priv *lurb_priv;
wdenk42d1f032003-10-15 23:53:47 +0000850 __u32 tdINFO, edHeadP, edTailP;
wdenk149dded2003-09-10 18:20:28 +0000851
wdenk42d1f032003-10-15 23:53:47 +0000852 while (td_list) {
853 td_list_next = td_list->next_dl_td;
wdenk149dded2003-09-10 18:20:28 +0000854
wdenk42d1f032003-10-15 23:53:47 +0000855 lurb_priv = &urb_priv;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900856 tdINFO = m32_swap(td_list->hwINFO);
wdenk149dded2003-09-10 18:20:28 +0000857
wdenk42d1f032003-10-15 23:53:47 +0000858 ed = td_list->ed;
wdenk149dded2003-09-10 18:20:28 +0000859
wdenk42d1f032003-10-15 23:53:47 +0000860 dl_transfer_length(td_list);
wdenk149dded2003-09-10 18:20:28 +0000861
wdenk42d1f032003-10-15 23:53:47 +0000862 /* error code of transfer */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900863 cc = TD_CC_GET(tdINFO);
wdenk149dded2003-09-10 18:20:28 +0000864 if (cc != 0) {
865 dbg("ConditionCode %#x", cc);
866 stat = cc_to_error[cc];
867 }
868
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200869 /* see if this done list makes for all TD's of current URB,
870 * and mark the URB finished if so */
871 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
872 if ((ed->state & (ED_OPER | ED_UNLINK)))
873 urb_finished = 1;
874 else
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900875 dbg("dl_done_list: strange.., ED state %x, "
876 "ed->state\n");
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200877 } else
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900878 dbg("dl_done_list: processing TD %x, len %x\n",
879 lurb_priv->td_cnt, lurb_priv->length);
Wolfgang Denk9c998aa2005-07-21 11:57:57 +0200880
wdenk42d1f032003-10-15 23:53:47 +0000881 if (ed->state != ED_NEW) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900882 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
883 edTailP = m32_swap(ed->hwTailP);
wdenk149dded2003-09-10 18:20:28 +0000884
885 /* unlink eds if they are not busy */
wdenk42d1f032003-10-15 23:53:47 +0000886 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900887 ep_unlink(ohci, ed);
wdenk42d1f032003-10-15 23:53:47 +0000888 }
wdenk149dded2003-09-10 18:20:28 +0000889
wdenk42d1f032003-10-15 23:53:47 +0000890 td_list = td_list_next;
891 }
wdenk149dded2003-09-10 18:20:28 +0000892 return stat;
893}
894
895/*-------------------------------------------------------------------------*
896 * Virtual Root Hub
897 *-------------------------------------------------------------------------*/
898
899/* Device descriptor */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900900static __u8 root_hub_dev_des[] = {
901 0x12, /* __u8 bLength; */
902 0x01, /* __u8 bDescriptorType; Device */
903 0x10, /* __u16 bcdUSB; v1.1 */
wdenk149dded2003-09-10 18:20:28 +0000904 0x01,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900905 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
906 0x00, /* __u8 bDeviceSubClass; */
907 0x00, /* __u8 bDeviceProtocol; */
908 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
909 0x00, /* __u16 idVendor; */
wdenk149dded2003-09-10 18:20:28 +0000910 0x00,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900911 0x00, /* __u16 idProduct; */
wdenk42d1f032003-10-15 23:53:47 +0000912 0x00,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900913 0x00, /* __u16 bcdDevice; */
wdenk42d1f032003-10-15 23:53:47 +0000914 0x00,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900915 0x00, /* __u8 iManufacturer; */
916 0x01, /* __u8 iProduct; */
917 0x00, /* __u8 iSerialNumber; */
918 0x01 /* __u8 bNumConfigurations; */
wdenk149dded2003-09-10 18:20:28 +0000919};
920
wdenk149dded2003-09-10 18:20:28 +0000921/* Configuration descriptor */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900922static __u8 root_hub_config_des[] = {
923 0x09, /* __u8 bLength; */
924 0x02, /* __u8 bDescriptorType; Configuration */
925 0x19, /* __u16 wTotalLength; */
wdenk149dded2003-09-10 18:20:28 +0000926 0x00,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900927 0x01, /* __u8 bNumInterfaces; */
928 0x01, /* __u8 bConfigurationValue; */
929 0x00, /* __u8 iConfiguration; */
930 0x40, /* __u8 bmAttributes;
931 Bit 7: Bus-powered, 6: Self-powered,
932 5 Remote-wakwup, 4..0: resvd */
933 0x00, /* __u8 MaxPower; */
wdenk149dded2003-09-10 18:20:28 +0000934
935 /* interface */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900936 0x09, /* __u8 if_bLength; */
937 0x04, /* __u8 if_bDescriptorType; Interface */
938 0x00, /* __u8 if_bInterfaceNumber; */
939 0x00, /* __u8 if_bAlternateSetting; */
940 0x01, /* __u8 if_bNumEndpoints; */
941 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
942 0x00, /* __u8 if_bInterfaceSubClass; */
943 0x00, /* __u8 if_bInterfaceProtocol; */
944 0x00, /* __u8 if_iInterface; */
wdenk149dded2003-09-10 18:20:28 +0000945
946 /* endpoint */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900947 0x07, /* __u8 ep_bLength; */
948 0x05, /* __u8 ep_bDescriptorType; Endpoint */
949 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
950 0x03, /* __u8 ep_bmAttributes; Interrupt */
951 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
wdenk42d1f032003-10-15 23:53:47 +0000952 0x00,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900953 0xff /* __u8 ep_bInterval; 255 ms */
wdenk149dded2003-09-10 18:20:28 +0000954};
955
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900956static unsigned char root_hub_str_index0[] = {
957 0x04, /* __u8 bLength; */
958 0x03, /* __u8 bDescriptorType; String-descriptor */
959 0x09, /* __u8 lang ID */
960 0x04, /* __u8 lang ID */
wdenk149dded2003-09-10 18:20:28 +0000961};
962
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +0900963static unsigned char root_hub_str_index1[] = {
964 28, /* __u8 bLength; */
965 0x03, /* __u8 bDescriptorType; String-descriptor */
966 'O', /* __u8 Unicode */
967 0, /* __u8 Unicode */
968 'H', /* __u8 Unicode */
969 0, /* __u8 Unicode */
970 'C', /* __u8 Unicode */
971 0, /* __u8 Unicode */
972 'I', /* __u8 Unicode */
973 0, /* __u8 Unicode */
974 ' ', /* __u8 Unicode */
975 0, /* __u8 Unicode */
976 'R', /* __u8 Unicode */
977 0, /* __u8 Unicode */
978 'o', /* __u8 Unicode */
979 0, /* __u8 Unicode */
980 'o', /* __u8 Unicode */
981 0, /* __u8 Unicode */
982 't', /* __u8 Unicode */
983 0, /* __u8 Unicode */
984 ' ', /* __u8 Unicode */
985 0, /* __u8 Unicode */
986 'H', /* __u8 Unicode */
987 0, /* __u8 Unicode */
988 'u', /* __u8 Unicode */
989 0, /* __u8 Unicode */
990 'b', /* __u8 Unicode */
991 0, /* __u8 Unicode */
wdenk149dded2003-09-10 18:20:28 +0000992};
993
994/* Hub class-specific descriptor is constructed dynamically */
995
996
997/*-------------------------------------------------------------------------*/
998
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200999#define OK(x) len = (x); break
wdenk149dded2003-09-10 18:20:28 +00001000#ifdef DEBUG
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001001#define WR_RH_STAT(x) \
1002{ \
1003 info("WR:status %#8x", (x)); \
1004 writel((x), &gohci.regs->roothub.status); \
1005}
1006#define WR_RH_PORTSTAT(x) \
1007{ \
1008 info("WR:portstatus[%d] %#8x", wIndex-1, (x)); \
1009 writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); \
1010}
wdenk149dded2003-09-10 18:20:28 +00001011#else
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001012#define WR_RH_STAT(x) \
1013 writel((x), &gohci.regs->roothub.status)
1014#define WR_RH_PORTSTAT(x)\
1015 writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
wdenk149dded2003-09-10 18:20:28 +00001016#endif
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001017#define RD_RH_STAT roothub_status(&gohci)
1018#define RD_RH_PORTSTAT roothub_portstatus(&gohci, wIndex-1)
wdenk149dded2003-09-10 18:20:28 +00001019
1020/* request to virtual root hub */
1021
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001022int rh_check_port_status(struct ohci *controller)
dzu8a42eac2003-09-29 21:55:54 +00001023{
1024 __u32 temp, ndp, i;
1025 int res;
1026
1027 res = -1;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001028 temp = roothub_a(controller);
dzu8a42eac2003-09-29 21:55:54 +00001029 ndp = (temp & RH_A_NDP);
1030 for (i = 0; i < ndp; i++) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001031 temp = roothub_portstatus(controller, i);
dzu8a42eac2003-09-29 21:55:54 +00001032 /* check for a device disconnect */
1033 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001034 (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
dzu8a42eac2003-09-29 21:55:54 +00001035 res = i;
1036 break;
1037 }
1038 }
1039 return res;
1040}
1041
1042static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001043 void *buffer, int transfer_len,
1044 struct devrequest *cmd)
wdenk149dded2003-09-10 18:20:28 +00001045{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001046 void *data = buffer;
wdenk149dded2003-09-10 18:20:28 +00001047 int leni = transfer_len;
1048 int len = 0;
1049 int stat = 0;
1050 __u32 datab[4];
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001051 __u8 *data_buf = (__u8 *) datab;
wdenk42d1f032003-10-15 23:53:47 +00001052 __u16 bmRType_bReq;
wdenk149dded2003-09-10 18:20:28 +00001053 __u16 wValue;
1054 __u16 wIndex;
1055 __u16 wLength;
1056
1057#ifdef DEBUG
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001058 urb_priv.actual_length = 0;
1059 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)",
1060 usb_pipein(pipe));
wdenk149dded2003-09-10 18:20:28 +00001061#else
1062 wait_ms(1);
1063#endif
Remy Bohmer9dbc3662008-10-10 10:23:22 +02001064 if (usb_pipeint(pipe)) {
wdenk149dded2003-09-10 18:20:28 +00001065 info("Root-Hub submit IRQ: NOT implemented");
1066 return 0;
1067 }
1068
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001069 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1070 wValue = m16_swap(cmd->value);
1071 wIndex = m16_swap(cmd->index);
1072 wLength = m16_swap(cmd->length);
wdenk149dded2003-09-10 18:20:28 +00001073
1074 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001075 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
wdenk149dded2003-09-10 18:20:28 +00001076
1077 switch (bmRType_bReq) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001078 /* Request Destination:
1079 without flags: Device,
1080 RH_INTERFACE: interface,
1081 RH_ENDPOINT: endpoint,
1082 RH_CLASS means HUB here,
1083 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1084 */
wdenk149dded2003-09-10 18:20:28 +00001085
1086 case RH_GET_STATUS:
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001087 *(__u16 *) data_buf = m16_swap(1);
1088 OK(2);
wdenk149dded2003-09-10 18:20:28 +00001089 case RH_GET_STATUS | RH_INTERFACE:
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001090 *(__u16 *) data_buf = m16_swap(0);
1091 OK(2);
wdenk149dded2003-09-10 18:20:28 +00001092 case RH_GET_STATUS | RH_ENDPOINT:
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001093 *(__u16 *) data_buf = m16_swap(0);
1094 OK(2);
wdenk149dded2003-09-10 18:20:28 +00001095 case RH_GET_STATUS | RH_CLASS:
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001096 *(__u32 *) data_buf =
1097 m32_swap(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1098 OK(4);
wdenk149dded2003-09-10 18:20:28 +00001099 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001100 *(__u32 *) data_buf = m32_swap(RD_RH_PORTSTAT);
1101 OK(4);
wdenk149dded2003-09-10 18:20:28 +00001102
1103 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1104 switch (wValue) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001105 case (RH_ENDPOINT_STALL):
1106 OK(0);
wdenk149dded2003-09-10 18:20:28 +00001107 }
1108 break;
1109
1110 case RH_CLEAR_FEATURE | RH_CLASS:
1111 switch (wValue) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001112 case RH_C_HUB_LOCAL_POWER:
1113 OK(0);
1114 case (RH_C_HUB_OVER_CURRENT):
1115 WR_RH_STAT(RH_HS_OCIC);
1116 OK(0);
wdenk149dded2003-09-10 18:20:28 +00001117 }
1118 break;
1119
1120 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1121 switch (wValue) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001122 case (RH_PORT_ENABLE):
1123 WR_RH_PORTSTAT(RH_PS_CCS);
1124 OK(0);
1125 case (RH_PORT_SUSPEND):
1126 WR_RH_PORTSTAT(RH_PS_POCI);
1127 OK(0);
1128 case (RH_PORT_POWER):
1129 WR_RH_PORTSTAT(RH_PS_LSDA);
1130 OK(0);
1131 case (RH_C_PORT_CONNECTION):
1132 WR_RH_PORTSTAT(RH_PS_CSC);
1133 OK(0);
1134 case (RH_C_PORT_ENABLE):
1135 WR_RH_PORTSTAT(RH_PS_PESC);
1136 OK(0);
1137 case (RH_C_PORT_SUSPEND):
1138 WR_RH_PORTSTAT(RH_PS_PSSC);
1139 OK(0);
1140 case (RH_C_PORT_OVER_CURRENT):
1141 WR_RH_PORTSTAT(RH_PS_OCIC);
1142 OK(0);
1143 case (RH_C_PORT_RESET):
1144 WR_RH_PORTSTAT(RH_PS_PRSC);
1145 OK(0);
wdenk149dded2003-09-10 18:20:28 +00001146 }
1147 break;
1148
1149 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1150 switch (wValue) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001151 case (RH_PORT_SUSPEND):
1152 WR_RH_PORTSTAT(RH_PS_PSS);
1153 OK(0);
1154 case (RH_PORT_RESET): /* BUG IN HUP CODE ******** */
1155 if (RD_RH_PORTSTAT & RH_PS_CCS)
1156 WR_RH_PORTSTAT(RH_PS_PRS);
1157 OK(0);
1158 case (RH_PORT_POWER):
1159 WR_RH_PORTSTAT(RH_PS_PPS);
1160 OK(0);
1161 case (RH_PORT_ENABLE): /* BUG IN HUP CODE ******** */
1162 if (RD_RH_PORTSTAT & RH_PS_CCS)
1163 WR_RH_PORTSTAT(RH_PS_PES);
1164 OK(0);
wdenk149dded2003-09-10 18:20:28 +00001165 }
1166 break;
1167
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001168 case RH_SET_ADDRESS:
1169 gohci.rh.devnum = wValue;
1170 OK(0);
wdenk149dded2003-09-10 18:20:28 +00001171
1172 case RH_GET_DESCRIPTOR:
1173 switch ((wValue & 0xff00) >> 8) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001174 case (0x01): /* device descriptor */
1175 len = min_t(unsigned int,
1176 leni,
1177 min_t(unsigned int,
1178 sizeof(root_hub_dev_des), wLength));
1179 data_buf = root_hub_dev_des;
1180 OK(len);
1181 case (0x02): /* configuration descriptor */
1182 len = min_t(unsigned int,
1183 leni,
1184 min_t(unsigned int,
1185 sizeof(root_hub_config_des),
1186 wLength));
1187 data_buf = root_hub_config_des;
1188 OK(len);
1189 case (0x03): /* string descriptors */
1190 if (wValue == 0x0300) {
wdenk149dded2003-09-10 18:20:28 +00001191 len = min_t(unsigned int,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001192 leni,
1193 min_t(unsigned int,
1194 sizeof(root_hub_str_index0),
1195 wLength));
1196 data_buf = root_hub_str_index0;
1197 OK(len);
wdenk149dded2003-09-10 18:20:28 +00001198 }
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001199 if (wValue == 0x0301) {
1200 len = min_t(unsigned int,
1201 leni,
1202 min_t(unsigned int,
1203 sizeof(root_hub_str_index1),
1204 wLength));
1205 data_buf = root_hub_str_index1;
1206 OK(len);
1207 }
1208 default:
1209 stat = USB_ST_STALLED;
wdenk149dded2003-09-10 18:20:28 +00001210 }
1211 break;
1212
1213 case RH_GET_DESCRIPTOR | RH_CLASS:
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001214 {
1215 __u32 temp = roothub_a(&gohci);
wdenk149dded2003-09-10 18:20:28 +00001216
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001217 data_buf[0] = 9; /* min length; */
1218 data_buf[1] = 0x29;
1219 data_buf[2] = temp & RH_A_NDP;
1220 data_buf[3] = 0;
1221 if (temp & RH_A_PSM)
1222 /* per-port power switching? */
1223 data_buf[3] |= 0x1;
1224 if (temp & RH_A_NOCP)
1225 /* no overcurrent reporting? */
1226 data_buf[3] |= 0x10;
1227 else if (temp & RH_A_OCPM)
1228 /* per-port overcurrent reporting? */
1229 data_buf[3] |= 0x8;
wdenk149dded2003-09-10 18:20:28 +00001230
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001231 /* corresponds to data_buf[4-7] */
1232 datab[1] = 0;
1233 data_buf[5] = (temp & RH_A_POTPGT) >> 24;
1234 temp = roothub_b(&gohci);
1235 data_buf[7] = temp & RH_B_DR;
1236 if (data_buf[2] < 7) {
1237 data_buf[8] = 0xff;
1238 } else {
1239 data_buf[0] += 2;
1240 data_buf[8] = (temp & RH_B_DR) >> 8;
1241 data_buf[10] = data_buf[9] = 0xff;
1242 }
wdenk149dded2003-09-10 18:20:28 +00001243
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001244 len = min_t(unsigned int, leni,
1245 min_t(unsigned int, data_buf[0], wLength));
1246 OK(len);
wdenk149dded2003-09-10 18:20:28 +00001247 }
1248
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001249 case RH_GET_CONFIGURATION:
1250 *(__u8 *) data_buf = 0x01;
1251 OK(1);
wdenk149dded2003-09-10 18:20:28 +00001252
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001253 case RH_SET_CONFIGURATION:
1254 WR_RH_STAT(0x10000);
1255 OK(0);
wdenk149dded2003-09-10 18:20:28 +00001256
1257 default:
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001258 dbg("unsupported root hub command");
wdenk149dded2003-09-10 18:20:28 +00001259 stat = USB_ST_STALLED;
1260 }
1261
1262#ifdef DEBUG
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001263 ohci_dump_roothub(&gohci, 1);
wdenk149dded2003-09-10 18:20:28 +00001264#else
1265 wait_ms(1);
1266#endif
1267
1268 len = min_t(int, len, leni);
1269 if (data != data_buf)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001270 memcpy(data, data_buf, len);
wdenk42d1f032003-10-15 23:53:47 +00001271 dev->act_len = len;
wdenk149dded2003-09-10 18:20:28 +00001272 dev->status = stat;
1273
1274#ifdef DEBUG
1275 if (transfer_len)
1276 urb_priv.actual_length = transfer_len;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001277 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)",
1278 0 /*usb_pipein(pipe) */);
wdenk149dded2003-09-10 18:20:28 +00001279#else
1280 wait_ms(1);
1281#endif
1282
1283 return stat;
1284}
1285
1286/*-------------------------------------------------------------------------*/
1287
1288/* common code for handling submit messages - used for all but root hub */
1289/* accesses. */
1290int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001291 int transfer_len, struct devrequest *setup, int interval)
wdenk149dded2003-09-10 18:20:28 +00001292{
1293 int stat = 0;
1294 int maxsize = usb_maxpacket(dev, pipe);
1295 int timeout;
1296
dzu8a42eac2003-09-29 21:55:54 +00001297 /* device pulled? Shortcut the action. */
1298 if (devgone == dev) {
1299 dev->status = USB_ST_CRC_ERR;
1300 return 0;
1301 }
wdenk149dded2003-09-10 18:20:28 +00001302#ifdef DEBUG
1303 urb_priv.actual_length = 0;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001304 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
1305 usb_pipein(pipe));
wdenk149dded2003-09-10 18:20:28 +00001306#else
1307 wait_ms(1);
1308#endif
1309 if (!maxsize) {
1310 err("submit_common_message: pipesize for pipe %lx is zero",
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001311 pipe);
wdenk149dded2003-09-10 18:20:28 +00001312 return -1;
1313 }
1314
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001315 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) <
1316 0) {
wdenk149dded2003-09-10 18:20:28 +00001317 err("sohci_submit_job failed");
1318 return -1;
1319 }
1320
1321 wait_ms(10);
1322 /* ohci_dump_status(&gohci); */
wdenk42d1f032003-10-15 23:53:47 +00001323
wdenka43278a2003-09-11 19:48:06 +00001324 /* allow more time for a BULK device to react - some are slow */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001325#define BULK_TO 5000 /* timeout in milliseconds */
Remy Bohmer9dbc3662008-10-10 10:23:22 +02001326 if (usb_pipebulk(pipe))
wdenka43278a2003-09-11 19:48:06 +00001327 timeout = BULK_TO;
1328 else
1329 timeout = 100;
1330
wdenk149dded2003-09-10 18:20:28 +00001331 /* wait for it to complete */
wdenk149dded2003-09-10 18:20:28 +00001332 for (;;) {
1333 /* check whether the controller is done */
1334 stat = hc_interrupt();
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001335
wdenk149dded2003-09-10 18:20:28 +00001336 if (stat < 0) {
dzu8a42eac2003-09-29 21:55:54 +00001337 stat = USB_ST_CRC_ERR;
wdenk149dded2003-09-10 18:20:28 +00001338 break;
1339 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001340
1341 /* NOTE: since we are not interrupt driven in U-Boot and always
1342 * handle only one URB at a time, we cannot assume the
1343 * transaction finished on the first successful return from
1344 * hc_interrupt().. unless the flag for current URB is set,
1345 * meaning that all TD's to/from device got actually
1346 * transferred and processed. If the current URB is not
1347 * finished we need to re-iterate this loop so as
1348 * hc_interrupt() gets called again as there needs to be some
1349 * more TD's to process still */
1350 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
wdenk149dded2003-09-10 18:20:28 +00001351 /* 0xff is returned for an SF-interrupt */
1352 break;
1353 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001354
wdenk149dded2003-09-10 18:20:28 +00001355 if (--timeout) {
1356 wait_ms(1);
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001357 if (!urb_finished)
1358 dbg("\%");
Wolfgang Denk095b8a32005-08-02 17:06:17 +02001359
wdenk149dded2003-09-10 18:20:28 +00001360 } else {
dzu8a42eac2003-09-29 21:55:54 +00001361 err("CTL:TIMEOUT ");
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001362 dbg("submit_common_msg: TO status %x\n", stat);
dzu8a42eac2003-09-29 21:55:54 +00001363 stat = USB_ST_CRC_ERR;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001364 urb_finished = 1;
wdenk149dded2003-09-10 18:20:28 +00001365 break;
1366 }
1367 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001368
1369#if 0
dzu8a42eac2003-09-29 21:55:54 +00001370 /* we got an Root Hub Status Change interrupt */
1371 if (got_rhsc) {
1372#ifdef DEBUG
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001373 ohci_dump_roothub(&gohci, 1);
dzu8a42eac2003-09-29 21:55:54 +00001374#endif
1375 got_rhsc = 0;
1376 /* abuse timeout */
1377 timeout = rh_check_port_status(&gohci);
1378 if (timeout >= 0) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001379#if 0 /* this does nothing useful, but leave it here
1380 in case that changes */
dzu8a42eac2003-09-29 21:55:54 +00001381 /* the called routine adds 1 to the passed value */
1382 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1383#endif
1384 /*
1385 * XXX
1386 * This is potentially dangerous because it assumes
1387 * that only one device is ever plugged in!
1388 */
1389 devgone = dev;
1390 }
1391 }
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001392#endif
dzu8a42eac2003-09-29 21:55:54 +00001393
wdenk149dded2003-09-10 18:20:28 +00001394 dev->status = stat;
wdenk42d1f032003-10-15 23:53:47 +00001395 dev->act_len = transfer_len;
wdenk149dded2003-09-10 18:20:28 +00001396
1397#ifdef DEBUG
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001398 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)",
1399 usb_pipein(pipe));
wdenk149dded2003-09-10 18:20:28 +00001400#else
1401 wait_ms(1);
1402#endif
1403
1404 /* free TDs in urb_priv */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001405 urb_free_priv(&urb_priv);
wdenk149dded2003-09-10 18:20:28 +00001406 return 0;
1407}
1408
1409/* submit routines called from usb.c */
1410int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001411 int transfer_len)
wdenk149dded2003-09-10 18:20:28 +00001412{
1413 info("submit_bulk_msg");
1414 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1415}
1416
1417int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001418 int transfer_len, struct devrequest *setup)
wdenk149dded2003-09-10 18:20:28 +00001419{
1420 int maxsize = usb_maxpacket(dev, pipe);
1421
1422 info("submit_control_msg");
1423#ifdef DEBUG
1424 urb_priv.actual_length = 0;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001425 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
1426 usb_pipein(pipe));
wdenk149dded2003-09-10 18:20:28 +00001427#else
1428 wait_ms(1);
1429#endif
1430 if (!maxsize) {
1431 err("submit_control_message: pipesize for pipe %lx is zero",
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001432 pipe);
wdenk149dded2003-09-10 18:20:28 +00001433 return -1;
1434 }
dzu8a42eac2003-09-29 21:55:54 +00001435 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1436 gohci.rh.dev = dev;
wdenk149dded2003-09-10 18:20:28 +00001437 /* root hub - redirect */
1438 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001439 setup);
dzu8a42eac2003-09-29 21:55:54 +00001440 }
wdenk149dded2003-09-10 18:20:28 +00001441
1442 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1443}
1444
1445int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001446 int transfer_len, int interval)
wdenk149dded2003-09-10 18:20:28 +00001447{
1448 info("submit_int_msg");
1449 return -1;
1450}
1451
1452/*-------------------------------------------------------------------------*
1453 * HC functions
1454 *-------------------------------------------------------------------------*/
1455
1456/* reset the HC and BUS */
1457
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001458static int hc_reset(struct ohci *ohci)
wdenk149dded2003-09-10 18:20:28 +00001459{
1460 int timeout = 30;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001461 int smm_timeout = 50; /* 0,5 sec */
wdenk149dded2003-09-10 18:20:28 +00001462
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001463 if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1464 /* SMM owns the HC - request ownership */
1465 writel(OHCI_OCR, &ohci->regs->cmdstatus);
wdenk149dded2003-09-10 18:20:28 +00001466 info("USB HC TakeOver from SMM");
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001467 while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1468 wait_ms(10);
wdenk149dded2003-09-10 18:20:28 +00001469 if (--smm_timeout == 0) {
1470 err("USB HC TakeOver failed!");
1471 return -1;
1472 }
1473 }
1474 }
1475
1476 /* Disable HC interrupts */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001477 writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
wdenk149dded2003-09-10 18:20:28 +00001478
1479 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001480 ohci->slot_name, readl(&ohci->regs->control));
wdenk149dded2003-09-10 18:20:28 +00001481
wdenk42d1f032003-10-15 23:53:47 +00001482 /* Reset USB (needed by some controllers) */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001483 writel(0, &ohci->regs->control);
wdenk149dded2003-09-10 18:20:28 +00001484
1485 /* HC Reset requires max 10 us delay */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001486 writel(OHCI_HCR, &ohci->regs->cmdstatus);
1487 while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
wdenk149dded2003-09-10 18:20:28 +00001488 if (--timeout == 0) {
1489 err("USB HC reset timed out!");
1490 return -1;
1491 }
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001492 udelay(1);
wdenk149dded2003-09-10 18:20:28 +00001493 }
1494 return 0;
1495}
1496
1497/*-------------------------------------------------------------------------*/
1498
1499/* Start an OHCI controller, set the BUS operational
1500 * enable interrupts
1501 * connect the virtual root hub */
1502
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001503static int hc_start(struct ohci *ohci)
wdenk149dded2003-09-10 18:20:28 +00001504{
wdenk42d1f032003-10-15 23:53:47 +00001505 __u32 mask;
1506 unsigned int fminterval;
wdenk149dded2003-09-10 18:20:28 +00001507
1508 ohci->disabled = 1;
1509
1510 /* Tell the controller where the control and bulk lists are
1511 * The lists are empty now. */
1512
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001513 writel(0, &ohci->regs->ed_controlhead);
1514 writel(0, &ohci->regs->ed_bulkhead);
wdenk149dded2003-09-10 18:20:28 +00001515
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001516 /* a reset clears this */
1517 writel((__u32) ohci->hcca, &ohci->regs->hcca);
wdenk149dded2003-09-10 18:20:28 +00001518
wdenk42d1f032003-10-15 23:53:47 +00001519 fminterval = 0x2edf;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001520 writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
wdenk149dded2003-09-10 18:20:28 +00001521 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001522 writel(fminterval, &ohci->regs->fminterval);
1523 writel(0x628, &ohci->regs->lsthresh);
wdenk149dded2003-09-10 18:20:28 +00001524
wdenk42d1f032003-10-15 23:53:47 +00001525 /* start controller operations */
1526 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
wdenk149dded2003-09-10 18:20:28 +00001527 ohci->disabled = 0;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001528 writel(ohci->hc_control, &ohci->regs->control);
wdenk149dded2003-09-10 18:20:28 +00001529
dzu8a42eac2003-09-29 21:55:54 +00001530 /* disable all interrupts */
1531 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001532 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1533 OHCI_INTR_OC | OHCI_INTR_MIE);
1534 writel(mask, &ohci->regs->intrdisable);
dzu8a42eac2003-09-29 21:55:54 +00001535 /* clear all interrupts */
1536 mask &= ~OHCI_INTR_MIE;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001537 writel(mask, &ohci->regs->intrstatus);
dzu8a42eac2003-09-29 21:55:54 +00001538 /* Choose the interrupts we care about now - but w/o MIE */
1539 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001540 writel(mask, &ohci->regs->intrenable);
wdenk149dded2003-09-10 18:20:28 +00001541
1542#ifdef OHCI_USE_NPS
1543 /* required for AMD-756 and some Mac platforms */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001544 writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1545 &ohci->regs->roothub.a);
1546 writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1547#endif /* OHCI_USE_NPS */
wdenk149dded2003-09-10 18:20:28 +00001548
1549#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1550 /* POTPGT delay is bits 24-31, in 2 ms units. */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001551 mdelay((roothub_a(ohci) >> 23) & 0x1fe);
wdenk149dded2003-09-10 18:20:28 +00001552
1553 /* connect the virtual root hub */
1554 ohci->rh.devnum = 0;
1555
1556 return 0;
1557}
1558
1559/*-------------------------------------------------------------------------*/
1560
1561/* an interrupt happens */
1562
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001563static int hc_interrupt(void)
wdenk149dded2003-09-10 18:20:28 +00001564{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001565 struct ohci *ohci = &gohci;
wdenk149dded2003-09-10 18:20:28 +00001566 struct ohci_regs *regs = ohci->regs;
wdenk42d1f032003-10-15 23:53:47 +00001567 int ints;
wdenk149dded2003-09-10 18:20:28 +00001568 int stat = -1;
1569
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001570 if ((ohci->hcca->done_head != 0) &&
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001571 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001572
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001573 ints = OHCI_INTR_WDH;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001574
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001575 } else {
1576 ints = readl(&regs->intrstatus);
1577 if (ints == ~(u32) 0) {
1578 ohci->disabled++;
1579 err("%s device removed!", ohci->slot_name);
1580 return -1;
1581 }
1582 ints &= readl(&regs->intrenable);
1583 if (ints == 0) {
1584 dbg("hc_interrupt: returning..\n");
1585 return 0xff;
1586 }
wdenk149dded2003-09-10 18:20:28 +00001587 }
1588
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001589 /* dbg("Interrupt: %x frame: %x", ints,
1590 le16_to_cpu(ohci->hcca->frame_no)); */
wdenk149dded2003-09-10 18:20:28 +00001591
dzu8a42eac2003-09-29 21:55:54 +00001592 if (ints & OHCI_INTR_RHSC) {
1593 got_rhsc = 1;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001594 stat = 0xff;
dzu8a42eac2003-09-29 21:55:54 +00001595 }
1596
wdenk149dded2003-09-10 18:20:28 +00001597 if (ints & OHCI_INTR_UE) {
1598 ohci->disabled++;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001599 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1600 ohci->slot_name);
wdenk149dded2003-09-10 18:20:28 +00001601 /* e.g. due to PCI Master/Target Abort */
1602
1603#ifdef DEBUG
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001604 ohci_dump(ohci, 1);
wdenk149dded2003-09-10 18:20:28 +00001605#else
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001606 wait_ms(1);
wdenk149dded2003-09-10 18:20:28 +00001607#endif
1608 /* FIXME: be optimistic, hope that bug won't repeat often. */
1609 /* Make some non-interrupt context restart the controller. */
1610 /* Count and limit the retries though; either hardware or */
1611 /* software errors can go forever... */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001612 hc_reset(ohci);
wdenk149dded2003-09-10 18:20:28 +00001613 return -1;
1614 }
1615
1616 if (ints & OHCI_INTR_WDH) {
1617 wait_ms(1);
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001618
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001619 writel(OHCI_INTR_WDH, &regs->intrdisable);
1620 stat = dl_done_list(&gohci, dl_reverse_done_list(&gohci));
1621 writel(OHCI_INTR_WDH, &regs->intrenable);
wdenk149dded2003-09-10 18:20:28 +00001622 }
1623
1624 if (ints & OHCI_INTR_SO) {
1625 dbg("USB Schedule overrun\n");
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001626 writel(OHCI_INTR_SO, &regs->intrenable);
wdenk149dded2003-09-10 18:20:28 +00001627 stat = -1;
1628 }
1629
1630 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1631 if (ints & OHCI_INTR_SF) {
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001632 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
wdenk149dded2003-09-10 18:20:28 +00001633 wait_ms(1);
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001634 writel(OHCI_INTR_SF, &regs->intrdisable);
wdenk149dded2003-09-10 18:20:28 +00001635 if (ohci->ed_rm_list[frame] != NULL)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001636 writel(OHCI_INTR_SF, &regs->intrenable);
wdenk149dded2003-09-10 18:20:28 +00001637 stat = 0xff;
1638 }
1639
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001640 writel(ints, &regs->intrstatus);
wdenk149dded2003-09-10 18:20:28 +00001641 return stat;
1642}
1643
1644/*-------------------------------------------------------------------------*/
1645
1646/*-------------------------------------------------------------------------*/
1647
1648/* De-allocate all resources.. */
1649
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001650static void hc_release_ohci(struct ohci *ohci)
wdenk149dded2003-09-10 18:20:28 +00001651{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001652 dbg("USB HC release ohci usb-%s", ohci->slot_name);
wdenk149dded2003-09-10 18:20:28 +00001653
1654 if (!ohci->disabled)
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001655 hc_reset(ohci);
wdenk149dded2003-09-10 18:20:28 +00001656}
1657
1658/*-------------------------------------------------------------------------*/
1659
1660/*
1661 * low level initalisation routine, called from usb.c
1662 */
1663static char ohci_inited = 0;
1664
1665int usb_lowlevel_init(void)
1666{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001667 struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1668 struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
wdenk149dded2003-09-10 18:20:28 +00001669
wdenk42d1f032003-10-15 23:53:47 +00001670 /*
1671 * Set the 48 MHz UPLL clocking. Values are taken from
1672 * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
1673 */
1674 clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001675 gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
wdenk149dded2003-09-10 18:20:28 +00001676
wdenk42d1f032003-10-15 23:53:47 +00001677 /*
1678 * Enable USB host clock.
1679 */
1680 clk_power->CLKCON |= (1 << 4);
wdenk149dded2003-09-10 18:20:28 +00001681
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001682 memset(&gohci, 0, sizeof(struct ohci));
1683 memset(&urb_priv, 0, sizeof(struct urb_priv));
wdenk149dded2003-09-10 18:20:28 +00001684
1685 /* align the storage */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001686 if ((__u32) &ghcca[0] & 0xff) {
wdenk149dded2003-09-10 18:20:28 +00001687 err("HCCA not aligned!!");
1688 return -1;
1689 }
1690 phcca = &ghcca[0];
1691 info("aligned ghcca %p", phcca);
1692 memset(&ohci_dev, 0, sizeof(struct ohci_device));
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001693 if ((__u32) &ohci_dev.ed[0] & 0x7) {
wdenk149dded2003-09-10 18:20:28 +00001694 err("EDs not aligned!!");
1695 return -1;
1696 }
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001697 memset(gtd, 0, sizeof(struct td) * (NUM_TD + 1));
1698 if ((__u32) gtd & 0x7) {
wdenk149dded2003-09-10 18:20:28 +00001699 err("TDs not aligned!!");
1700 return -1;
1701 }
1702 ptd = gtd;
1703 gohci.hcca = phcca;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001704 memset(phcca, 0, sizeof(struct ohci_hcca));
wdenk149dded2003-09-10 18:20:28 +00001705
1706 gohci.disabled = 1;
1707 gohci.sleeping = 0;
1708 gohci.irq = -1;
1709 gohci.regs = (struct ohci_regs *)S3C24X0_USB_HOST_BASE;
1710
1711 gohci.flags = 0;
1712 gohci.slot_name = "s3c2400";
1713
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001714 if (hc_reset(&gohci) < 0) {
1715 hc_release_ohci(&gohci);
wdenk42d1f032003-10-15 23:53:47 +00001716 /* Initialization failed */
1717 clk_power->CLKCON &= ~(1 << 4);
wdenk149dded2003-09-10 18:20:28 +00001718 return -1;
1719 }
1720
1721 /* FIXME this is a second HC reset; why?? */
Wolfgang Denkd2ed2f62006-03-11 23:07:09 +01001722 gohci.hc_control = OHCI_USB_RESET;
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001723 writel(gohci.hc_control, &gohci.regs->control);
1724 wait_ms(10);
wdenk149dded2003-09-10 18:20:28 +00001725
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001726 if (hc_start(&gohci) < 0) {
1727 err("can't start usb-%s", gohci.slot_name);
1728 hc_release_ohci(&gohci);
wdenk42d1f032003-10-15 23:53:47 +00001729 /* Initialization failed */
1730 clk_power->CLKCON &= ~(1 << 4);
wdenk149dded2003-09-10 18:20:28 +00001731 return -1;
1732 }
wdenk149dded2003-09-10 18:20:28 +00001733#ifdef DEBUG
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001734 ohci_dump(&gohci, 1);
wdenk149dded2003-09-10 18:20:28 +00001735#else
1736 wait_ms(1);
1737#endif
1738 ohci_inited = 1;
Wolfgang Denk9c998aa2005-07-21 11:57:57 +02001739 urb_finished = 1;
1740
wdenk149dded2003-09-10 18:20:28 +00001741 return 0;
1742}
1743
1744int usb_lowlevel_stop(void)
1745{
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001746 struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
wdenk149dded2003-09-10 18:20:28 +00001747
1748 /* this gets called really early - before the controller has */
1749 /* even been initialized! */
1750 if (!ohci_inited)
1751 return 0;
1752 /* TODO release any interrupts, etc. */
1753 /* call hc_release_ohci() here ? */
kevin.morfitt@fearnside-systems.co.ukd67cce22009-10-10 13:30:22 +09001754 hc_reset(&gohci);
wdenk149dded2003-09-10 18:20:28 +00001755 /* may not want to do this */
1756 clk_power->CLKCON &= ~(1 << 4);
1757 return 0;
1758}
1759
1760#endif /* CONFIG_USB_OHCI */