Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2011 The Chromium OS Authors. |
| 3 | * (C) Copyright 2002-2006 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 5 | * |
| 6 | * (C) Copyright 2002 |
| 7 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 8 | * Marius Groeger <mgroeger@sysgo.de> |
| 9 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <common.h> |
Simon Glass | 24b852a | 2015-11-08 23:47:45 -0700 | [diff] [blame] | 14 | #include <console.h> |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 15 | #include <environment.h> |
Simon Glass | ab7cd62 | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 16 | #include <dm.h> |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 17 | #include <fdtdec.h> |
Simon Glass | f828bf2 | 2013-04-20 08:42:41 +0000 | [diff] [blame] | 18 | #include <fs.h> |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 19 | #include <i2c.h> |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 20 | #include <initcall.h> |
Simon Glass | 96d4b75 | 2017-03-31 08:40:37 -0600 | [diff] [blame] | 21 | #include <init_helpers.h> |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 22 | #include <logbuff.h> |
Simon Glass | fb5cf7f | 2015-02-27 22:06:36 -0700 | [diff] [blame] | 23 | #include <malloc.h> |
Joe Hershberger | 0eb25b6 | 2015-03-22 17:08:59 -0500 | [diff] [blame] | 24 | #include <mapmem.h> |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 25 | #include <os.h> |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 26 | #include <post.h> |
Simon Glass | e47b2d6 | 2017-03-31 08:40:38 -0600 | [diff] [blame] | 27 | #include <relocate.h> |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 28 | #include <spi.h> |
Jeroen Hofstee | c5d4001 | 2014-06-23 23:20:19 +0200 | [diff] [blame] | 29 | #include <status_led.h> |
Simon Glass | 1057e6c | 2016-02-24 09:14:50 -0700 | [diff] [blame] | 30 | #include <timer.h> |
Simon Glass | 71c52db | 2013-06-11 11:14:42 -0700 | [diff] [blame] | 31 | #include <trace.h> |
Simon Glass | 5a54194 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 32 | #include <video.h> |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 33 | #include <watchdog.h> |
Simon Glass | 1fbf97d | 2017-03-31 08:40:39 -0600 | [diff] [blame] | 34 | #if defined(CONFIG_MP) && defined(CONFIG_PPC) |
| 35 | #include <asm/mp.h> |
| 36 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 37 | #include <asm/io.h> |
| 38 | #include <asm/sections.h> |
Simon Glass | ab7cd62 | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 39 | #include <dm/root.h> |
Simon Glass | 056285f | 2017-03-31 08:40:35 -0600 | [diff] [blame] | 40 | #include <linux/errno.h> |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 41 | |
| 42 | /* |
| 43 | * Pointer to initial global data area |
| 44 | * |
| 45 | * Here we initialize it if needed. |
| 46 | */ |
| 47 | #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR |
| 48 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR |
| 49 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ |
| 50 | DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR); |
| 51 | #else |
| 52 | DECLARE_GLOBAL_DATA_PTR; |
| 53 | #endif |
| 54 | |
| 55 | /* |
Simon Glass | 4c50934 | 2015-04-28 20:25:03 -0600 | [diff] [blame] | 56 | * TODO(sjg@chromium.org): IMO this code should be |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 57 | * refactored to a single function, something like: |
| 58 | * |
| 59 | * void led_set_state(enum led_colour_t colour, int on); |
| 60 | */ |
| 61 | /************************************************************************ |
| 62 | * Coloured LED functionality |
| 63 | ************************************************************************ |
| 64 | * May be supplied by boards if desired |
| 65 | */ |
Jeroen Hofstee | c5d4001 | 2014-06-23 23:20:19 +0200 | [diff] [blame] | 66 | __weak void coloured_LED_init(void) {} |
| 67 | __weak void red_led_on(void) {} |
| 68 | __weak void red_led_off(void) {} |
| 69 | __weak void green_led_on(void) {} |
| 70 | __weak void green_led_off(void) {} |
| 71 | __weak void yellow_led_on(void) {} |
| 72 | __weak void yellow_led_off(void) {} |
| 73 | __weak void blue_led_on(void) {} |
| 74 | __weak void blue_led_off(void) {} |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 75 | |
| 76 | /* |
| 77 | * Why is gd allocated a register? Prior to reloc it might be better to |
| 78 | * just pass it around to each function in this file? |
| 79 | * |
| 80 | * After reloc one could argue that it is hardly used and doesn't need |
| 81 | * to be in a register. Or if it is it should perhaps hold pointers to all |
| 82 | * global data for all modules, so that post-reloc we can avoid the massive |
| 83 | * literal pool we get on ARM. Or perhaps just encourage each module to use |
| 84 | * a structure... |
| 85 | */ |
| 86 | |
Sonic Zhang | d54d7eb | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 87 | #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 88 | static int init_func_watchdog_init(void) |
| 89 | { |
Tom Rini | ea3310e | 2017-03-14 11:08:10 -0400 | [diff] [blame] | 90 | # if defined(CONFIG_HW_WATCHDOG) && \ |
| 91 | (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ |
Stefan Roese | 14a380a | 2015-03-10 08:04:36 +0100 | [diff] [blame] | 92 | defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ |
Anatolij Gustschin | 46d7a3b | 2016-06-13 14:24:23 +0200 | [diff] [blame] | 93 | defined(CONFIG_DESIGNWARE_WATCHDOG) || \ |
Stefan Roese | 14a380a | 2015-03-10 08:04:36 +0100 | [diff] [blame] | 94 | defined(CONFIG_IMX_WATCHDOG)) |
Sonic Zhang | d54d7eb | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 95 | hw_watchdog_init(); |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 96 | puts(" Watchdog enabled\n"); |
Anatolij Gustschin | ba169d9 | 2016-06-13 14:24:24 +0200 | [diff] [blame] | 97 | # endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 98 | WATCHDOG_RESET(); |
| 99 | |
| 100 | return 0; |
| 101 | } |
| 102 | |
| 103 | int init_func_watchdog_reset(void) |
| 104 | { |
| 105 | WATCHDOG_RESET(); |
| 106 | |
| 107 | return 0; |
| 108 | } |
| 109 | #endif /* CONFIG_WATCHDOG */ |
| 110 | |
Jeroen Hofstee | dd2a6cd | 2014-10-08 22:57:22 +0200 | [diff] [blame] | 111 | __weak void board_add_ram_info(int use_default) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 112 | { |
| 113 | /* please define platform specific board_add_ram_info() */ |
| 114 | } |
| 115 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 116 | static int init_baud_rate(void) |
| 117 | { |
| 118 | gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); |
| 119 | return 0; |
| 120 | } |
| 121 | |
| 122 | static int display_text_info(void) |
| 123 | { |
Ben Stoltz | 9b21749 | 2015-07-31 09:31:37 -0600 | [diff] [blame] | 124 | #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP) |
Daniel Schwierzeck | 9fdee7d | 2014-11-15 23:46:53 +0100 | [diff] [blame] | 125 | ulong bss_start, bss_end, text_base; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 126 | |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 127 | bss_start = (ulong)&__bss_start; |
| 128 | bss_end = (ulong)&__bss_end; |
Albert ARIBAUD | b60eff3 | 2014-02-22 17:53:43 +0100 | [diff] [blame] | 129 | |
Sonic Zhang | d54d7eb | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 130 | #ifdef CONFIG_SYS_TEXT_BASE |
Daniel Schwierzeck | 9fdee7d | 2014-11-15 23:46:53 +0100 | [diff] [blame] | 131 | text_base = CONFIG_SYS_TEXT_BASE; |
Sonic Zhang | d54d7eb | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 132 | #else |
Daniel Schwierzeck | 9fdee7d | 2014-11-15 23:46:53 +0100 | [diff] [blame] | 133 | text_base = CONFIG_SYS_MONITOR_BASE; |
Sonic Zhang | d54d7eb | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 134 | #endif |
Daniel Schwierzeck | 9fdee7d | 2014-11-15 23:46:53 +0100 | [diff] [blame] | 135 | |
| 136 | debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", |
| 137 | text_base, bss_start, bss_end); |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 138 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 139 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | static int announce_dram_init(void) |
| 144 | { |
| 145 | puts("DRAM: "); |
| 146 | return 0; |
| 147 | } |
| 148 | |
| 149 | static int show_dram_config(void) |
| 150 | { |
York Sun | fa39ffe | 2014-05-02 17:28:05 -0700 | [diff] [blame] | 151 | unsigned long long size; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 152 | |
| 153 | #ifdef CONFIG_NR_DRAM_BANKS |
| 154 | int i; |
| 155 | |
| 156 | debug("\nRAM Configuration:\n"); |
| 157 | for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) { |
| 158 | size += gd->bd->bi_dram[i].size; |
Bin Meng | 715f599 | 2015-08-06 01:31:20 -0700 | [diff] [blame] | 159 | debug("Bank #%d: %llx ", i, |
| 160 | (unsigned long long)(gd->bd->bi_dram[i].start)); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 161 | #ifdef DEBUG |
| 162 | print_size(gd->bd->bi_dram[i].size, "\n"); |
| 163 | #endif |
| 164 | } |
| 165 | debug("\nDRAM: "); |
| 166 | #else |
| 167 | size = gd->ram_size; |
| 168 | #endif |
| 169 | |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 170 | print_size(size, ""); |
| 171 | board_add_ram_info(0); |
| 172 | putc('\n'); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 173 | |
| 174 | return 0; |
| 175 | } |
| 176 | |
Simon Glass | 76b00ac | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 177 | __weak int dram_init_banksize(void) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 178 | { |
| 179 | #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) |
| 180 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; |
| 181 | gd->bd->bi_dram[0].size = get_effective_memsize(); |
| 182 | #endif |
Simon Glass | 76b00ac | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 183 | |
| 184 | return 0; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 185 | } |
| 186 | |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 187 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 188 | static int init_func_i2c(void) |
| 189 | { |
| 190 | puts("I2C: "); |
trem | 815a76f | 2013-09-21 18:13:34 +0200 | [diff] [blame] | 191 | #ifdef CONFIG_SYS_I2C |
| 192 | i2c_init_all(); |
| 193 | #else |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 194 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
trem | 815a76f | 2013-09-21 18:13:34 +0200 | [diff] [blame] | 195 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 196 | puts("ready\n"); |
| 197 | return 0; |
| 198 | } |
| 199 | #endif |
| 200 | |
| 201 | #if defined(CONFIG_HARD_SPI) |
| 202 | static int init_func_spi(void) |
| 203 | { |
| 204 | puts("SPI: "); |
| 205 | spi_init(); |
| 206 | puts("ready\n"); |
| 207 | return 0; |
| 208 | } |
| 209 | #endif |
| 210 | |
| 211 | __maybe_unused |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 212 | static int zero_global_data(void) |
| 213 | { |
| 214 | memset((void *)gd, '\0', sizeof(gd_t)); |
| 215 | |
| 216 | return 0; |
| 217 | } |
| 218 | |
| 219 | static int setup_mon_len(void) |
| 220 | { |
Michal Simek | e945f6d | 2014-05-08 16:08:44 +0200 | [diff] [blame] | 221 | #if defined(__ARM__) || defined(__MICROBLAZE__) |
Albert ARIBAUD | b60eff3 | 2014-02-22 17:53:43 +0100 | [diff] [blame] | 222 | gd->mon_len = (ulong)&__bss_end - (ulong)_start; |
Ben Stoltz | 9b21749 | 2015-07-31 09:31:37 -0600 | [diff] [blame] | 223 | #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP) |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 224 | gd->mon_len = (ulong)&_end - (ulong)_init; |
Tom Rini | ea3310e | 2017-03-14 11:08:10 -0400 | [diff] [blame] | 225 | #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA) |
Sonic Zhang | d54d7eb | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 226 | gd->mon_len = CONFIG_SYS_MONITOR_LEN; |
Vladimir Zapolskiy | e2099d7 | 2016-11-28 00:15:24 +0200 | [diff] [blame] | 227 | #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) |
Kun-Hua Huang | 2e88bb2 | 2015-08-24 14:52:35 +0800 | [diff] [blame] | 228 | gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start); |
Simon Glass | b0b3595 | 2016-05-14 18:49:28 -0600 | [diff] [blame] | 229 | #elif defined(CONFIG_SYS_MONITOR_BASE) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 230 | /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */ |
| 231 | gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; |
Simon Glass | 632efa7 | 2013-03-11 07:06:48 +0000 | [diff] [blame] | 232 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 233 | return 0; |
| 234 | } |
| 235 | |
| 236 | __weak int arch_cpu_init(void) |
| 237 | { |
| 238 | return 0; |
| 239 | } |
| 240 | |
Paul Burton | 8ebf506 | 2016-09-21 11:18:46 +0100 | [diff] [blame] | 241 | __weak int mach_cpu_init(void) |
| 242 | { |
| 243 | return 0; |
| 244 | } |
| 245 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 246 | /* Get the top of usable RAM */ |
| 247 | __weak ulong board_get_usable_ram_top(ulong total_size) |
| 248 | { |
Stephen Warren | 1e4d11a | 2014-12-23 10:34:49 -0700 | [diff] [blame] | 249 | #ifdef CONFIG_SYS_SDRAM_BASE |
| 250 | /* |
Simon Glass | 4c50934 | 2015-04-28 20:25:03 -0600 | [diff] [blame] | 251 | * Detect whether we have so much RAM that it goes past the end of our |
Stephen Warren | 1e4d11a | 2014-12-23 10:34:49 -0700 | [diff] [blame] | 252 | * 32-bit address space. If so, clip the usable RAM so it doesn't. |
| 253 | */ |
| 254 | if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) |
| 255 | /* |
| 256 | * Will wrap back to top of 32-bit space when reservations |
| 257 | * are made. |
| 258 | */ |
| 259 | return 0; |
| 260 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 261 | return gd->ram_top; |
| 262 | } |
| 263 | |
| 264 | static int setup_dest_addr(void) |
| 265 | { |
| 266 | debug("Monitor len: %08lX\n", gd->mon_len); |
| 267 | /* |
| 268 | * Ram is setup, size stored in gd !! |
| 269 | */ |
| 270 | debug("Ram size: %08lX\n", (ulong)gd->ram_size); |
York Sun | 36cc0de | 2017-03-06 09:02:28 -0800 | [diff] [blame] | 271 | #if defined(CONFIG_SYS_MEM_TOP_HIDE) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 272 | /* |
| 273 | * Subtract specified amount of memory to hide so that it won't |
| 274 | * get "touched" at all by U-Boot. By fixing up gd->ram_size |
| 275 | * the Linux kernel should now get passed the now "corrected" |
York Sun | 36cc0de | 2017-03-06 09:02:28 -0800 | [diff] [blame] | 276 | * memory size and won't touch it either. This should work |
| 277 | * for arch/ppc and arch/powerpc. Only Linux board ports in |
| 278 | * arch/powerpc with bootwrapper support, that recalculate the |
| 279 | * memory size from the SDRAM controller setup will have to |
| 280 | * get fixed. |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 281 | */ |
York Sun | 36cc0de | 2017-03-06 09:02:28 -0800 | [diff] [blame] | 282 | gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; |
| 283 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 284 | #ifdef CONFIG_SYS_SDRAM_BASE |
| 285 | gd->ram_top = CONFIG_SYS_SDRAM_BASE; |
| 286 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 287 | gd->ram_top += get_effective_memsize(); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 288 | gd->ram_top = board_get_usable_ram_top(gd->mon_len); |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 289 | gd->relocaddr = gd->ram_top; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 290 | debug("Ram top: %08lX\n", (ulong)gd->ram_top); |
Gabriel Huau | ec3b482 | 2014-09-03 13:57:54 -0700 | [diff] [blame] | 291 | #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 292 | /* |
| 293 | * We need to make sure the location we intend to put secondary core |
| 294 | * boot code is reserved and not used by any part of u-boot |
| 295 | */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 296 | if (gd->relocaddr > determine_mp_bootpg(NULL)) { |
| 297 | gd->relocaddr = determine_mp_bootpg(NULL); |
| 298 | debug("Reserving MP boot page to %08lx\n", gd->relocaddr); |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 299 | } |
| 300 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 301 | return 0; |
| 302 | } |
| 303 | |
Simon Glass | b56db48 | 2017-03-31 08:40:28 -0600 | [diff] [blame] | 304 | #if defined(CONFIG_LOGBUFFER) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 305 | static int reserve_logbuffer(void) |
| 306 | { |
Simon Glass | b56db48 | 2017-03-31 08:40:28 -0600 | [diff] [blame] | 307 | #ifndef CONFIG_ALT_LB_ADDR |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 308 | /* reserve kernel log buffer */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 309 | gd->relocaddr -= LOGBUFF_RESERVE; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 310 | debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 311 | gd->relocaddr); |
Simon Glass | b56db48 | 2017-03-31 08:40:28 -0600 | [diff] [blame] | 312 | #endif |
| 313 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 314 | return 0; |
| 315 | } |
| 316 | #endif |
| 317 | |
| 318 | #ifdef CONFIG_PRAM |
| 319 | /* reserve protected RAM */ |
| 320 | static int reserve_pram(void) |
| 321 | { |
| 322 | ulong reg; |
| 323 | |
| 324 | reg = getenv_ulong("pram", 10, CONFIG_PRAM); |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 325 | gd->relocaddr -= (reg << 10); /* size is in kB */ |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 326 | debug("Reserving %ldk for protected RAM at %08lx\n", reg, |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 327 | gd->relocaddr); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 328 | return 0; |
| 329 | } |
| 330 | #endif /* CONFIG_PRAM */ |
| 331 | |
| 332 | /* Round memory pointer down to next 4 kB limit */ |
| 333 | static int reserve_round_4k(void) |
| 334 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 335 | gd->relocaddr &= ~(4096 - 1); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 336 | return 0; |
| 337 | } |
| 338 | |
Simon Glass | 80d4bcd | 2017-03-31 08:40:29 -0600 | [diff] [blame] | 339 | #ifdef CONFIG_ARM |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 340 | static int reserve_mmu(void) |
| 341 | { |
Simon Glass | 80d4bcd | 2017-03-31 08:40:29 -0600 | [diff] [blame] | 342 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 343 | /* reserve TLB table */ |
David Feng | cce6be7 | 2013-12-14 11:47:36 +0800 | [diff] [blame] | 344 | gd->arch.tlb_size = PGTABLE_SIZE; |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 345 | gd->relocaddr -= gd->arch.tlb_size; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 346 | |
| 347 | /* round down to next 64 kB limit */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 348 | gd->relocaddr &= ~(0x10000 - 1); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 349 | |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 350 | gd->arch.tlb_addr = gd->relocaddr; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 351 | debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr, |
| 352 | gd->arch.tlb_addr + gd->arch.tlb_size); |
York Sun | 50e93b9 | 2016-06-24 16:46:19 -0700 | [diff] [blame] | 353 | |
| 354 | #ifdef CONFIG_SYS_MEM_RESERVE_SECURE |
| 355 | /* |
| 356 | * Record allocated tlb_addr in case gd->tlb_addr to be overwritten |
| 357 | * with location within secure ram. |
| 358 | */ |
| 359 | gd->arch.tlb_allocated = gd->arch.tlb_addr; |
| 360 | #endif |
Simon Glass | 80d4bcd | 2017-03-31 08:40:29 -0600 | [diff] [blame] | 361 | #endif |
York Sun | 50e93b9 | 2016-06-24 16:46:19 -0700 | [diff] [blame] | 362 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 363 | return 0; |
| 364 | } |
| 365 | #endif |
| 366 | |
Simon Glass | 5a54194 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 367 | static int reserve_video(void) |
| 368 | { |
Simon Glass | 0f079eb | 2017-03-31 08:40:30 -0600 | [diff] [blame] | 369 | #ifdef CONFIG_DM_VIDEO |
Simon Glass | 5a54194 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 370 | ulong addr; |
| 371 | int ret; |
| 372 | |
| 373 | addr = gd->relocaddr; |
| 374 | ret = video_reserve(&addr); |
| 375 | if (ret) |
| 376 | return ret; |
| 377 | gd->relocaddr = addr; |
Simon Glass | 0f079eb | 2017-03-31 08:40:30 -0600 | [diff] [blame] | 378 | #elif defined(CONFIG_LCD) |
Simon Glass | 5a54194 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 379 | # ifdef CONFIG_FB_ADDR |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 380 | gd->fb_base = CONFIG_FB_ADDR; |
Simon Glass | 5a54194 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 381 | # else |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 382 | /* reserve memory for LCD display (always full pages) */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 383 | gd->relocaddr = lcd_setmem(gd->relocaddr); |
| 384 | gd->fb_base = gd->relocaddr; |
Simon Glass | 5a54194 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 385 | # endif /* CONFIG_FB_ADDR */ |
Simon Glass | 0f079eb | 2017-03-31 08:40:30 -0600 | [diff] [blame] | 386 | #elif defined(CONFIG_VIDEO) && \ |
| 387 | (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \ |
Simon Glass | 8703ef3 | 2016-01-18 19:52:20 -0700 | [diff] [blame] | 388 | !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \ |
Tom Rini | ea3310e | 2017-03-14 11:08:10 -0400 | [diff] [blame] | 389 | !defined(CONFIG_M68K) |
Simon Glass | 8703ef3 | 2016-01-18 19:52:20 -0700 | [diff] [blame] | 390 | /* reserve memory for video display (always full pages) */ |
| 391 | gd->relocaddr = video_setmem(gd->relocaddr); |
| 392 | gd->fb_base = gd->relocaddr; |
Simon Glass | 0f079eb | 2017-03-31 08:40:30 -0600 | [diff] [blame] | 393 | #endif |
Simon Glass | 8703ef3 | 2016-01-18 19:52:20 -0700 | [diff] [blame] | 394 | |
| 395 | return 0; |
| 396 | } |
Simon Glass | 8703ef3 | 2016-01-18 19:52:20 -0700 | [diff] [blame] | 397 | |
Simon Glass | 71c52db | 2013-06-11 11:14:42 -0700 | [diff] [blame] | 398 | static int reserve_trace(void) |
| 399 | { |
| 400 | #ifdef CONFIG_TRACE |
| 401 | gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE; |
| 402 | gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE); |
| 403 | debug("Reserving %dk for trace data at: %08lx\n", |
| 404 | CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr); |
| 405 | #endif |
| 406 | |
| 407 | return 0; |
| 408 | } |
| 409 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 410 | static int reserve_uboot(void) |
| 411 | { |
| 412 | /* |
| 413 | * reserve memory for U-Boot code, data & bss |
| 414 | * round down to next 4 kB limit |
| 415 | */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 416 | gd->relocaddr -= gd->mon_len; |
| 417 | gd->relocaddr &= ~(4096 - 1); |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 418 | #ifdef CONFIG_E500 |
| 419 | /* round down to next 64 kB limit so that IVPR stays aligned */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 420 | gd->relocaddr &= ~(65536 - 1); |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 421 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 422 | |
| 423 | debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 424 | gd->relocaddr); |
| 425 | |
| 426 | gd->start_addr_sp = gd->relocaddr; |
| 427 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 428 | return 0; |
| 429 | } |
| 430 | |
| 431 | /* reserve memory for malloc() area */ |
| 432 | static int reserve_malloc(void) |
| 433 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 434 | gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 435 | debug("Reserving %dk for malloc() at: %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 436 | TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 437 | return 0; |
| 438 | } |
| 439 | |
| 440 | /* (permanently) allocate a Board Info struct */ |
| 441 | static int reserve_board(void) |
| 442 | { |
Sonic Zhang | d54d7eb | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 443 | if (!gd->bd) { |
| 444 | gd->start_addr_sp -= sizeof(bd_t); |
| 445 | gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t)); |
| 446 | memset(gd->bd, '\0', sizeof(bd_t)); |
| 447 | debug("Reserving %zu Bytes for Board Info at: %08lx\n", |
| 448 | sizeof(bd_t), gd->start_addr_sp); |
| 449 | } |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 450 | return 0; |
| 451 | } |
| 452 | |
| 453 | static int setup_machine(void) |
| 454 | { |
| 455 | #ifdef CONFIG_MACH_TYPE |
| 456 | gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */ |
| 457 | #endif |
| 458 | return 0; |
| 459 | } |
| 460 | |
| 461 | static int reserve_global_data(void) |
| 462 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 463 | gd->start_addr_sp -= sizeof(gd_t); |
| 464 | gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t)); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 465 | debug("Reserving %zu Bytes for Global Data at: %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 466 | sizeof(gd_t), gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 467 | return 0; |
| 468 | } |
| 469 | |
| 470 | static int reserve_fdt(void) |
| 471 | { |
Siva Durga Prasad Paladugu | e9acb9e | 2015-12-03 15:46:03 +0100 | [diff] [blame] | 472 | #ifndef CONFIG_OF_EMBED |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 473 | /* |
Simon Glass | 4c50934 | 2015-04-28 20:25:03 -0600 | [diff] [blame] | 474 | * If the device tree is sitting immediately above our image then we |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 475 | * must relocate it. If it is embedded in the data section, then it |
| 476 | * will be relocated with other data. |
| 477 | */ |
| 478 | if (gd->fdt_blob) { |
| 479 | gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); |
| 480 | |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 481 | gd->start_addr_sp -= gd->fdt_size; |
| 482 | gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size); |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 483 | debug("Reserving %lu Bytes for FDT at: %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 484 | gd->fdt_size, gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 485 | } |
Siva Durga Prasad Paladugu | e9acb9e | 2015-12-03 15:46:03 +0100 | [diff] [blame] | 486 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 487 | |
| 488 | return 0; |
| 489 | } |
| 490 | |
Andreas Bießmann | 68145d4 | 2015-02-06 23:06:45 +0100 | [diff] [blame] | 491 | int arch_reserve_stacks(void) |
| 492 | { |
| 493 | return 0; |
| 494 | } |
| 495 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 496 | static int reserve_stacks(void) |
| 497 | { |
Andreas Bießmann | 68145d4 | 2015-02-06 23:06:45 +0100 | [diff] [blame] | 498 | /* make stack pointer 16-byte aligned */ |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 499 | gd->start_addr_sp -= 16; |
| 500 | gd->start_addr_sp &= ~0xf; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 501 | |
| 502 | /* |
Simon Glass | 4c50934 | 2015-04-28 20:25:03 -0600 | [diff] [blame] | 503 | * let the architecture-specific code tailor gd->start_addr_sp and |
Andreas Bießmann | 68145d4 | 2015-02-06 23:06:45 +0100 | [diff] [blame] | 504 | * gd->irq_sp |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 505 | */ |
Andreas Bießmann | 68145d4 | 2015-02-06 23:06:45 +0100 | [diff] [blame] | 506 | return arch_reserve_stacks(); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 507 | } |
| 508 | |
| 509 | static int display_new_sp(void) |
| 510 | { |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 511 | debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 512 | |
| 513 | return 0; |
| 514 | } |
| 515 | |
Vladimir Zapolskiy | e2099d7 | 2016-11-28 00:15:24 +0200 | [diff] [blame] | 516 | #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ |
| 517 | defined(CONFIG_SH) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 518 | static int setup_board_part1(void) |
| 519 | { |
| 520 | bd_t *bd = gd->bd; |
| 521 | |
| 522 | /* |
| 523 | * Save local variables to board info struct |
| 524 | */ |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 525 | bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */ |
| 526 | bd->bi_memsize = gd->ram_size; /* size in bytes */ |
| 527 | |
| 528 | #ifdef CONFIG_SYS_SRAM_BASE |
| 529 | bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */ |
| 530 | bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */ |
| 531 | #endif |
| 532 | |
Masahiro Yamada | 58dac32 | 2014-03-05 17:40:10 +0900 | [diff] [blame] | 533 | #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \ |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 534 | defined(CONFIG_E500) || defined(CONFIG_MPC86xx) |
| 535 | bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ |
| 536 | #endif |
angelo@sysam.it | e310b93 | 2015-02-12 01:40:17 +0100 | [diff] [blame] | 537 | #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 538 | bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ |
| 539 | #endif |
| 540 | #if defined(CONFIG_MPC83xx) |
| 541 | bd->bi_immrbar = CONFIG_SYS_IMMR; |
| 542 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 543 | |
| 544 | return 0; |
| 545 | } |
Daniel Schwierzeck | fb3db63 | 2015-11-01 17:36:13 +0100 | [diff] [blame] | 546 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 547 | |
Daniel Schwierzeck | fb3db63 | 2015-11-01 17:36:13 +0100 | [diff] [blame] | 548 | #if defined(CONFIG_PPC) || defined(CONFIG_M68K) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 549 | static int setup_board_part2(void) |
| 550 | { |
| 551 | bd_t *bd = gd->bd; |
| 552 | |
| 553 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ |
| 554 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ |
| 555 | #if defined(CONFIG_CPM2) |
| 556 | bd->bi_cpmfreq = gd->arch.cpm_clk; |
| 557 | bd->bi_brgfreq = gd->arch.brg_clk; |
| 558 | bd->bi_sccfreq = gd->arch.scc_clk; |
| 559 | bd->bi_vco = gd->arch.vco_out; |
| 560 | #endif /* CONFIG_CPM2 */ |
| 561 | #if defined(CONFIG_MPC512X) |
| 562 | bd->bi_ipsfreq = gd->arch.ips_clk; |
| 563 | #endif /* CONFIG_MPC512X */ |
| 564 | #if defined(CONFIG_MPC5xxx) |
| 565 | bd->bi_ipbfreq = gd->arch.ipb_clk; |
| 566 | bd->bi_pcifreq = gd->pci_clk; |
| 567 | #endif /* CONFIG_MPC5xxx */ |
Alison Wang | 1313db4 | 2015-02-12 18:33:15 +0800 | [diff] [blame] | 568 | #if defined(CONFIG_M68K) && defined(CONFIG_PCI) |
| 569 | bd->bi_pcifreq = gd->pci_clk; |
| 570 | #endif |
| 571 | #if defined(CONFIG_EXTRA_CLOCK) |
| 572 | bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ |
| 573 | bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ |
| 574 | bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ |
| 575 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 576 | |
| 577 | return 0; |
| 578 | } |
| 579 | #endif |
| 580 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 581 | #ifdef CONFIG_POST |
| 582 | static int init_post(void) |
| 583 | { |
| 584 | post_bootmode_init(); |
| 585 | post_run(NULL, POST_ROM | post_bootmode_get(0)); |
| 586 | |
| 587 | return 0; |
| 588 | } |
| 589 | #endif |
| 590 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 591 | static int reloc_fdt(void) |
| 592 | { |
Siva Durga Prasad Paladugu | e9acb9e | 2015-12-03 15:46:03 +0100 | [diff] [blame] | 593 | #ifndef CONFIG_OF_EMBED |
Simon Glass | f05ad9b | 2015-08-04 12:33:39 -0600 | [diff] [blame] | 594 | if (gd->flags & GD_FLG_SKIP_RELOC) |
| 595 | return 0; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 596 | if (gd->new_fdt) { |
| 597 | memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); |
| 598 | gd->fdt_blob = gd->new_fdt; |
| 599 | } |
Siva Durga Prasad Paladugu | e9acb9e | 2015-12-03 15:46:03 +0100 | [diff] [blame] | 600 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 601 | |
| 602 | return 0; |
| 603 | } |
| 604 | |
| 605 | static int setup_reloc(void) |
| 606 | { |
Simon Glass | f05ad9b | 2015-08-04 12:33:39 -0600 | [diff] [blame] | 607 | if (gd->flags & GD_FLG_SKIP_RELOC) { |
| 608 | debug("Skipping relocation due to flag\n"); |
| 609 | return 0; |
| 610 | } |
| 611 | |
Sonic Zhang | d54d7eb | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 612 | #ifdef CONFIG_SYS_TEXT_BASE |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 613 | gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; |
angelo@sysam.it | e310b93 | 2015-02-12 01:40:17 +0100 | [diff] [blame] | 614 | #ifdef CONFIG_M68K |
| 615 | /* |
| 616 | * On all ColdFire arch cpu, monitor code starts always |
| 617 | * just after the default vector table location, so at 0x400 |
| 618 | */ |
| 619 | gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); |
| 620 | #endif |
Sonic Zhang | d54d7eb | 2014-07-17 19:01:34 +0800 | [diff] [blame] | 621 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 622 | memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); |
| 623 | |
| 624 | debug("Relocation Offset is: %08lx\n", gd->reloc_off); |
Simon Glass | a733b06 | 2013-04-26 02:53:43 +0000 | [diff] [blame] | 625 | debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n", |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 626 | gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd), |
| 627 | gd->start_addr_sp); |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 628 | |
| 629 | return 0; |
| 630 | } |
| 631 | |
mario.six@gdsys.cc | 2a79275 | 2017-02-22 16:07:22 +0100 | [diff] [blame] | 632 | #ifdef CONFIG_OF_BOARD_FIXUP |
| 633 | static int fix_fdt(void) |
| 634 | { |
| 635 | return board_fix_fdt((void *)gd->fdt_blob); |
| 636 | } |
| 637 | #endif |
| 638 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 639 | /* ARM calls relocate_code from its crt0.S */ |
Simon Glass | 530f27e | 2017-01-16 07:03:49 -0700 | [diff] [blame] | 640 | #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ |
| 641 | !CONFIG_IS_ENABLED(X86_64) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 642 | |
| 643 | static int jump_to_copy(void) |
| 644 | { |
Simon Glass | f05ad9b | 2015-08-04 12:33:39 -0600 | [diff] [blame] | 645 | if (gd->flags & GD_FLG_SKIP_RELOC) |
| 646 | return 0; |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 647 | /* |
| 648 | * x86 is special, but in a nice way. It uses a trampoline which |
| 649 | * enables the dcache if possible. |
| 650 | * |
| 651 | * For now, other archs use relocate_code(), which is implemented |
| 652 | * similarly for all archs. When we do generic relocation, hopefully |
| 653 | * we can make all archs enable the dcache prior to relocation. |
| 654 | */ |
Alexey Brodkin | 3fb8016 | 2015-02-24 19:40:36 +0300 | [diff] [blame] | 655 | #if defined(CONFIG_X86) || defined(CONFIG_ARC) |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 656 | /* |
| 657 | * SDRAM and console are now initialised. The final stack can now |
| 658 | * be setup in SDRAM. Code execution will continue in Flash, but |
| 659 | * with the stack in SDRAM and Global Data in temporary memory |
| 660 | * (CPU cache) |
| 661 | */ |
Simon Glass | f0c7d9c | 2015-08-10 20:44:32 -0600 | [diff] [blame] | 662 | arch_setup_gd(gd->new_gd); |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 663 | board_init_f_r_trampoline(gd->start_addr_sp); |
| 664 | #else |
Masahiro Yamada | a0ba279 | 2013-05-27 00:37:30 +0000 | [diff] [blame] | 665 | relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 666 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 667 | |
| 668 | return 0; |
| 669 | } |
| 670 | #endif |
| 671 | |
| 672 | /* Record the board_init_f() bootstage (after arch_cpu_init()) */ |
| 673 | static int mark_bootstage(void) |
| 674 | { |
| 675 | bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f"); |
| 676 | |
| 677 | return 0; |
| 678 | } |
| 679 | |
Simon Glass | 9854a87 | 2015-11-08 23:47:48 -0700 | [diff] [blame] | 680 | static int initf_console_record(void) |
| 681 | { |
| 682 | #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN) |
| 683 | return console_record_init(); |
| 684 | #else |
| 685 | return 0; |
| 686 | #endif |
| 687 | } |
| 688 | |
Simon Glass | ab7cd62 | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 689 | static int initf_dm(void) |
| 690 | { |
| 691 | #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN) |
| 692 | int ret; |
| 693 | |
| 694 | ret = dm_init_and_scan(true); |
| 695 | if (ret) |
| 696 | return ret; |
| 697 | #endif |
Simon Glass | 1057e6c | 2016-02-24 09:14:50 -0700 | [diff] [blame] | 698 | #ifdef CONFIG_TIMER_EARLY |
| 699 | ret = dm_timer_init(); |
| 700 | if (ret) |
| 701 | return ret; |
| 702 | #endif |
Simon Glass | ab7cd62 | 2014-07-23 06:55:04 -0600 | [diff] [blame] | 703 | |
| 704 | return 0; |
| 705 | } |
| 706 | |
Simon Glass | 146251f | 2015-01-19 22:16:12 -0700 | [diff] [blame] | 707 | /* Architecture-specific memory reservation */ |
| 708 | __weak int reserve_arch(void) |
| 709 | { |
| 710 | return 0; |
| 711 | } |
| 712 | |
Simon Glass | d4c671c | 2015-03-05 12:25:16 -0700 | [diff] [blame] | 713 | __weak int arch_cpu_init_dm(void) |
| 714 | { |
| 715 | return 0; |
| 716 | } |
| 717 | |
Simon Glass | 4acff45 | 2017-01-16 07:03:50 -0700 | [diff] [blame] | 718 | static const init_fnc_t init_sequence_f[] = { |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 719 | setup_mon_len, |
Simon Glass | b45122f | 2015-02-27 22:06:34 -0700 | [diff] [blame] | 720 | #ifdef CONFIG_OF_CONTROL |
Simon Glass | 0879361 | 2015-02-27 22:06:35 -0700 | [diff] [blame] | 721 | fdtdec_setup, |
Simon Glass | b45122f | 2015-02-27 22:06:34 -0700 | [diff] [blame] | 722 | #endif |
Kevin Hilman | d210718 | 2014-12-09 15:03:58 -0800 | [diff] [blame] | 723 | #ifdef CONFIG_TRACE |
Simon Glass | 71c52db | 2013-06-11 11:14:42 -0700 | [diff] [blame] | 724 | trace_early_init, |
Kevin Hilman | d210718 | 2014-12-09 15:03:58 -0800 | [diff] [blame] | 725 | #endif |
Simon Glass | 768e0f5 | 2014-11-10 18:00:18 -0700 | [diff] [blame] | 726 | initf_malloc, |
Simon Glass | 9854a87 | 2015-11-08 23:47:48 -0700 | [diff] [blame] | 727 | initf_console_record, |
Simon Glass | 671549e | 2017-03-28 10:27:18 -0600 | [diff] [blame] | 728 | #if defined(CONFIG_HAVE_FSP) |
| 729 | arch_fsp_init, |
Bin Meng | a52a068e | 2015-08-20 06:40:18 -0700 | [diff] [blame] | 730 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 731 | arch_cpu_init, /* basic arch cpu dependent setup */ |
Paul Burton | 8ebf506 | 2016-09-21 11:18:46 +0100 | [diff] [blame] | 732 | mach_cpu_init, /* SoC/machine dependent CPU setup */ |
Simon Glass | 3ea0953 | 2014-09-03 17:36:59 -0600 | [diff] [blame] | 733 | initf_dm, |
Simon Glass | d4c671c | 2015-03-05 12:25:16 -0700 | [diff] [blame] | 734 | arch_cpu_init_dm, |
Thomas Chou | 6752195 | 2015-10-30 15:35:51 +0800 | [diff] [blame] | 735 | mark_bootstage, /* need timer, go after init dm */ |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 736 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
| 737 | board_early_init_f, |
| 738 | #endif |
Simon Glass | 727e94a | 2017-03-28 10:27:26 -0600 | [diff] [blame] | 739 | #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K) |
Simon Glass | c252c06 | 2017-03-28 10:27:19 -0600 | [diff] [blame] | 740 | /* get CPU and bus clocks according to the environment variable */ |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 741 | get_clocks, /* get CPU and bus clocks (etc.) */ |
Simon Glass | 1793e78 | 2017-03-28 10:27:23 -0600 | [diff] [blame] | 742 | #endif |
Angelo Dureghello | 0ce4528 | 2017-05-10 23:58:06 +0200 | [diff] [blame] | 743 | #if !defined(CONFIG_M68K) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 744 | timer_init, /* initialize timer */ |
Angelo Dureghello | 0ce4528 | 2017-05-10 23:58:06 +0200 | [diff] [blame] | 745 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 746 | #if defined(CONFIG_BOARD_POSTCLK_INIT) |
| 747 | board_postclk_init, |
| 748 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 749 | env_init, /* initialize environment */ |
| 750 | init_baud_rate, /* initialze baudrate settings */ |
| 751 | serial_init, /* serial communications setup */ |
| 752 | console_init_f, /* stage 1 init of console */ |
| 753 | display_options, /* say that we are here */ |
| 754 | display_text_info, /* show debugging info if required */ |
Simon Glass | 76d1d02 | 2017-03-28 10:27:30 -0600 | [diff] [blame] | 755 | #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \ |
| 756 | defined(CONFIG_X86) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 757 | checkcpu, |
| 758 | #endif |
Simon Glass | cc66400 | 2017-01-23 13:31:25 -0700 | [diff] [blame] | 759 | #if defined(CONFIG_DISPLAY_CPUINFO) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 760 | print_cpuinfo, /* display cpu info (and speed) */ |
Simon Glass | cc66400 | 2017-01-23 13:31:25 -0700 | [diff] [blame] | 761 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 762 | #if defined(CONFIG_DISPLAY_BOARDINFO) |
Masahiro Yamada | 0365ffc | 2015-01-14 17:07:05 +0900 | [diff] [blame] | 763 | show_board_info, |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 764 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 765 | INIT_FUNC_WATCHDOG_INIT |
| 766 | #if defined(CONFIG_MISC_INIT_F) |
| 767 | misc_init_f, |
| 768 | #endif |
| 769 | INIT_FUNC_WATCHDOG_RESET |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 770 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 771 | init_func_i2c, |
| 772 | #endif |
| 773 | #if defined(CONFIG_HARD_SPI) |
| 774 | init_func_spi, |
| 775 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 776 | announce_dram_init, |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 777 | dram_init, /* configure available RAM banks */ |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 778 | #ifdef CONFIG_POST |
| 779 | post_init_f, |
| 780 | #endif |
| 781 | INIT_FUNC_WATCHDOG_RESET |
| 782 | #if defined(CONFIG_SYS_DRAM_TEST) |
| 783 | testdram, |
| 784 | #endif /* CONFIG_SYS_DRAM_TEST */ |
| 785 | INIT_FUNC_WATCHDOG_RESET |
| 786 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 787 | #ifdef CONFIG_POST |
| 788 | init_post, |
| 789 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 790 | INIT_FUNC_WATCHDOG_RESET |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 791 | /* |
| 792 | * Now that we have DRAM mapped and working, we can |
| 793 | * relocate the code and continue running from DRAM. |
| 794 | * |
| 795 | * Reserve memory at end of RAM for (top down in that order): |
| 796 | * - area that won't get touched by U-Boot and Linux (optional) |
| 797 | * - kernel log buffer |
| 798 | * - protected RAM |
| 799 | * - LCD framebuffer |
| 800 | * - monitor code |
| 801 | * - board info struct |
| 802 | */ |
| 803 | setup_dest_addr, |
Simon Glass | b56db48 | 2017-03-31 08:40:28 -0600 | [diff] [blame] | 804 | #if defined(CONFIG_LOGBUFFER) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 805 | reserve_logbuffer, |
| 806 | #endif |
| 807 | #ifdef CONFIG_PRAM |
| 808 | reserve_pram, |
| 809 | #endif |
| 810 | reserve_round_4k, |
Simon Glass | 80d4bcd | 2017-03-31 08:40:29 -0600 | [diff] [blame] | 811 | #ifdef CONFIG_ARM |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 812 | reserve_mmu, |
| 813 | #endif |
Simon Glass | 5a54194 | 2016-01-18 19:52:21 -0700 | [diff] [blame] | 814 | reserve_video, |
Simon Glass | 8703ef3 | 2016-01-18 19:52:20 -0700 | [diff] [blame] | 815 | reserve_trace, |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 816 | reserve_uboot, |
| 817 | reserve_malloc, |
| 818 | reserve_board, |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 819 | setup_machine, |
| 820 | reserve_global_data, |
| 821 | reserve_fdt, |
Simon Glass | 146251f | 2015-01-19 22:16:12 -0700 | [diff] [blame] | 822 | reserve_arch, |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 823 | reserve_stacks, |
Simon Glass | 76b00ac | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 824 | dram_init_banksize, |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 825 | show_dram_config, |
Vladimir Zapolskiy | e2099d7 | 2016-11-28 00:15:24 +0200 | [diff] [blame] | 826 | #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \ |
| 827 | defined(CONFIG_SH) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 828 | setup_board_part1, |
Daniel Schwierzeck | fb3db63 | 2015-11-01 17:36:13 +0100 | [diff] [blame] | 829 | #endif |
| 830 | #if defined(CONFIG_PPC) || defined(CONFIG_M68K) |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 831 | INIT_FUNC_WATCHDOG_RESET |
| 832 | setup_board_part2, |
| 833 | #endif |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 834 | display_new_sp, |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 835 | #ifdef CONFIG_SYS_EXTBDINFO |
| 836 | setup_board_extra, |
| 837 | #endif |
mario.six@gdsys.cc | 2a79275 | 2017-02-22 16:07:22 +0100 | [diff] [blame] | 838 | #ifdef CONFIG_OF_BOARD_FIXUP |
| 839 | fix_fdt, |
| 840 | #endif |
Simon Glass | e4fef6c | 2013-03-11 14:30:42 +0000 | [diff] [blame] | 841 | INIT_FUNC_WATCHDOG_RESET |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 842 | reloc_fdt, |
| 843 | setup_reloc, |
Alexey Brodkin | 3fb8016 | 2015-02-24 19:40:36 +0300 | [diff] [blame] | 844 | #if defined(CONFIG_X86) || defined(CONFIG_ARC) |
Simon Glass | 313aef3 | 2015-01-01 16:18:09 -0700 | [diff] [blame] | 845 | copy_uboot_to_ram, |
Simon Glass | 313aef3 | 2015-01-01 16:18:09 -0700 | [diff] [blame] | 846 | do_elf_reloc_fixups, |
Simon Glass | 6bda55a | 2017-01-16 07:03:52 -0700 | [diff] [blame] | 847 | clear_bss, |
Simon Glass | 313aef3 | 2015-01-01 16:18:09 -0700 | [diff] [blame] | 848 | #endif |
Chris Zankel | de5e5ce | 2016-08-10 18:36:43 +0300 | [diff] [blame] | 849 | #if defined(CONFIG_XTENSA) |
| 850 | clear_bss, |
| 851 | #endif |
Simon Glass | 530f27e | 2017-01-16 07:03:49 -0700 | [diff] [blame] | 852 | #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ |
| 853 | !CONFIG_IS_ENABLED(X86_64) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 854 | jump_to_copy, |
| 855 | #endif |
| 856 | NULL, |
| 857 | }; |
| 858 | |
| 859 | void board_init_f(ulong boot_flags) |
| 860 | { |
York Sun | 2a1680e | 2014-05-02 17:28:04 -0700 | [diff] [blame] | 861 | #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA |
| 862 | /* |
Robert P. J. Day | fc0b594 | 2016-09-07 14:27:59 -0400 | [diff] [blame] | 863 | * For some architectures, global data is initialized and used before |
York Sun | 2a1680e | 2014-05-02 17:28:04 -0700 | [diff] [blame] | 864 | * calling this function. The data should be preserved. For others, |
| 865 | * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack |
| 866 | * here to host global data until relocation. |
| 867 | */ |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 868 | gd_t data; |
| 869 | |
| 870 | gd = &data; |
| 871 | |
David Feng | cce6be7 | 2013-12-14 11:47:36 +0800 | [diff] [blame] | 872 | /* |
| 873 | * Clear global data before it is accessed at debug print |
| 874 | * in initcall_run_list. Otherwise the debug print probably |
Robert P. J. Day | fc0b594 | 2016-09-07 14:27:59 -0400 | [diff] [blame] | 875 | * get the wrong value of gd->have_console. |
David Feng | cce6be7 | 2013-12-14 11:47:36 +0800 | [diff] [blame] | 876 | */ |
David Feng | cce6be7 | 2013-12-14 11:47:36 +0800 | [diff] [blame] | 877 | zero_global_data(); |
| 878 | #endif |
| 879 | |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 880 | gd->flags = boot_flags; |
Alexey Brodkin | 9aed5a2 | 2013-11-27 22:32:40 +0400 | [diff] [blame] | 881 | gd->have_console = 0; |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 882 | |
| 883 | if (initcall_run_list(init_sequence_f)) |
| 884 | hang(); |
| 885 | |
Ben Stoltz | 9b21749 | 2015-07-31 09:31:37 -0600 | [diff] [blame] | 886 | #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \ |
Simon Glass | 530f27e | 2017-01-16 07:03:49 -0700 | [diff] [blame] | 887 | !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) |
Simon Glass | 1938f4a | 2013-03-11 06:49:53 +0000 | [diff] [blame] | 888 | /* NOTREACHED - jump_to_copy() does not return */ |
| 889 | hang(); |
| 890 | #endif |
| 891 | } |
| 892 | |
Alexey Brodkin | 3fb8016 | 2015-02-24 19:40:36 +0300 | [diff] [blame] | 893 | #if defined(CONFIG_X86) || defined(CONFIG_ARC) |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 894 | /* |
| 895 | * For now this code is only used on x86. |
| 896 | * |
| 897 | * init_sequence_f_r is the list of init functions which are run when |
| 898 | * U-Boot is executing from Flash with a semi-limited 'C' environment. |
| 899 | * The following limitations must be considered when implementing an |
| 900 | * '_f_r' function: |
| 901 | * - 'static' variables are read-only |
| 902 | * - Global Data (gd->xxx) is read/write |
| 903 | * |
| 904 | * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if |
| 905 | * supported). It _should_, if possible, copy global data to RAM and |
| 906 | * initialise the CPU caches (to speed up the relocation process) |
| 907 | * |
| 908 | * NOTE: At present only x86 uses this route, but it is intended that |
| 909 | * all archs will move to this when generic relocation is implemented. |
| 910 | */ |
Simon Glass | 4acff45 | 2017-01-16 07:03:50 -0700 | [diff] [blame] | 911 | static const init_fnc_t init_sequence_f_r[] = { |
Simon Glass | 530f27e | 2017-01-16 07:03:49 -0700 | [diff] [blame] | 912 | #if !CONFIG_IS_ENABLED(X86_64) |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 913 | init_cache_f_r, |
Simon Glass | 530f27e | 2017-01-16 07:03:49 -0700 | [diff] [blame] | 914 | #endif |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 915 | |
| 916 | NULL, |
| 917 | }; |
| 918 | |
| 919 | void board_init_f_r(void) |
| 920 | { |
| 921 | if (initcall_run_list(init_sequence_f_r)) |
| 922 | hang(); |
| 923 | |
| 924 | /* |
Simon Glass | e4d6ab0 | 2016-03-11 22:06:51 -0700 | [diff] [blame] | 925 | * The pre-relocation drivers may be using memory that has now gone |
| 926 | * away. Mark serial as unavailable - this will fall back to the debug |
| 927 | * UART if available. |
| 928 | */ |
| 929 | gd->flags &= ~GD_FLG_SERIAL_READY; |
| 930 | |
| 931 | /* |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 932 | * U-Boot has been copied into SDRAM, the BSS has been cleared etc. |
| 933 | * Transfer execution from Flash to RAM by calculating the address |
| 934 | * of the in-RAM copy of board_init_r() and calling it |
| 935 | */ |
Alexey Brodkin | 7bf9f20 | 2015-02-25 17:59:02 +0300 | [diff] [blame] | 936 | (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); |
Simon Glass | 48a3380 | 2013-03-05 14:39:52 +0000 | [diff] [blame] | 937 | |
| 938 | /* NOTREACHED - board_init_r() does not return */ |
| 939 | hang(); |
| 940 | } |
Alexey Brodkin | 5bcd19a | 2015-03-24 11:12:47 +0300 | [diff] [blame] | 941 | #endif /* CONFIG_X86 */ |