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Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +05301/*
2 * Copyright (C) 2013 Samsung Electronics
3 *
4 * Configuration settings for the SAMSUNG EXYNOS5420 SoC
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_EXYNOS5420_H
10#define __CONFIG_EXYNOS5420_H
11
Simon Glass87033d42014-10-07 22:01:46 -060012#define CONFIG_EXYNOS5420
Akshay Saraswat79043d82014-11-13 22:38:17 +053013/* A variant of Exynos5420 (Exynos5 Family) */
14#define CONFIG_EXYNOS5800
Simon Glass87033d42014-10-07 22:01:46 -060015
Simon Glassf94de732014-10-07 22:01:48 -060016#define CONFIG_ENV_IS_IN_SPI_FLASH
17#define CONFIG_SPI_FLASH
18#define CONFIG_ENV_SPI_BASE 0x12D30000
19#define FLASH_SIZE (0x4 << 20)
20#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
21#define CONFIG_SPI_BOOTING
22
Simon Glass87033d42014-10-07 22:01:46 -060023#include <configs/exynos5-common.h>
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +053024
Simon Glassf94de732014-10-07 22:01:48 -060025#define CONFIG_ARCH_EARLY_INIT_R
26
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +053027#define MACH_TYPE_SMDK5420 8002
28#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420
29
30#define CONFIG_VAR_SIZE_SPL
31
32#define CONFIG_SYS_SDRAM_BASE 0x20000000
33#define CONFIG_SYS_TEXT_BASE 0x23E00000
34#ifdef CONFIG_VAR_SIZE_SPL
35#define CONFIG_SPL_TEXT_BASE 0x02024410
36#else
37#define CONFIG_SPL_TEXT_BASE 0x02024400
38#endif
39#define CONFIG_IRAM_TOP 0x02074000
40
Akshay Saraswatd2fe10f2014-06-18 17:54:00 +053041#define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024)
42
Akshay Saraswat79043d82014-11-13 22:38:17 +053043#define CONFIG_DEVICE_TREE_LIST "exynos5800-peach-pi" \
44 "exynos5420-peach-pit exynos5420-smdk5420"
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +053045
46#define CONFIG_MAX_I2C_NUM 11
47
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +053048#define CONFIG_BOARD_REV_GPIO_COUNT 2
49
Simon Glassf94de732014-10-07 22:01:48 -060050#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
51
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +053052/*
53 * Put the initial stack pointer 1KB below this to allow room for the
54 * SPL marker. This value is arbitrary, but gd_t is placed starting here.
55 */
56#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
57
Simon Glassf94de732014-10-07 22:01:48 -060058/* Miscellaneous configurable options */
59#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
60
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +053061#endif /* __CONFIG_EXYNOS5420_H */