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Srikanth Srinivasanfeb78382009-04-03 15:36:13 -05001/*
Kumar Gala7a577fd2011-01-12 02:48:53 -06002 * Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -05003 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
Kumar Gala7a577fd2011-01-12 02:48:53 -060023#include "config.h" /* CONFIG_BOARDDIR */
24
25#ifdef CONFIG_RESET_VECTOR_ADDRESS
26#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
27#else
Kumar Gala6c97a202009-09-09 11:40:41 -050028#define RESET_VECTOR_ADDRESS 0xfffffffc
29#endif
30
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050031OUTPUT_ARCH(powerpc)
Peter Tyserfbe53f52010-09-29 14:05:56 -050032
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050033PHDRS
34{
35 text PT_LOAD;
36 bss PT_LOAD;
37}
38
39SECTIONS
40{
41 /* Read-only sections, merged into text segment: */
42 . = + SIZEOF_HEADERS;
43 .interp : { *(.interp) }
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050044 .text :
45 {
Peter Tyserfbe53f52010-09-29 14:05:56 -050046 *(.text*)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050047 } :text
48 _etext = .;
49 PROVIDE (etext = .);
50 .rodata :
51 {
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050052 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
53 } :text
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050054
55 /* Read-write section, merged into data segment: */
56 . = (. + 0x00FF) & 0xFFFFFF00;
57 _erotext = .;
58 PROVIDE (erotext = .);
59 .reloc :
60 {
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050061 _GOT2_TABLE_ = .;
Peter Tyserfbe53f52010-09-29 14:05:56 -050062 KEEP(*(.got2))
Joakim Tjernlund337f5f52010-12-03 17:30:37 +010063 KEEP(*(.got))
64 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050065 _FIXUP_TABLE_ = .;
Peter Tyserfbe53f52010-09-29 14:05:56 -050066 KEEP(*(.fixup))
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050067 }
Joakim Tjernlund337f5f52010-12-03 17:30:37 +010068 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050069 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
70
71 .data :
72 {
Peter Tyserfbe53f52010-09-29 14:05:56 -050073 *(.data*)
74 *(.sdata*)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050075 }
76 _edata = .;
77 PROVIDE (edata = .);
78
79 . = .;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050080
Marek Vasut55675142012-10-12 10:27:03 +000081 . = ALIGN(4);
82 .u_boot_list : {
Albert ARIBAUDef123c52013-02-25 00:59:00 +000083 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut55675142012-10-12 10:27:03 +000084 }
85
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050086 . = .;
87 __start___ex_table = .;
88 __ex_table : { *(__ex_table) }
89 __stop___ex_table = .;
90
91 . = ALIGN(256);
92 __init_begin = .;
93 .text.init : { *(.text.init) }
94 .data.init : { *(.data.init) }
95 . = ALIGN(256);
96 __init_end = .;
97
Kumar Gala6c97a202009-09-09 11:40:41 -050098 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050099 {
Stefan Roesea47a12b2010-04-15 16:07:28 +0200100 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500101 } :text = 0xffff
102
Kumar Gala6c97a202009-09-09 11:40:41 -0500103 .resetvec RESET_VECTOR_ADDRESS :
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500104 {
Peter Tyserfbe53f52010-09-29 14:05:56 -0500105 KEEP(*(.resetvec))
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500106 } :text = 0xffff
107
Kumar Gala6c97a202009-09-09 11:40:41 -0500108 . = RESET_VECTOR_ADDRESS + 0x4;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500109
Peter Tyser3beb40c2009-10-07 11:45:00 -0500110 /*
111 * Make sure that the bss segment isn't linked at 0x0, otherwise its
112 * address won't be updated during relocation fixups. Note that
113 * this is a temporary fix. Code to dynamically the fixup the bss
114 * location will be added in the future. When the bss relocation
115 * fixup code is present this workaround should be removed.
116 */
117#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
118 . |= 0x10;
119#endif
120
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500121 __bss_start = .;
122 .bss (NOLOAD) :
123 {
Peter Tyserfbe53f52010-09-29 14:05:56 -0500124 *(.sbss*)
125 *(.bss*)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500126 *(COMMON)
127 } :bss
128
129 . = ALIGN(4);
Simon Glass3929fb02013-03-14 06:54:53 +0000130 __bss_end = . ;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500131 PROVIDE (end = .);
132}