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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasutf4f680a2011-11-08 23:18:12 +00002/*
3 * Freescale i.MX28 I2C Driver
4 *
5 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
6 * on behalf of DENX Software Engineering GmbH
7 *
8 * Partly based on Linux kernel i2c-mxs.c driver:
9 * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
10 *
11 * Which was based on a (non-working) driver which was:
12 * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
Marek Vasutf4f680a2011-11-08 23:18:12 +000013 */
14
15#include <common.h>
16#include <malloc.h>
Marek Vasutfa5e2842012-11-30 18:17:07 +000017#include <i2c.h>
Masahiro Yamada1221ce42016-09-21 11:28:55 +090018#include <linux/errno.h>
Marek Vasutf4f680a2011-11-08 23:18:12 +000019#include <asm/io.h>
20#include <asm/arch/clock.h>
21#include <asm/arch/imx-regs.h>
22#include <asm/arch/sys_proto.h>
23
24#define MXS_I2C_MAX_TIMEOUT 1000000
25
Marek Vasut95360992014-10-20 00:23:40 +020026static struct mxs_i2c_regs *mxs_i2c_get_base(struct i2c_adapter *adap)
27{
Marek Vasut318a9ce2014-10-20 00:23:43 +020028 if (adap->hwadapnr == 0)
29 return (struct mxs_i2c_regs *)MXS_I2C0_BASE;
30 else
31 return (struct mxs_i2c_regs *)MXS_I2C1_BASE;
Marek Vasut95360992014-10-20 00:23:40 +020032}
33
Marek Vasut58a7d1c2014-10-20 00:23:42 +020034static unsigned int mxs_i2c_get_bus_speed(struct i2c_adapter *adap)
Marek Vasut1fa96e82014-10-20 00:23:41 +020035{
Marek Vasut58a7d1c2014-10-20 00:23:42 +020036 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasut1fa96e82014-10-20 00:23:41 +020037 uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
38 uint32_t timing0;
39
40 timing0 = readl(&i2c_regs->hw_i2c_timing0);
41 /*
42 * This is a reverse version of the algorithm presented in
43 * i2c_set_bus_speed(). Please refer there for details.
44 */
45 return clk / ((((timing0 >> 16) - 3) * 2) + 38);
46}
47
Marek Vasut58a7d1c2014-10-20 00:23:42 +020048static uint mxs_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)
Marek Vasutf4f680a2011-11-08 23:18:12 +000049{
Marek Vasut58a7d1c2014-10-20 00:23:42 +020050 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
51 /*
52 * The timing derivation algorithm. There is no documentation for this
53 * algorithm available, it was derived by using the scope and fiddling
54 * with constants until the result observed on the scope was good enough
55 * for 20kHz, 50kHz, 100kHz, 200kHz, 300kHz and 400kHz. It should be
56 * possible to assume the algorithm works for other frequencies as well.
57 *
58 * Note it was necessary to cap the frequency on both ends as it's not
59 * possible to configure completely arbitrary frequency for the I2C bus
60 * clock.
61 */
62 uint32_t clk = mxc_get_clock(MXC_XTAL_CLK);
63 uint32_t base = ((clk / speed) - 38) / 2;
64 uint16_t high_count = base + 3;
65 uint16_t low_count = base - 3;
66 uint16_t rcv_count = (high_count * 3) / 4;
67 uint16_t xmit_count = low_count / 4;
68
69 if (speed > 540000) {
70 printf("MXS I2C: Speed too high (%d Hz)\n", speed);
71 return -EINVAL;
72 }
73
74 if (speed < 12000) {
75 printf("MXS I2C: Speed too low (%d Hz)\n", speed);
76 return -EINVAL;
77 }
78
79 writel((high_count << 16) | rcv_count, &i2c_regs->hw_i2c_timing0);
80 writel((low_count << 16) | xmit_count, &i2c_regs->hw_i2c_timing1);
81
82 writel((0x0030 << I2C_TIMING2_BUS_FREE_OFFSET) |
83 (0x0030 << I2C_TIMING2_LEADIN_COUNT_OFFSET),
84 &i2c_regs->hw_i2c_timing2);
85
86 return 0;
87}
88
89static void mxs_i2c_reset(struct i2c_adapter *adap)
90{
91 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +000092 int ret;
Marek Vasut58a7d1c2014-10-20 00:23:42 +020093 int speed = mxs_i2c_get_bus_speed(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +000094
Otavio Salvadorfa7a51c2012-08-13 09:53:12 +000095 ret = mxs_reset_block(&i2c_regs->hw_i2c_ctrl0_reg);
Marek Vasutf4f680a2011-11-08 23:18:12 +000096 if (ret) {
97 debug("MXS I2C: Block reset timeout\n");
98 return;
99 }
100
101 writel(I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | I2C_CTRL1_NO_SLAVE_ACK_IRQ |
102 I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
103 I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ,
104 &i2c_regs->hw_i2c_ctrl1_clr);
105
106 writel(I2C_QUEUECTRL_PIO_QUEUE_MODE, &i2c_regs->hw_i2c_queuectrl_set);
Marek Vasut1e2fc0d2012-11-30 18:17:06 +0000107
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200108 mxs_i2c_set_bus_speed(adap, speed);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000109}
110
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200111static void mxs_i2c_setup_read(struct i2c_adapter *adap, uint8_t chip, int len)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000112{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200113 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000114
115 writel(I2C_QUEUECMD_RETAIN_CLOCK | I2C_QUEUECMD_PRE_SEND_START |
116 I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
117 (1 << I2C_QUEUECMD_XFER_COUNT_OFFSET),
118 &i2c_regs->hw_i2c_queuecmd);
119
120 writel((chip << 1) | 1, &i2c_regs->hw_i2c_data);
121
122 writel(I2C_QUEUECMD_SEND_NAK_ON_LAST | I2C_QUEUECMD_MASTER_MODE |
123 (len << I2C_QUEUECMD_XFER_COUNT_OFFSET) |
124 I2C_QUEUECMD_POST_SEND_STOP, &i2c_regs->hw_i2c_queuecmd);
125
126 writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
127}
128
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200129static int mxs_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
130 int alen, uchar *buf, int blen, int stop)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000131{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200132 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutd22643e2014-02-06 02:59:34 +0100133 uint32_t data, tmp;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000134 int i, remain, off;
Marek Vasutd22643e2014-02-06 02:59:34 +0100135 int timeout = MXS_I2C_MAX_TIMEOUT;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000136
137 if ((alen > 4) || (alen == 0)) {
138 debug("MXS I2C: Invalid address length\n");
Marek Vasutd22643e2014-02-06 02:59:34 +0100139 return -EINVAL;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000140 }
141
142 if (stop)
143 stop = I2C_QUEUECMD_POST_SEND_STOP;
144
145 writel(I2C_QUEUECMD_PRE_SEND_START |
146 I2C_QUEUECMD_MASTER_MODE | I2C_QUEUECMD_DIRECTION |
147 ((blen + alen + 1) << I2C_QUEUECMD_XFER_COUNT_OFFSET) | stop,
148 &i2c_regs->hw_i2c_queuecmd);
149
150 data = (chip << 1) << 24;
151
152 for (i = 0; i < alen; i++) {
153 data >>= 8;
Torsten Fleischerfa86d1c2012-04-17 05:37:45 +0000154 data |= ((char *)&addr)[alen - i - 1] << 24;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000155 if ((i & 3) == 2)
156 writel(data, &i2c_regs->hw_i2c_data);
157 }
158
159 off = i;
160 for (; i < off + blen; i++) {
161 data >>= 8;
162 data |= buf[i - off] << 24;
163 if ((i & 3) == 2)
164 writel(data, &i2c_regs->hw_i2c_data);
165 }
166
167 remain = 24 - ((i & 3) * 8);
168 if (remain)
169 writel(data >> remain, &i2c_regs->hw_i2c_data);
170
171 writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
Marek Vasutd22643e2014-02-06 02:59:34 +0100172
173 while (--timeout) {
174 tmp = readl(&i2c_regs->hw_i2c_queuestat);
175 if (tmp & I2C_QUEUESTAT_WR_QUEUE_EMPTY)
176 break;
177 }
178
179 if (!timeout) {
180 debug("MXS I2C: Failed transmitting data!\n");
181 return -EINVAL;
182 }
183
184 return 0;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000185}
186
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200187static int mxs_i2c_wait_for_ack(struct i2c_adapter *adap)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000188{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200189 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000190 uint32_t tmp;
191 int timeout = MXS_I2C_MAX_TIMEOUT;
192
193 for (;;) {
194 tmp = readl(&i2c_regs->hw_i2c_ctrl1);
195 if (tmp & I2C_CTRL1_NO_SLAVE_ACK_IRQ) {
196 debug("MXS I2C: No slave ACK\n");
197 goto err;
198 }
199
200 if (tmp & (
201 I2C_CTRL1_EARLY_TERM_IRQ | I2C_CTRL1_MASTER_LOSS_IRQ |
202 I2C_CTRL1_SLAVE_STOP_IRQ | I2C_CTRL1_SLAVE_IRQ)) {
203 debug("MXS I2C: Error (CTRL1 = %08x)\n", tmp);
204 goto err;
205 }
206
207 if (tmp & I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ)
208 break;
209
210 if (!timeout--) {
211 debug("MXS I2C: Operation timed out\n");
212 goto err;
213 }
214
215 udelay(1);
216 }
217
218 return 0;
219
220err:
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200221 mxs_i2c_reset(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000222 return 1;
223}
224
Marek Vasut1fa96e82014-10-20 00:23:41 +0200225static int mxs_i2c_if_read(struct i2c_adapter *adap, uint8_t chip,
226 uint addr, int alen, uint8_t *buffer,
227 int len)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000228{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200229 struct mxs_i2c_regs *i2c_regs = mxs_i2c_get_base(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000230 uint32_t tmp = 0;
Marek Vasut12491352013-11-04 14:29:12 +0100231 int timeout = MXS_I2C_MAX_TIMEOUT;
Marek Vasutf4f680a2011-11-08 23:18:12 +0000232 int ret;
233 int i;
234
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200235 ret = mxs_i2c_write(adap, chip, addr, alen, NULL, 0, 0);
Marek Vasutd22643e2014-02-06 02:59:34 +0100236 if (ret) {
237 debug("MXS I2C: Failed writing address\n");
238 return ret;
239 }
240
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200241 ret = mxs_i2c_wait_for_ack(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000242 if (ret) {
243 debug("MXS I2C: Failed writing address\n");
244 return ret;
245 }
246
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200247 mxs_i2c_setup_read(adap, chip, len);
248 ret = mxs_i2c_wait_for_ack(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000249 if (ret) {
250 debug("MXS I2C: Failed reading address\n");
251 return ret;
252 }
253
254 for (i = 0; i < len; i++) {
255 if (!(i & 3)) {
Marek Vasut12491352013-11-04 14:29:12 +0100256 while (--timeout) {
257 tmp = readl(&i2c_regs->hw_i2c_queuestat);
258 if (!(tmp & I2C_QUEUESTAT_RD_QUEUE_EMPTY))
259 break;
260 }
261
262 if (!timeout) {
263 debug("MXS I2C: Failed receiving data!\n");
264 return -ETIMEDOUT;
265 }
266
Marek Vasutf4f680a2011-11-08 23:18:12 +0000267 tmp = readl(&i2c_regs->hw_i2c_queuedata);
268 }
269 buffer[i] = tmp & 0xff;
270 tmp >>= 8;
271 }
272
273 return 0;
274}
275
Marek Vasut1fa96e82014-10-20 00:23:41 +0200276static int mxs_i2c_if_write(struct i2c_adapter *adap, uint8_t chip,
277 uint addr, int alen, uint8_t *buffer,
278 int len)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000279{
280 int ret;
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200281 ret = mxs_i2c_write(adap, chip, addr, alen, buffer, len, 1);
Marek Vasutd22643e2014-02-06 02:59:34 +0100282 if (ret) {
283 debug("MXS I2C: Failed writing address\n");
284 return ret;
285 }
286
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200287 ret = mxs_i2c_wait_for_ack(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000288 if (ret)
289 debug("MXS I2C: Failed writing address\n");
290
291 return ret;
292}
293
Marek Vasut1fa96e82014-10-20 00:23:41 +0200294static int mxs_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000295{
296 int ret;
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200297 ret = mxs_i2c_write(adap, chip, 0, 1, NULL, 0, 1);
Marek Vasutd22643e2014-02-06 02:59:34 +0100298 if (!ret)
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200299 ret = mxs_i2c_wait_for_ack(adap);
300 mxs_i2c_reset(adap);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000301 return ret;
302}
303
Marek Vasut1fa96e82014-10-20 00:23:41 +0200304static void mxs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
Marek Vasutf4f680a2011-11-08 23:18:12 +0000305{
Marek Vasut58a7d1c2014-10-20 00:23:42 +0200306 mxs_i2c_reset(adap);
307 mxs_i2c_set_bus_speed(adap, speed);
Marek Vasutf4f680a2011-11-08 23:18:12 +0000308
309 return;
310}
Marek Vasut1fa96e82014-10-20 00:23:41 +0200311
312U_BOOT_I2C_ADAP_COMPLETE(mxs0, mxs_i2c_init, mxs_i2c_probe,
313 mxs_i2c_if_read, mxs_i2c_if_write,
314 mxs_i2c_set_bus_speed,
315 CONFIG_SYS_I2C_SPEED, 0, 0)
Marek Vasut318a9ce2014-10-20 00:23:43 +0200316U_BOOT_I2C_ADAP_COMPLETE(mxs1, mxs_i2c_init, mxs_i2c_probe,
317 mxs_i2c_if_read, mxs_i2c_if_write,
318 mxs_i2c_set_bus_speed,
319 CONFIG_SYS_I2C_SPEED, 0, 1)