Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2009 |
| 4 | * Marvell Semiconductor <www.marvell.com> |
| 5 | * Prafulla Wadaskar <prafulla@marvell.com> |
| 6 | * |
| 7 | * (C) Copyright 2009 |
| 8 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 9 | * |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 10 | * (C) Copyright 2011-2012 |
| 11 | * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com |
| 12 | * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com |
Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | /* |
| 16 | * for linking errors see |
| 17 | * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html |
| 18 | */ |
| 19 | |
Holger Brunck | 83b40c3 | 2011-06-16 18:11:15 +0530 | [diff] [blame] | 20 | #ifndef _CONFIG_KM_KIRKWOOD_H |
| 21 | #define _CONFIG_KM_KIRKWOOD_H |
Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 22 | |
Holger Brunck | 48ced62 | 2012-07-05 05:05:06 +0000 | [diff] [blame] | 23 | /* KM_KIRKWOOD */ |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 24 | #if defined(CONFIG_KM_KIRKWOOD) |
Mario Six | 5bc0543 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 25 | #define CONFIG_HOSTNAME "km_kirkwood" |
Holger Brunck | 48ced62 | 2012-07-05 05:05:06 +0000 | [diff] [blame] | 26 | #define CONFIG_KM_DISABLE_PCIE |
Holger Brunck | 48ced62 | 2012-07-05 05:05:06 +0000 | [diff] [blame] | 27 | |
| 28 | /* KM_KIRKWOOD_PCI */ |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 29 | #elif defined(CONFIG_KM_KIRKWOOD_PCI) |
Mario Six | 5bc0543 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 30 | #define CONFIG_HOSTNAME "km_kirkwood_pci" |
Holger Brunck | 58c90c8 | 2014-08-15 10:51:48 +0200 | [diff] [blame] | 31 | #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" |
| 32 | #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE |
Holger Brunck | 48ced62 | 2012-07-05 05:05:06 +0000 | [diff] [blame] | 33 | |
Karlheinz Jerg | 5e4eeab | 2013-09-18 09:32:48 +0200 | [diff] [blame] | 34 | /* KM_KIRKWOOD_128M16 */ |
| 35 | #elif defined(CONFIG_KM_KIRKWOOD_128M16) |
Mario Six | 5bc0543 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 36 | #define CONFIG_HOSTNAME "km_kirkwood_128m16" |
Karlheinz Jerg | 5e4eeab | 2013-09-18 09:32:48 +0200 | [diff] [blame] | 37 | #define CONFIG_KM_DISABLE_PCIE |
Karlheinz Jerg | 5e4eeab | 2013-09-18 09:32:48 +0200 | [diff] [blame] | 38 | |
Holger Brunck | 95e3ce6 | 2020-01-13 15:34:02 +0100 | [diff] [blame] | 39 | /* KM_NUSA */ |
| 40 | #elif defined(CONFIG_KM_NUSA) |
Gerlando Falauto | 9c134e1 | 2014-02-13 16:43:00 +0100 | [diff] [blame] | 41 | |
Mario Six | 5bc0543 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 42 | #define CONFIG_HOSTNAME "kmnusa" |
Gerlando Falauto | 9c134e1 | 2014-02-13 16:43:00 +0100 | [diff] [blame] | 43 | |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 44 | /* KMCOGE5UN */ |
Holger Brunck | d935453 | 2012-07-05 05:05:02 +0000 | [diff] [blame] | 45 | #elif defined(CONFIG_KM_COGE5UN) |
Mario Six | 5bc0543 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 46 | #define CONFIG_HOSTNAME "kmcoge5un" |
Holger Brunck | d935453 | 2012-07-05 05:05:02 +0000 | [diff] [blame] | 47 | #define CONFIG_KM_DISABLE_PCIE |
Holger Brunck | 6ef6486 | 2012-07-05 05:05:04 +0000 | [diff] [blame] | 48 | |
Holger Brunck | 0e1c0f3 | 2020-01-13 15:34:01 +0100 | [diff] [blame] | 49 | /* KM_SUSE2 */ |
| 50 | #elif defined(CONFIG_KM_SUSE2) |
| 51 | #define CONFIG_HOSTNAME "kmsuse2" |
Holger Brunck | 0e1c0f3 | 2020-01-13 15:34:01 +0100 | [diff] [blame] | 52 | #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" |
| 53 | #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 54 | #else |
| 55 | #error ("Board unsupported") |
| 56 | #endif |
| 57 | |
Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 58 | /* include common defines/options for all arm based Keymile boards */ |
Valentin Longchamp | 264eaa0 | 2011-05-04 01:47:33 +0000 | [diff] [blame] | 59 | #include "km/km_arm.h" |
Heiko Schocher | 67fa8c2 | 2010-02-22 16:43:02 +0530 | [diff] [blame] | 60 | |
Holger Brunck | 8170aef | 2012-07-05 05:37:46 +0000 | [diff] [blame] | 61 | #if defined(CONFIG_KM_PIGGY4_88E6352) |
| 62 | /* |
| 63 | * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via |
| 64 | * an Marvell 88E6352 simple switch. |
| 65 | * In this case we have to change the default settings for the etherent mac. |
| 66 | * There is NO ethernet phy. The ARM and Switch are conencted directly over |
| 67 | * RGMII in MAC-MAC mode |
| 68 | * In this case 1GBit full duplex and autoneg off |
| 69 | */ |
| 70 | #define PORT_SERIAL_CONTROL_VALUE ( \ |
| 71 | MVGBE_FORCE_LINK_PASS | \ |
| 72 | MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ |
| 73 | MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ |
| 74 | MVGBE_ADV_NO_FLOW_CTRL | \ |
| 75 | MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ |
| 76 | MVGBE_FORCE_BP_MODE_NO_JAM | \ |
| 77 | (1 << 9) /* Reserved bit has to be 1 */ | \ |
| 78 | MVGBE_DO_NOT_FORCE_LINK_FAIL | \ |
| 79 | MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ |
| 80 | MVGBE_DTE_ADV_0 | \ |
| 81 | MVGBE_MIIPHY_MAC_MODE | \ |
| 82 | MVGBE_AUTO_NEG_NO_CHANGE | \ |
| 83 | MVGBE_MAX_RX_PACKET_1552BYTE | \ |
| 84 | MVGBE_CLR_EXT_LOOPBACK | \ |
| 85 | MVGBE_SET_FULL_DUPLEX_MODE | \ |
| 86 | MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ |
| 87 | MVGBE_SET_GMII_SPEED_TO_1000 |\ |
| 88 | MVGBE_SET_MII_SPEED_TO_100) |
| 89 | |
| 90 | #endif |
Heiko Schocher | 731b968 | 2011-03-08 10:53:51 +0100 | [diff] [blame] | 91 | |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 92 | #ifdef CONFIG_KM_PIGGY4_88E6061 |
| 93 | /* |
Holger Brunck | e7fdb34 | 2019-11-25 17:24:15 +0100 | [diff] [blame] | 94 | * Some keymile boards like mgcoge5un have their PIGGY4 connected via |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 95 | * an Marvell 88E6061 simple switch. |
| 96 | * In this case we have to change the default settings for the |
| 97 | * ethernet phy connected to the kirkwood. |
| 98 | * In this case 100MB full duplex and autoneg off |
| 99 | */ |
| 100 | #define PORT_SERIAL_CONTROL_VALUE ( \ |
| 101 | MVGBE_FORCE_LINK_PASS | \ |
| 102 | MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ |
| 103 | MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ |
| 104 | MVGBE_ADV_NO_FLOW_CTRL | \ |
| 105 | MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ |
| 106 | MVGBE_FORCE_BP_MODE_NO_JAM | \ |
| 107 | (1 << 9) /* Reserved bit has to be 1 */ | \ |
| 108 | MVGBE_DO_NOT_FORCE_LINK_FAIL | \ |
| 109 | MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ |
| 110 | MVGBE_DTE_ADV_0 | \ |
| 111 | MVGBE_MIIPHY_MAC_MODE | \ |
| 112 | MVGBE_AUTO_NEG_NO_CHANGE | \ |
| 113 | MVGBE_MAX_RX_PACKET_1552BYTE | \ |
| 114 | MVGBE_CLR_EXT_LOOPBACK | \ |
| 115 | MVGBE_SET_FULL_DUPLEX_MODE | \ |
| 116 | MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ |
| 117 | MVGBE_SET_GMII_SPEED_TO_10_100 |\ |
| 118 | MVGBE_SET_MII_SPEED_TO_100) |
| 119 | #endif |
| 120 | |
Pascal Linder | 9db6bff | 2019-07-09 09:28:23 +0200 | [diff] [blame] | 121 | #ifdef CONFIG_KM_DISABLE_PCIE |
Holger Brunck | f945439 | 2012-07-05 05:05:03 +0000 | [diff] [blame] | 122 | #undef CONFIG_KIRKWOOD_PCIE_INIT |
| 123 | #endif |
Valentin Longchamp | b37f772 | 2012-07-05 05:05:05 +0000 | [diff] [blame] | 124 | |
Holger Brunck | 83b40c3 | 2011-06-16 18:11:15 +0530 | [diff] [blame] | 125 | #endif /* _CONFIG_KM_KIRKWOOD */ |