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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Giuseppe Pagano164d9842013-11-28 12:32:48 +01002/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
Giuseppe Pagano164d9842013-11-28 12:32:48 +01004 */
5
Stefano Babic552a8482017-06-29 10:16:06 +02006#include <asm/mach-imx/iomux-v3.h>
Giuseppe Pagano164d9842013-11-28 12:32:48 +01007#include <asm/arch/iomux.h>
8#include <asm/io.h>
Stefano Babicf5514e42013-12-19 11:04:33 +01009#include <asm/arch/clock.h>
Tim Harvey22452fd2014-05-07 22:24:47 -070010#include <asm/arch/sys_proto.h>
Giuseppe Pagano164d9842013-11-28 12:32:48 +010011
12int setup_sata(void)
13{
Fabio Estevam0a11d6f2014-07-09 17:59:54 -030014 struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
Tim Harvey22452fd2014-05-07 22:24:47 -070015 int ret;
Giuseppe Pagano164d9842013-11-28 12:32:48 +010016
Peng Fanaff37562016-05-23 18:36:00 +080017 if (!is_mx6dq() && !is_mx6dqp())
Tim Harvey22452fd2014-05-07 22:24:47 -070018 return 1;
19
20 ret = enable_sata_clock();
Giuseppe Pagano164d9842013-11-28 12:32:48 +010021 if (ret)
22 return ret;
23
24 clrsetbits_le32(&iomuxc_regs->gpr[13],
25 IOMUXC_GPR13_SATA_MASK,
26 IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
27 |IOMUXC_GPR13_SATA_PHY_7_SATA2M
28 |IOMUXC_GPR13_SATA_SPEED_3G
29 |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
30 |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
31 |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
32 |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
33 |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
34 |IOMUXC_GPR13_SATA_PHY_1_SLOW);
35
36 return 0;
37}