blob: bfd668fa0ac5425f21361971ca5f0efc26bff4f7 [file] [log] [blame]
Wolfgang Denk932394a2005-08-17 12:55:25 +02001/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02008 *
Wolfgang Denk932394a2005-08-17 12:55:25 +02009 * Additional technical information is available on
Scott Woodc45912d2008-10-24 16:20:43 -050010 * http://www.linux-mtd.infradead.org/doc/nand.html
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +020011 *
Wolfgang Denk932394a2005-08-17 12:55:25 +020012 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
William Juulcfa460a2007-10-31 13:53:06 +010013 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Wolfgang Denk932394a2005-08-17 12:55:25 +020014 *
William Juulcfa460a2007-10-31 13:53:06 +010015 * Credits:
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +020016 * David Woodhouse for adding multichip support
17 *
Wolfgang Denk932394a2005-08-17 12:55:25 +020018 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
20 *
William Juulcfa460a2007-10-31 13:53:06 +010021 * TODO:
Wolfgang Denk932394a2005-08-17 12:55:25 +020022 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
Scott Woodc45912d2008-10-24 16:20:43 -050027 * BBT table is not serialized, has to be fixed
Wolfgang Denk932394a2005-08-17 12:55:25 +020028 *
Wolfgang Denk932394a2005-08-17 12:55:25 +020029 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License version 2 as
31 * published by the Free Software Foundation.
32 *
33 */
34
Wolfgang Denk932394a2005-08-17 12:55:25 +020035#include <common.h>
Bartlomiej Siekaaddb2e12006-03-05 18:57:33 +010036
William Juulcfa460a2007-10-31 13:53:06 +010037#define ENOTSUPP 524 /* Operation is not supported */
38
Wolfgang Denk932394a2005-08-17 12:55:25 +020039#include <malloc.h>
40#include <watchdog.h>
William Juulcfa460a2007-10-31 13:53:06 +010041#include <linux/err.h>
Mike Frysinger7b15e2b2012-04-09 13:39:55 +000042#include <linux/compat.h>
Wolfgang Denk932394a2005-08-17 12:55:25 +020043#include <linux/mtd/mtd.h>
44#include <linux/mtd/nand.h>
45#include <linux/mtd/nand_ecc.h>
Christian Hitz4c6de852011-10-12 09:31:59 +020046#include <linux/mtd/nand_bch.h>
Wolfgang Denk932394a2005-08-17 12:55:25 +020047
Stefan Roese10bb62d2009-04-24 15:58:33 +020048#ifdef CONFIG_MTD_PARTITIONS
49#include <linux/mtd/partitions.h>
50#endif
51
Wolfgang Denk932394a2005-08-17 12:55:25 +020052#include <asm/io.h>
53#include <asm/errno.h>
54
Peter Tyser8da60122009-02-04 13:47:22 -060055/*
56 * CONFIG_SYS_NAND_RESET_CNT is used as a timeout mechanism when resetting
57 * a flash. NAND flash is initialized prior to interrupts so standard timers
58 * can't be used. CONFIG_SYS_NAND_RESET_CNT should be set to a value
59 * which is greater than (max NAND reset time / NAND status read time).
60 * A conservative default of 200000 (500 us / 25 ns) is used as a default.
61 */
62#ifndef CONFIG_SYS_NAND_RESET_CNT
63#define CONFIG_SYS_NAND_RESET_CNT 200000
64#endif
65
Wolfgang Denk932394a2005-08-17 12:55:25 +020066/* Define default oob placement schemes for large and small page devices */
William Juulcfa460a2007-10-31 13:53:06 +010067static struct nand_ecclayout nand_oob_8 = {
Wolfgang Denk932394a2005-08-17 12:55:25 +020068 .eccbytes = 3,
69 .eccpos = {0, 1, 2},
William Juulcfa460a2007-10-31 13:53:06 +010070 .oobfree = {
71 {.offset = 3,
72 .length = 2},
73 {.offset = 6,
Christian Hitz90e3f392011-10-12 09:32:01 +020074 .length = 2} }
Wolfgang Denk932394a2005-08-17 12:55:25 +020075};
76
William Juulcfa460a2007-10-31 13:53:06 +010077static struct nand_ecclayout nand_oob_16 = {
Wolfgang Denk932394a2005-08-17 12:55:25 +020078 .eccbytes = 6,
79 .eccpos = {0, 1, 2, 3, 6, 7},
William Juulcfa460a2007-10-31 13:53:06 +010080 .oobfree = {
81 {.offset = 8,
Christian Hitz90e3f392011-10-12 09:32:01 +020082 . length = 8} }
Wolfgang Denk932394a2005-08-17 12:55:25 +020083};
84
William Juulcfa460a2007-10-31 13:53:06 +010085static struct nand_ecclayout nand_oob_64 = {
Wolfgang Denk932394a2005-08-17 12:55:25 +020086 .eccbytes = 24,
87 .eccpos = {
William Juulcfa460a2007-10-31 13:53:06 +010088 40, 41, 42, 43, 44, 45, 46, 47,
89 48, 49, 50, 51, 52, 53, 54, 55,
90 56, 57, 58, 59, 60, 61, 62, 63},
91 .oobfree = {
92 {.offset = 2,
Christian Hitz90e3f392011-10-12 09:32:01 +020093 .length = 38} }
Wolfgang Denk932394a2005-08-17 12:55:25 +020094};
95
William Juulcfa460a2007-10-31 13:53:06 +010096static struct nand_ecclayout nand_oob_128 = {
Sergei Poselenov248ae5c2008-06-06 15:42:43 +020097 .eccbytes = 48,
98 .eccpos = {
Christian Hitz90e3f392011-10-12 09:32:01 +020099 80, 81, 82, 83, 84, 85, 86, 87,
100 88, 89, 90, 91, 92, 93, 94, 95,
101 96, 97, 98, 99, 100, 101, 102, 103,
William Juulcfa460a2007-10-31 13:53:06 +0100102 104, 105, 106, 107, 108, 109, 110, 111,
103 112, 113, 114, 115, 116, 117, 118, 119,
104 120, 121, 122, 123, 124, 125, 126, 127},
105 .oobfree = {
106 {.offset = 2,
Christian Hitz90e3f392011-10-12 09:32:01 +0200107 .length = 78} }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200108};
109
William Juulcfa460a2007-10-31 13:53:06 +0100110static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd,
111 int new_state);
112
113static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
114 struct mtd_oob_ops *ops);
115
116static int nand_wait(struct mtd_info *mtd, struct nand_chip *this);
Sergei Poselenov248ae5c2008-06-06 15:42:43 +0200117
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200118static int check_offs_len(struct mtd_info *mtd,
119 loff_t ofs, uint64_t len)
120{
121 struct nand_chip *chip = mtd->priv;
122 int ret = 0;
123
124 /* Start address must align on block boundary */
125 if (ofs & ((1 << chip->phys_erase_shift) - 1)) {
126 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Unaligned address\n", __func__);
127 ret = -EINVAL;
128 }
129
130 /* Length must align on block boundary */
131 if (len & ((1 << chip->phys_erase_shift) - 1)) {
132 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Length not block aligned\n",
133 __func__);
134 ret = -EINVAL;
135 }
136
137 /* Do not allow past end of device */
138 if (ofs + len > mtd->size) {
139 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Past end of device\n",
140 __func__);
141 ret = -EINVAL;
142 }
143
144 return ret;
145}
146
Wolfgang Denk932394a2005-08-17 12:55:25 +0200147/**
148 * nand_release_device - [GENERIC] release chip
149 * @mtd: MTD device structure
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200150 *
151 * Deselect, release chip lock and wake up anyone waiting on the device
Wolfgang Denk932394a2005-08-17 12:55:25 +0200152 */
Christian Hitz90e3f392011-10-12 09:32:01 +0200153static void nand_release_device(struct mtd_info *mtd)
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100154{
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200155 struct nand_chip *chip = mtd->priv;
156
157 /* De-select the NAND device */
158 chip->select_chip(mtd, -1);
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100159}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200160
161/**
162 * nand_read_byte - [DEFAULT] read one byte from the chip
163 * @mtd: MTD device structure
164 *
165 * Default read function for 8bit buswith
166 */
Simon Schwarz82645f82011-10-31 06:34:44 +0000167uint8_t nand_read_byte(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200168{
William Juulcfa460a2007-10-31 13:53:06 +0100169 struct nand_chip *chip = mtd->priv;
170 return readb(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200171}
172
173/**
174 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
175 * @mtd: MTD device structure
176 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200177 * Default read function for 16bit buswith with
Wolfgang Denk932394a2005-08-17 12:55:25 +0200178 * endianess conversion
179 */
William Juulcfa460a2007-10-31 13:53:06 +0100180static uint8_t nand_read_byte16(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200181{
William Juulcfa460a2007-10-31 13:53:06 +0100182 struct nand_chip *chip = mtd->priv;
183 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Wolfgang Denk932394a2005-08-17 12:55:25 +0200184}
185
186/**
187 * nand_read_word - [DEFAULT] read one word from the chip
188 * @mtd: MTD device structure
189 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200190 * Default read function for 16bit buswith without
Wolfgang Denk932394a2005-08-17 12:55:25 +0200191 * endianess conversion
192 */
193static u16 nand_read_word(struct mtd_info *mtd)
194{
William Juulcfa460a2007-10-31 13:53:06 +0100195 struct nand_chip *chip = mtd->priv;
196 return readw(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200197}
198
199/**
200 * nand_select_chip - [DEFAULT] control CE line
201 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +0100202 * @chipnr: chipnumber to select, -1 for deselect
Wolfgang Denk932394a2005-08-17 12:55:25 +0200203 *
204 * Default select function for 1 chip devices.
205 */
William Juulcfa460a2007-10-31 13:53:06 +0100206static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200207{
William Juulcfa460a2007-10-31 13:53:06 +0100208 struct nand_chip *chip = mtd->priv;
209
210 switch (chipnr) {
Wolfgang Denk932394a2005-08-17 12:55:25 +0200211 case -1:
William Juulcfa460a2007-10-31 13:53:06 +0100212 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200213 break;
214 case 0:
Wolfgang Denk932394a2005-08-17 12:55:25 +0200215 break;
216
217 default:
218 BUG();
219 }
220}
221
222/**
223 * nand_write_buf - [DEFAULT] write buffer to chip
224 * @mtd: MTD device structure
225 * @buf: data buffer
226 * @len: number of bytes to write
227 *
228 * Default write function for 8bit buswith
229 */
Simon Schwarz82645f82011-10-31 06:34:44 +0000230void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200231{
232 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100233 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200234
William Juulcfa460a2007-10-31 13:53:06 +0100235 for (i = 0; i < len; i++)
236 writeb(buf[i], chip->IO_ADDR_W);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200237}
238
239/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200240 * nand_read_buf - [DEFAULT] read chip data into buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200241 * @mtd: MTD device structure
242 * @buf: buffer to store date
243 * @len: number of bytes to read
244 *
245 * Default read function for 8bit buswith
246 */
Simon Schwarz12c2f1e2011-09-14 15:30:16 -0400247void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200248{
249 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100250 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200251
William Juulcfa460a2007-10-31 13:53:06 +0100252 for (i = 0; i < len; i++)
253 buf[i] = readb(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200254}
255
256/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200257 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200258 * @mtd: MTD device structure
259 * @buf: buffer containing the data to compare
260 * @len: number of bytes to compare
261 *
262 * Default verify function for 8bit buswith
263 */
William Juulcfa460a2007-10-31 13:53:06 +0100264static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200265{
266 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100267 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200268
William Juulcfa460a2007-10-31 13:53:06 +0100269 for (i = 0; i < len; i++)
270 if (buf[i] != readb(chip->IO_ADDR_R))
Wolfgang Denk932394a2005-08-17 12:55:25 +0200271 return -EFAULT;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200272 return 0;
273}
274
275/**
276 * nand_write_buf16 - [DEFAULT] write buffer to chip
277 * @mtd: MTD device structure
278 * @buf: data buffer
279 * @len: number of bytes to write
280 *
281 * Default write function for 16bit buswith
282 */
Simon Schwarz82645f82011-10-31 06:34:44 +0000283void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200284{
285 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100286 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200287 u16 *p = (u16 *) buf;
288 len >>= 1;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200289
William Juulcfa460a2007-10-31 13:53:06 +0100290 for (i = 0; i < len; i++)
291 writew(p[i], chip->IO_ADDR_W);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200292
Wolfgang Denk932394a2005-08-17 12:55:25 +0200293}
294
295/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200296 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200297 * @mtd: MTD device structure
298 * @buf: buffer to store date
299 * @len: number of bytes to read
300 *
301 * Default read function for 16bit buswith
302 */
Simon Schwarz12c2f1e2011-09-14 15:30:16 -0400303void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200304{
305 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100306 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200307 u16 *p = (u16 *) buf;
308 len >>= 1;
309
William Juulcfa460a2007-10-31 13:53:06 +0100310 for (i = 0; i < len; i++)
311 p[i] = readw(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200312}
313
314/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200315 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200316 * @mtd: MTD device structure
317 * @buf: buffer containing the data to compare
318 * @len: number of bytes to compare
319 *
320 * Default verify function for 16bit buswith
321 */
William Juulcfa460a2007-10-31 13:53:06 +0100322static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200323{
324 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100325 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200326 u16 *p = (u16 *) buf;
327 len >>= 1;
328
William Juulcfa460a2007-10-31 13:53:06 +0100329 for (i = 0; i < len; i++)
330 if (p[i] != readw(chip->IO_ADDR_R))
Wolfgang Denk932394a2005-08-17 12:55:25 +0200331 return -EFAULT;
332
333 return 0;
334}
335
336/**
337 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
338 * @mtd: MTD device structure
339 * @ofs: offset from device start
340 * @getchip: 0, if the chip is already selected
341 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200342 * Check, if the block is bad.
Wolfgang Denk932394a2005-08-17 12:55:25 +0200343 */
344static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
345{
346 int page, chipnr, res = 0;
William Juulcfa460a2007-10-31 13:53:06 +0100347 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200348 u16 bad;
349
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200350 if (chip->options & NAND_BBT_SCANLASTPAGE)
351 ofs += mtd->erasesize - mtd->writesize;
352
William Juulcfa460a2007-10-31 13:53:06 +0100353 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
Thomas Knoblocha7988652007-05-05 07:04:42 +0200354
Wolfgang Denk932394a2005-08-17 12:55:25 +0200355 if (getchip) {
William Juulcfa460a2007-10-31 13:53:06 +0100356 chipnr = (int)(ofs >> chip->chip_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200357
William Juulcfa460a2007-10-31 13:53:06 +0100358 nand_get_device(chip, mtd, FL_READING);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200359
360 /* Select the NAND device */
William Juulcfa460a2007-10-31 13:53:06 +0100361 chip->select_chip(mtd, chipnr);
Thomas Knoblocha7988652007-05-05 07:04:42 +0200362 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200363
William Juulcfa460a2007-10-31 13:53:06 +0100364 if (chip->options & NAND_BUSWIDTH_16) {
365 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE,
366 page);
367 bad = cpu_to_le16(chip->read_word(mtd));
368 if (chip->badblockpos & 0x1)
369 bad >>= 8;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200370 else
371 bad &= 0xFF;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200372 } else {
William Juulcfa460a2007-10-31 13:53:06 +0100373 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200374 bad = chip->read_byte(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200375 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200376
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200377 if (likely(chip->badblockbits == 8))
378 res = bad != 0xFF;
379 else
380 res = hweight8(bad) < chip->badblockbits;
381
William Juulcfa460a2007-10-31 13:53:06 +0100382 if (getchip)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200383 nand_release_device(mtd);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200384
Wolfgang Denk932394a2005-08-17 12:55:25 +0200385 return res;
386}
387
388/**
389 * nand_default_block_markbad - [DEFAULT] mark a block bad
390 * @mtd: MTD device structure
391 * @ofs: offset from device start
392 *
393 * This is the default implementation, which can be overridden by
394 * a hardware specific driver.
395*/
396static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
397{
William Juulcfa460a2007-10-31 13:53:06 +0100398 struct nand_chip *chip = mtd->priv;
399 uint8_t buf[2] = { 0, 0 };
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200400 int block, ret, i = 0;
401
402 if (chip->options & NAND_BBT_SCANLASTPAGE)
403 ofs += mtd->erasesize - mtd->writesize;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200404
Wolfgang Denk932394a2005-08-17 12:55:25 +0200405 /* Get block number */
William Juulcfa460a2007-10-31 13:53:06 +0100406 block = (int)(ofs >> chip->bbt_erase_shift);
407 if (chip->bbt)
408 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200409
410 /* Do we have a flash based bad block table ? */
William Juulcfa460a2007-10-31 13:53:06 +0100411 if (chip->options & NAND_USE_FLASH_BBT)
412 ret = nand_update_bbt(mtd, ofs);
413 else {
Scott Woodc45912d2008-10-24 16:20:43 -0500414 nand_get_device(chip, mtd, FL_WRITING);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200415
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200416 /* Write to first two pages and to byte 1 and 6 if necessary.
417 * If we write to more than one location, the first error
418 * encountered quits the procedure. We write two bytes per
419 * location, so we dont have to mess with 16 bit access.
420 */
421 do {
422 chip->ops.len = chip->ops.ooblen = 2;
423 chip->ops.datbuf = NULL;
424 chip->ops.oobbuf = buf;
425 chip->ops.ooboffs = chip->badblockpos & ~0x01;
426
427 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
428
429 if (!ret && (chip->options & NAND_BBT_SCANBYTE1AND6)) {
430 chip->ops.ooboffs = NAND_SMALL_BADBLOCK_POS
431 & ~0x01;
432 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
433 }
434 i++;
435 ofs += mtd->writesize;
436 } while (!ret && (chip->options & NAND_BBT_SCAN2NDPAGE) &&
437 i < 2);
438
Scott Woodc45912d2008-10-24 16:20:43 -0500439 nand_release_device(mtd);
William Juulcfa460a2007-10-31 13:53:06 +0100440 }
441 if (!ret)
442 mtd->ecc_stats.badblocks++;
Scott Woodc45912d2008-10-24 16:20:43 -0500443
William Juulcfa460a2007-10-31 13:53:06 +0100444 return ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200445}
446
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200447/**
Wolfgang Denk932394a2005-08-17 12:55:25 +0200448 * nand_check_wp - [GENERIC] check if the chip is write protected
449 * @mtd: MTD device structure
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200450 * Check, if the device is write protected
Wolfgang Denk932394a2005-08-17 12:55:25 +0200451 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200452 * The function expects, that the device is already selected
Wolfgang Denk932394a2005-08-17 12:55:25 +0200453 */
William Juulcfa460a2007-10-31 13:53:06 +0100454static int nand_check_wp(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200455{
William Juulcfa460a2007-10-31 13:53:06 +0100456 struct nand_chip *chip = mtd->priv;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200457
458 /* broken xD cards report WP despite being writable */
459 if (chip->options & NAND_BROKEN_XD)
460 return 0;
461
Wolfgang Denk932394a2005-08-17 12:55:25 +0200462 /* Check the WP bit */
William Juulcfa460a2007-10-31 13:53:06 +0100463 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
464 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200465}
Markus Klotzbücher43638c62006-03-06 15:04:25 +0100466
Wolfgang Denk932394a2005-08-17 12:55:25 +0200467/**
468 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
469 * @mtd: MTD device structure
470 * @ofs: offset from device start
471 * @getchip: 0, if the chip is already selected
472 * @allowbbt: 1, if its allowed to access the bbt area
473 *
474 * Check, if the block is bad. Either by reading the bad block table or
475 * calling of the scan function.
476 */
William Juulcfa460a2007-10-31 13:53:06 +0100477static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
478 int allowbbt)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200479{
William Juulcfa460a2007-10-31 13:53:06 +0100480 struct nand_chip *chip = mtd->priv;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200481
Scott Woodfb494542012-02-20 14:50:39 -0600482 if (!(chip->options & NAND_BBT_SCANNED)) {
483 chip->options |= NAND_BBT_SCANNED;
484 chip->scan_bbt(mtd);
485 }
486
William Juulcfa460a2007-10-31 13:53:06 +0100487 if (!chip->bbt)
488 return chip->block_bad(mtd, ofs, getchip);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200489
Wolfgang Denk932394a2005-08-17 12:55:25 +0200490 /* Return info from the table */
William Juulcfa460a2007-10-31 13:53:06 +0100491 return nand_isbad_bbt(mtd, ofs, allowbbt);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200492}
493
William Juulcfa460a2007-10-31 13:53:06 +0100494/*
495 * Wait for the ready pin, after a command
496 * The timeout is catched later.
497 */
William Juulcfa460a2007-10-31 13:53:06 +0100498void nand_wait_ready(struct mtd_info *mtd)
499{
500 struct nand_chip *chip = mtd->priv;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200501 u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000502 u32 time_start;
Stefan Roese12072262008-01-05 16:43:25 +0100503
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000504 time_start = get_timer(0);
Stefan Roese12072262008-01-05 16:43:25 +0100505
506 /* wait until command is processed or timeout occures */
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000507 while (get_timer(time_start) < timeo) {
Stefan Roese12072262008-01-05 16:43:25 +0100508 if (chip->dev_ready)
509 if (chip->dev_ready(mtd))
510 break;
511 }
William Juulcfa460a2007-10-31 13:53:06 +0100512}
William Juulcfa460a2007-10-31 13:53:06 +0100513
Wolfgang Denk932394a2005-08-17 12:55:25 +0200514/**
515 * nand_command - [DEFAULT] Send command to NAND device
516 * @mtd: MTD device structure
517 * @command: the command to be sent
518 * @column: the column address for this command, -1 if none
519 * @page_addr: the page address for this command, -1 if none
520 *
521 * Send command to NAND device. This function is used for small page
522 * devices (256/512 Bytes per page)
523 */
William Juulcfa460a2007-10-31 13:53:06 +0100524static void nand_command(struct mtd_info *mtd, unsigned int command,
525 int column, int page_addr)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200526{
William Juulcfa460a2007-10-31 13:53:06 +0100527 register struct nand_chip *chip = mtd->priv;
528 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Peter Tyser8da60122009-02-04 13:47:22 -0600529 uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200530
Wolfgang Denk932394a2005-08-17 12:55:25 +0200531 /*
532 * Write out the command to the device.
533 */
534 if (command == NAND_CMD_SEQIN) {
535 int readcmd;
536
William Juulcfa460a2007-10-31 13:53:06 +0100537 if (column >= mtd->writesize) {
Wolfgang Denk932394a2005-08-17 12:55:25 +0200538 /* OOB area */
William Juulcfa460a2007-10-31 13:53:06 +0100539 column -= mtd->writesize;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200540 readcmd = NAND_CMD_READOOB;
541 } else if (column < 256) {
542 /* First 256 bytes --> READ0 */
543 readcmd = NAND_CMD_READ0;
544 } else {
545 column -= 256;
546 readcmd = NAND_CMD_READ1;
547 }
William Juulcfa460a2007-10-31 13:53:06 +0100548 chip->cmd_ctrl(mtd, readcmd, ctrl);
549 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200550 }
William Juulcfa460a2007-10-31 13:53:06 +0100551 chip->cmd_ctrl(mtd, command, ctrl);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200552
William Juulcfa460a2007-10-31 13:53:06 +0100553 /*
554 * Address cycle, when necessary
555 */
556 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
557 /* Serially input address */
558 if (column != -1) {
559 /* Adjust columns for 16 bit buswidth */
560 if (chip->options & NAND_BUSWIDTH_16)
561 column >>= 1;
562 chip->cmd_ctrl(mtd, column, ctrl);
563 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200564 }
William Juulcfa460a2007-10-31 13:53:06 +0100565 if (page_addr != -1) {
566 chip->cmd_ctrl(mtd, page_addr, ctrl);
567 ctrl &= ~NAND_CTRL_CHANGE;
568 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
569 /* One more address cycle for devices > 32MiB */
570 if (chip->chipsize > (32 << 20))
571 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
572 }
573 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200574
575 /*
576 * program and erase have their own busy handlers
Wolfgang Denk932394a2005-08-17 12:55:25 +0200577 * status and sequential in needs no delay
William Juulcfa460a2007-10-31 13:53:06 +0100578 */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200579 switch (command) {
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200580
Wolfgang Denk932394a2005-08-17 12:55:25 +0200581 case NAND_CMD_PAGEPROG:
582 case NAND_CMD_ERASE1:
583 case NAND_CMD_ERASE2:
584 case NAND_CMD_SEQIN:
585 case NAND_CMD_STATUS:
586 return;
587
588 case NAND_CMD_RESET:
William Juulcfa460a2007-10-31 13:53:06 +0100589 if (chip->dev_ready)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200590 break;
William Juulcfa460a2007-10-31 13:53:06 +0100591 udelay(chip->chip_delay);
592 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
593 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
594 chip->cmd_ctrl(mtd,
595 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Peter Tyser8da60122009-02-04 13:47:22 -0600596 while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&
597 (rst_sts_cnt--));
Wolfgang Denk932394a2005-08-17 12:55:25 +0200598 return;
599
William Juulcfa460a2007-10-31 13:53:06 +0100600 /* This applies to read commands */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200601 default:
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200602 /*
Wolfgang Denk932394a2005-08-17 12:55:25 +0200603 * If we don't have access to the busy pin, we apply the given
604 * command delay
William Juulcfa460a2007-10-31 13:53:06 +0100605 */
606 if (!chip->dev_ready) {
607 udelay(chip->chip_delay);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200608 return;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200609 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200610 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200611 /* Apply this short delay always to ensure that we do wait tWB in
612 * any case on any machine. */
William Juulcfa460a2007-10-31 13:53:06 +0100613 ndelay(100);
614
615 nand_wait_ready(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200616}
617
618/**
619 * nand_command_lp - [DEFAULT] Send command to NAND large page device
620 * @mtd: MTD device structure
621 * @command: the command to be sent
622 * @column: the column address for this command, -1 if none
623 * @page_addr: the page address for this command, -1 if none
624 *
William Juulcfa460a2007-10-31 13:53:06 +0100625 * Send command to NAND device. This is the version for the new large page
626 * devices We dont have the separate regions as we have in the small page
627 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Wolfgang Denk932394a2005-08-17 12:55:25 +0200628 */
William Juulcfa460a2007-10-31 13:53:06 +0100629static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
630 int column, int page_addr)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200631{
William Juulcfa460a2007-10-31 13:53:06 +0100632 register struct nand_chip *chip = mtd->priv;
Peter Tyser8da60122009-02-04 13:47:22 -0600633 uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200634
635 /* Emulate NAND_CMD_READOOB */
636 if (command == NAND_CMD_READOOB) {
William Juulcfa460a2007-10-31 13:53:06 +0100637 column += mtd->writesize;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200638 command = NAND_CMD_READ0;
639 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200640
William Juulcfa460a2007-10-31 13:53:06 +0100641 /* Command latch cycle */
642 chip->cmd_ctrl(mtd, command & 0xff,
643 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200644
645 if (column != -1 || page_addr != -1) {
William Juulcfa460a2007-10-31 13:53:06 +0100646 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200647
648 /* Serially input address */
649 if (column != -1) {
650 /* Adjust columns for 16 bit buswidth */
William Juulcfa460a2007-10-31 13:53:06 +0100651 if (chip->options & NAND_BUSWIDTH_16)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200652 column >>= 1;
William Juulcfa460a2007-10-31 13:53:06 +0100653 chip->cmd_ctrl(mtd, column, ctrl);
654 ctrl &= ~NAND_CTRL_CHANGE;
655 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200656 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200657 if (page_addr != -1) {
William Juulcfa460a2007-10-31 13:53:06 +0100658 chip->cmd_ctrl(mtd, page_addr, ctrl);
659 chip->cmd_ctrl(mtd, page_addr >> 8,
660 NAND_NCE | NAND_ALE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200661 /* One more address cycle for devices > 128MiB */
William Juulcfa460a2007-10-31 13:53:06 +0100662 if (chip->chipsize > (128 << 20))
663 chip->cmd_ctrl(mtd, page_addr >> 16,
664 NAND_NCE | NAND_ALE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200665 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200666 }
William Juulcfa460a2007-10-31 13:53:06 +0100667 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200668
669 /*
670 * program and erase have their own busy handlers
William Juulcfa460a2007-10-31 13:53:06 +0100671 * status, sequential in, and deplete1 need no delay
672 */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200673 switch (command) {
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200674
Wolfgang Denk932394a2005-08-17 12:55:25 +0200675 case NAND_CMD_CACHEDPROG:
676 case NAND_CMD_PAGEPROG:
677 case NAND_CMD_ERASE1:
678 case NAND_CMD_ERASE2:
679 case NAND_CMD_SEQIN:
William Juulcfa460a2007-10-31 13:53:06 +0100680 case NAND_CMD_RNDIN:
Wolfgang Denk932394a2005-08-17 12:55:25 +0200681 case NAND_CMD_STATUS:
William Juulcfa460a2007-10-31 13:53:06 +0100682 case NAND_CMD_DEPLETE1:
Wolfgang Denk932394a2005-08-17 12:55:25 +0200683 return;
684
William Juulcfa460a2007-10-31 13:53:06 +0100685 /*
686 * read error status commands require only a short delay
687 */
688 case NAND_CMD_STATUS_ERROR:
689 case NAND_CMD_STATUS_ERROR0:
690 case NAND_CMD_STATUS_ERROR1:
691 case NAND_CMD_STATUS_ERROR2:
692 case NAND_CMD_STATUS_ERROR3:
693 udelay(chip->chip_delay);
694 return;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200695
696 case NAND_CMD_RESET:
William Juulcfa460a2007-10-31 13:53:06 +0100697 if (chip->dev_ready)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200698 break;
William Juulcfa460a2007-10-31 13:53:06 +0100699 udelay(chip->chip_delay);
700 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
701 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
702 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
703 NAND_NCE | NAND_CTRL_CHANGE);
Peter Tyser8da60122009-02-04 13:47:22 -0600704 while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&
705 (rst_sts_cnt--));
William Juulcfa460a2007-10-31 13:53:06 +0100706 return;
707
708 case NAND_CMD_RNDOUT:
709 /* No ready / busy check necessary */
710 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
711 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
712 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
713 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200714 return;
715
716 case NAND_CMD_READ0:
William Juulcfa460a2007-10-31 13:53:06 +0100717 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
718 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
719 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
720 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200721
William Juulcfa460a2007-10-31 13:53:06 +0100722 /* This applies to read commands */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200723 default:
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200724 /*
Wolfgang Denk932394a2005-08-17 12:55:25 +0200725 * If we don't have access to the busy pin, we apply the given
726 * command delay
William Juulcfa460a2007-10-31 13:53:06 +0100727 */
728 if (!chip->dev_ready) {
729 udelay(chip->chip_delay);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200730 return;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200731 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200732 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200733
Wolfgang Denk932394a2005-08-17 12:55:25 +0200734 /* Apply this short delay always to ensure that we do wait tWB in
735 * any case on any machine. */
William Juulcfa460a2007-10-31 13:53:06 +0100736 ndelay(100);
737
738 nand_wait_ready(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200739}
740
741/**
742 * nand_get_device - [GENERIC] Get chip for selected access
William Juulcfa460a2007-10-31 13:53:06 +0100743 * @chip: the nand chip descriptor
Wolfgang Denk932394a2005-08-17 12:55:25 +0200744 * @mtd: MTD device structure
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200745 * @new_state: the state which is requested
Wolfgang Denk932394a2005-08-17 12:55:25 +0200746 *
747 * Get the device and lock it for exclusive access
748 */
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200749static int
750nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state)
William Juulcfa460a2007-10-31 13:53:06 +0100751{
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200752 chip->state = new_state;
William Juulcfa460a2007-10-31 13:53:06 +0100753 return 0;
754}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200755
756/**
757 * nand_wait - [DEFAULT] wait until the command is done
758 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +0100759 * @chip: NAND chip structure
Wolfgang Denk932394a2005-08-17 12:55:25 +0200760 *
761 * Wait for command done. This applies to erase and program only
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200762 * Erase can take up to 400ms and program up to 20ms according to
Wolfgang Denk932394a2005-08-17 12:55:25 +0200763 * general NAND and SmartMedia specs
William Juulcfa460a2007-10-31 13:53:06 +0100764 */
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200765static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200766{
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100767 unsigned long timeo;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200768 int state = chip->state;
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000769 u32 time_start;
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100770
771 if (state == FL_ERASING)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200772 timeo = (CONFIG_SYS_HZ * 400) / 1000;
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100773 else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200774 timeo = (CONFIG_SYS_HZ * 20) / 1000;
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100775
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200776 if ((state == FL_ERASING) && (chip->options & NAND_IS_AND))
777 chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100778 else
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200779 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100780
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000781 time_start = get_timer(0);
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100782
783 while (1) {
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000784 if (get_timer(time_start) > timeo) {
Bartlomiej Sieka038ccac2006-02-24 09:37:22 +0100785 printf("Timeout!");
Stefan Roese15784862006-11-27 17:22:19 +0100786 return 0x01;
787 }
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100788
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200789 if (chip->dev_ready) {
790 if (chip->dev_ready(mtd))
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100791 break;
792 } else {
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200793 if (chip->read_byte(mtd) & NAND_STATUS_READY)
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100794 break;
795 }
796 }
Bartlomiej Siekaaddb2e12006-03-05 18:57:33 +0100797#ifdef PPCHAMELON_NAND_TIMER_HACK
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000798 time_start = get_timer(0);
799 while (get_timer(time_start) < 10)
800 ;
Bartlomiej Siekaaddb2e12006-03-05 18:57:33 +0100801#endif /* PPCHAMELON_NAND_TIMER_HACK */
Bartlomiej Sieka038ccac2006-02-24 09:37:22 +0100802
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200803 return (int)chip->read_byte(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200804}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200805
806/**
William Juulcfa460a2007-10-31 13:53:06 +0100807 * nand_read_page_raw - [Intern] read raw page data without ecc
808 * @mtd: mtd info structure
809 * @chip: nand chip info structure
810 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500811 * @page: page number to read
David Brownell7e866612009-11-07 16:27:01 -0500812 *
813 * Not for syndrome calculating ecc controllers, which use a special oob layout
Wolfgang Denk932394a2005-08-17 12:55:25 +0200814 */
William Juulcfa460a2007-10-31 13:53:06 +0100815static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400816 uint8_t *buf, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200817{
William Juulcfa460a2007-10-31 13:53:06 +0100818 chip->read_buf(mtd, buf, mtd->writesize);
819 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
820 return 0;
821}
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200822
William Juulcfa460a2007-10-31 13:53:06 +0100823/**
David Brownell7e866612009-11-07 16:27:01 -0500824 * nand_read_page_raw_syndrome - [Intern] read raw page data without ecc
825 * @mtd: mtd info structure
826 * @chip: nand chip info structure
827 * @buf: buffer to store read data
828 * @page: page number to read
829 *
830 * We need a special oob layout and handling even when OOB isn't used.
831 */
Christian Hitz90e3f392011-10-12 09:32:01 +0200832static int nand_read_page_raw_syndrome(struct mtd_info *mtd,
833 struct nand_chip *chip,
834 uint8_t *buf, int page)
David Brownell7e866612009-11-07 16:27:01 -0500835{
836 int eccsize = chip->ecc.size;
837 int eccbytes = chip->ecc.bytes;
838 uint8_t *oob = chip->oob_poi;
839 int steps, size;
840
841 for (steps = chip->ecc.steps; steps > 0; steps--) {
842 chip->read_buf(mtd, buf, eccsize);
843 buf += eccsize;
844
845 if (chip->ecc.prepad) {
846 chip->read_buf(mtd, oob, chip->ecc.prepad);
847 oob += chip->ecc.prepad;
848 }
849
850 chip->read_buf(mtd, oob, eccbytes);
851 oob += eccbytes;
852
853 if (chip->ecc.postpad) {
854 chip->read_buf(mtd, oob, chip->ecc.postpad);
855 oob += chip->ecc.postpad;
856 }
857 }
858
859 size = mtd->oobsize - (oob - chip->oob_poi);
860 if (size)
861 chip->read_buf(mtd, oob, size);
862
863 return 0;
864}
865
866/**
William Juulcfa460a2007-10-31 13:53:06 +0100867 * nand_read_page_swecc - [REPLACABLE] software ecc based page read function
868 * @mtd: mtd info structure
869 * @chip: nand chip info structure
870 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500871 * @page: page number to read
William Juulcfa460a2007-10-31 13:53:06 +0100872 */
873static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400874 uint8_t *buf, int page)
William Juulcfa460a2007-10-31 13:53:06 +0100875{
876 int i, eccsize = chip->ecc.size;
877 int eccbytes = chip->ecc.bytes;
878 int eccsteps = chip->ecc.steps;
879 uint8_t *p = buf;
880 uint8_t *ecc_calc = chip->buffers->ecccalc;
881 uint8_t *ecc_code = chip->buffers->ecccode;
882 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200883
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400884 chip->ecc.read_page_raw(mtd, chip, buf, page);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200885
William Juulcfa460a2007-10-31 13:53:06 +0100886 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
887 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200888
William Juulcfa460a2007-10-31 13:53:06 +0100889 for (i = 0; i < chip->ecc.total; i++)
890 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200891
William Juulcfa460a2007-10-31 13:53:06 +0100892 eccsteps = chip->ecc.steps;
893 p = buf;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200894
William Juulcfa460a2007-10-31 13:53:06 +0100895 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
896 int stat;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200897
William Juulcfa460a2007-10-31 13:53:06 +0100898 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Scott Woodc45912d2008-10-24 16:20:43 -0500899 if (stat < 0)
900 mtd->ecc_stats.failed++;
901 else
902 mtd->ecc_stats.corrected += stat;
903 }
904 return 0;
905}
906
907/**
908 * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function
909 * @mtd: mtd info structure
910 * @chip: nand chip info structure
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500911 * @data_offs: offset of requested data within the page
912 * @readlen: data length
913 * @bufpoi: buffer to store read data
Scott Woodc45912d2008-10-24 16:20:43 -0500914 */
Christian Hitz90e3f392011-10-12 09:32:01 +0200915static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
916 uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
Scott Woodc45912d2008-10-24 16:20:43 -0500917{
918 int start_step, end_step, num_steps;
919 uint32_t *eccpos = chip->ecc.layout->eccpos;
920 uint8_t *p;
921 int data_col_addr, i, gaps = 0;
922 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
923 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200924 int index = 0;
Scott Woodc45912d2008-10-24 16:20:43 -0500925
926 /* Column address wihin the page aligned to ECC size (256bytes). */
927 start_step = data_offs / chip->ecc.size;
928 end_step = (data_offs + readlen - 1) / chip->ecc.size;
929 num_steps = end_step - start_step + 1;
930
931 /* Data size aligned to ECC ecc.size*/
932 datafrag_len = num_steps * chip->ecc.size;
933 eccfrag_len = num_steps * chip->ecc.bytes;
934
935 data_col_addr = start_step * chip->ecc.size;
936 /* If we read not a page aligned data */
937 if (data_col_addr != 0)
938 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
939
940 p = bufpoi + data_col_addr;
941 chip->read_buf(mtd, p, datafrag_len);
942
943 /* Calculate ECC */
944 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
945 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
946
947 /* The performance is faster if to position offsets
948 according to ecc.pos. Let make sure here that
949 there are no gaps in ecc positions */
950 for (i = 0; i < eccfrag_len - 1; i++) {
951 if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
952 eccpos[i + start_step * chip->ecc.bytes + 1]) {
953 gaps = 1;
954 break;
955 }
956 }
957 if (gaps) {
958 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
959 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
960 } else {
961 /* send the command to read the particular ecc bytes */
962 /* take care about buswidth alignment in read_buf */
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200963 index = start_step * chip->ecc.bytes;
964
965 aligned_pos = eccpos[index] & ~(busw - 1);
Scott Woodc45912d2008-10-24 16:20:43 -0500966 aligned_len = eccfrag_len;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200967 if (eccpos[index] & (busw - 1))
Scott Woodc45912d2008-10-24 16:20:43 -0500968 aligned_len++;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200969 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1))
Scott Woodc45912d2008-10-24 16:20:43 -0500970 aligned_len++;
971
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200972 chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
973 mtd->writesize + aligned_pos, -1);
Scott Woodc45912d2008-10-24 16:20:43 -0500974 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
975 }
976
977 for (i = 0; i < eccfrag_len; i++)
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200978 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]];
Scott Woodc45912d2008-10-24 16:20:43 -0500979
980 p = bufpoi + data_col_addr;
981 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
982 int stat;
983
Christian Hitz2a8e0fc2011-10-12 09:32:02 +0200984 stat = chip->ecc.correct(mtd, p,
985 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
986 if (stat < 0)
William Juulcfa460a2007-10-31 13:53:06 +0100987 mtd->ecc_stats.failed++;
988 else
989 mtd->ecc_stats.corrected += stat;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200990 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200991 return 0;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200992}
993
Wolfgang Denk932394a2005-08-17 12:55:25 +0200994/**
William Juulcfa460a2007-10-31 13:53:06 +0100995 * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function
996 * @mtd: mtd info structure
997 * @chip: nand chip info structure
998 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500999 * @page: page number to read
Wolfgang Denk932394a2005-08-17 12:55:25 +02001000 *
William Juulcfa460a2007-10-31 13:53:06 +01001001 * Not for syndrome calculating ecc controllers which need a special oob layout
Wolfgang Denk932394a2005-08-17 12:55:25 +02001002 */
William Juulcfa460a2007-10-31 13:53:06 +01001003static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001004 uint8_t *buf, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +02001005{
William Juulcfa460a2007-10-31 13:53:06 +01001006 int i, eccsize = chip->ecc.size;
1007 int eccbytes = chip->ecc.bytes;
1008 int eccsteps = chip->ecc.steps;
1009 uint8_t *p = buf;
1010 uint8_t *ecc_calc = chip->buffers->ecccalc;
1011 uint8_t *ecc_code = chip->buffers->ecccode;
1012 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001013
William Juulcfa460a2007-10-31 13:53:06 +01001014 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1015 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1016 chip->read_buf(mtd, p, eccsize);
1017 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1018 }
1019 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001020
William Juulcfa460a2007-10-31 13:53:06 +01001021 for (i = 0; i < chip->ecc.total; i++)
1022 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denk932394a2005-08-17 12:55:25 +02001023
William Juulcfa460a2007-10-31 13:53:06 +01001024 eccsteps = chip->ecc.steps;
1025 p = buf;
1026
1027 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1028 int stat;
1029
1030 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Sandeep Paulraj18b5a4b2009-11-07 14:25:03 -05001031 if (stat < 0)
William Juulcfa460a2007-10-31 13:53:06 +01001032 mtd->ecc_stats.failed++;
1033 else
1034 mtd->ecc_stats.corrected += stat;
1035 }
1036 return 0;
1037}
1038
1039/**
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -04001040 * nand_read_page_hwecc_oob_first - [REPLACABLE] hw ecc, read oob first
1041 * @mtd: mtd info structure
1042 * @chip: nand chip info structure
1043 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -05001044 * @page: page number to read
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -04001045 *
1046 * Hardware ECC for large page chips, require OOB to be read first.
1047 * For this ECC mode, the write_page method is re-used from ECC_HW.
1048 * These methods read/write ECC from the OOB area, unlike the
1049 * ECC_HW_SYNDROME support with multiple ECC steps, follows the
1050 * "infix ECC" scheme and reads/writes ECC from the data area, by
1051 * overwriting the NAND manufacturer bad block markings.
1052 */
1053static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
1054 struct nand_chip *chip, uint8_t *buf, int page)
1055{
1056 int i, eccsize = chip->ecc.size;
1057 int eccbytes = chip->ecc.bytes;
1058 int eccsteps = chip->ecc.steps;
1059 uint8_t *p = buf;
1060 uint8_t *ecc_code = chip->buffers->ecccode;
1061 uint32_t *eccpos = chip->ecc.layout->eccpos;
1062 uint8_t *ecc_calc = chip->buffers->ecccalc;
1063
1064 /* Read the OOB area first */
1065 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1066 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1067 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1068
1069 for (i = 0; i < chip->ecc.total; i++)
1070 ecc_code[i] = chip->oob_poi[eccpos[i]];
1071
1072 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1073 int stat;
1074
1075 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1076 chip->read_buf(mtd, p, eccsize);
1077 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1078
1079 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
1080 if (stat < 0)
1081 mtd->ecc_stats.failed++;
1082 else
1083 mtd->ecc_stats.corrected += stat;
1084 }
1085 return 0;
1086}
1087
1088/**
William Juulcfa460a2007-10-31 13:53:06 +01001089 * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read
1090 * @mtd: mtd info structure
1091 * @chip: nand chip info structure
1092 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -05001093 * @page: page number to read
William Juulcfa460a2007-10-31 13:53:06 +01001094 *
1095 * The hw generator calculates the error syndrome automatically. Therefor
1096 * we need a special oob layout and handling.
1097 */
1098static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001099 uint8_t *buf, int page)
William Juulcfa460a2007-10-31 13:53:06 +01001100{
1101 int i, eccsize = chip->ecc.size;
1102 int eccbytes = chip->ecc.bytes;
1103 int eccsteps = chip->ecc.steps;
1104 uint8_t *p = buf;
1105 uint8_t *oob = chip->oob_poi;
1106
1107 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1108 int stat;
1109
1110 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1111 chip->read_buf(mtd, p, eccsize);
1112
1113 if (chip->ecc.prepad) {
1114 chip->read_buf(mtd, oob, chip->ecc.prepad);
1115 oob += chip->ecc.prepad;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001116 }
1117
William Juulcfa460a2007-10-31 13:53:06 +01001118 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
1119 chip->read_buf(mtd, oob, eccbytes);
1120 stat = chip->ecc.correct(mtd, p, oob, NULL);
1121
Scott Woodc45912d2008-10-24 16:20:43 -05001122 if (stat < 0)
William Juulcfa460a2007-10-31 13:53:06 +01001123 mtd->ecc_stats.failed++;
1124 else
1125 mtd->ecc_stats.corrected += stat;
1126
1127 oob += eccbytes;
1128
1129 if (chip->ecc.postpad) {
1130 chip->read_buf(mtd, oob, chip->ecc.postpad);
1131 oob += chip->ecc.postpad;
1132 }
1133 }
1134
1135 /* Calculate remaining oob bytes */
1136 i = mtd->oobsize - (oob - chip->oob_poi);
1137 if (i)
1138 chip->read_buf(mtd, oob, i);
1139
1140 return 0;
1141}
1142
1143/**
1144 * nand_transfer_oob - [Internal] Transfer oob to client buffer
1145 * @chip: nand chip structure
1146 * @oob: oob destination address
1147 * @ops: oob ops structure
1148 * @len: size of oob to transfer
1149 */
1150static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
1151 struct mtd_oob_ops *ops, size_t len)
1152{
Christian Hitz90e3f392011-10-12 09:32:01 +02001153 switch (ops->mode) {
William Juulcfa460a2007-10-31 13:53:06 +01001154
1155 case MTD_OOB_PLACE:
1156 case MTD_OOB_RAW:
1157 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
1158 return oob + len;
1159
1160 case MTD_OOB_AUTO: {
1161 struct nand_oobfree *free = chip->ecc.layout->oobfree;
1162 uint32_t boffs = 0, roffs = ops->ooboffs;
1163 size_t bytes = 0;
1164
Christian Hitz90e3f392011-10-12 09:32:01 +02001165 for (; free->length && len; free++, len -= bytes) {
William Juulcfa460a2007-10-31 13:53:06 +01001166 /* Read request not from offset 0 ? */
1167 if (unlikely(roffs)) {
1168 if (roffs >= free->length) {
1169 roffs -= free->length;
1170 continue;
1171 }
1172 boffs = free->offset + roffs;
1173 bytes = min_t(size_t, len,
1174 (free->length - roffs));
1175 roffs = 0;
1176 } else {
1177 bytes = min_t(size_t, len, free->length);
1178 boffs = free->offset;
1179 }
1180 memcpy(oob, chip->oob_poi + boffs, bytes);
1181 oob += bytes;
1182 }
1183 return oob;
1184 }
1185 default:
1186 BUG();
1187 }
1188 return NULL;
1189}
1190
1191/**
1192 * nand_do_read_ops - [Internal] Read data with ECC
1193 *
1194 * @mtd: MTD device structure
1195 * @from: offset to read from
1196 * @ops: oob ops structure
1197 *
1198 * Internal function. Called with chip held.
1199 */
1200static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1201 struct mtd_oob_ops *ops)
1202{
1203 int chipnr, page, realpage, col, bytes, aligned;
1204 struct nand_chip *chip = mtd->priv;
1205 struct mtd_ecc_stats stats;
1206 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1207 int sndcmd = 1;
1208 int ret = 0;
1209 uint32_t readlen = ops->len;
1210 uint32_t oobreadlen = ops->ooblen;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02001211 uint32_t max_oobsize = ops->mode == MTD_OOB_AUTO ?
1212 mtd->oobavail : mtd->oobsize;
1213
William Juulcfa460a2007-10-31 13:53:06 +01001214 uint8_t *bufpoi, *oob, *buf;
1215
1216 stats = mtd->ecc_stats;
1217
1218 chipnr = (int)(from >> chip->chip_shift);
1219 chip->select_chip(mtd, chipnr);
1220
1221 realpage = (int)(from >> chip->page_shift);
1222 page = realpage & chip->pagemask;
1223
1224 col = (int)(from & (mtd->writesize - 1));
1225
1226 buf = ops->datbuf;
1227 oob = ops->oobbuf;
1228
Christian Hitz90e3f392011-10-12 09:32:01 +02001229 while (1) {
Scott Wood6f2ffc32011-02-02 18:15:57 -06001230 WATCHDOG_RESET();
1231
William Juulcfa460a2007-10-31 13:53:06 +01001232 bytes = min(mtd->writesize - col, readlen);
1233 aligned = (bytes == mtd->writesize);
1234
1235 /* Is the current page in the buffer ? */
1236 if (realpage != chip->pagebuf || oob) {
1237 bufpoi = aligned ? buf : chip->buffers->databuf;
1238
1239 if (likely(sndcmd)) {
1240 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
1241 sndcmd = 0;
1242 }
1243
1244 /* Now read the page into the buffer */
1245 if (unlikely(ops->mode == MTD_OOB_RAW))
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001246 ret = chip->ecc.read_page_raw(mtd, chip,
Christian Hitz90e3f392011-10-12 09:32:01 +02001247 bufpoi, page);
Scott Woodc45912d2008-10-24 16:20:43 -05001248 else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
Christian Hitz90e3f392011-10-12 09:32:01 +02001249 ret = chip->ecc.read_subpage(mtd, chip,
1250 col, bytes, bufpoi);
William Juulcfa460a2007-10-31 13:53:06 +01001251 else
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001252 ret = chip->ecc.read_page(mtd, chip, bufpoi,
Christian Hitz90e3f392011-10-12 09:32:01 +02001253 page);
William Juulcfa460a2007-10-31 13:53:06 +01001254 if (ret < 0)
1255 break;
1256
1257 /* Transfer not aligned data */
1258 if (!aligned) {
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02001259 if (!NAND_SUBPAGE_READ(chip) && !oob &&
1260 !(mtd->ecc_stats.failed - stats.failed))
Scott Woodc45912d2008-10-24 16:20:43 -05001261 chip->pagebuf = realpage;
William Juulcfa460a2007-10-31 13:53:06 +01001262 memcpy(buf, chip->buffers->databuf + col, bytes);
1263 }
1264
1265 buf += bytes;
1266
1267 if (unlikely(oob)) {
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02001268
1269 int toread = min(oobreadlen, max_oobsize);
1270
1271 if (toread) {
1272 oob = nand_transfer_oob(chip,
1273 oob, ops, toread);
1274 oobreadlen -= toread;
1275 }
William Juulcfa460a2007-10-31 13:53:06 +01001276 }
1277
1278 if (!(chip->options & NAND_NO_READRDY)) {
1279 /*
1280 * Apply delay or wait for ready/busy pin. Do
1281 * this before the AUTOINCR check, so no
1282 * problems arise if a chip which does auto
1283 * increment is marked as NOAUTOINCR by the
1284 * board driver.
1285 */
1286 if (!chip->dev_ready)
1287 udelay(chip->chip_delay);
1288 else
1289 nand_wait_ready(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001290 }
1291 } else {
William Juulcfa460a2007-10-31 13:53:06 +01001292 memcpy(buf, chip->buffers->databuf + col, bytes);
1293 buf += bytes;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001294 }
1295
William Juulcfa460a2007-10-31 13:53:06 +01001296 readlen -= bytes;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001297
William Juulcfa460a2007-10-31 13:53:06 +01001298 if (!readlen)
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001299 break;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001300
1301 /* For subsequent reads align to page boundary. */
1302 col = 0;
1303 /* Increment page address */
1304 realpage++;
1305
William Juulcfa460a2007-10-31 13:53:06 +01001306 page = realpage & chip->pagemask;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001307 /* Check, if we cross a chip boundary */
1308 if (!page) {
1309 chipnr++;
William Juulcfa460a2007-10-31 13:53:06 +01001310 chip->select_chip(mtd, -1);
1311 chip->select_chip(mtd, chipnr);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001312 }
William Juulcfa460a2007-10-31 13:53:06 +01001313
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001314 /* Check, if the chip supports auto page increment
1315 * or if we have hit a block boundary.
William Juulcfa460a2007-10-31 13:53:06 +01001316 */
1317 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001318 sndcmd = 1;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001319 }
1320
William Juulcfa460a2007-10-31 13:53:06 +01001321 ops->retlen = ops->len - (size_t) readlen;
1322 if (oob)
1323 ops->oobretlen = ops->ooblen - oobreadlen;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001324
William Juulcfa460a2007-10-31 13:53:06 +01001325 if (ret)
1326 return ret;
1327
1328 if (mtd->ecc_stats.failed - stats.failed)
1329 return -EBADMSG;
1330
Christian Hitz90e3f392011-10-12 09:32:01 +02001331 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001332}
1333
1334/**
Christian Hitz90e3f392011-10-12 09:32:01 +02001335 * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc
Wolfgang Denk932394a2005-08-17 12:55:25 +02001336 * @mtd: MTD device structure
1337 * @from: offset to read from
1338 * @len: number of bytes to read
1339 * @retlen: pointer to variable to store the number of read bytes
1340 * @buf: the databuffer to put data
1341 *
William Juulcfa460a2007-10-31 13:53:06 +01001342 * Get hold of the chip and call nand_do_read
Wolfgang Denk932394a2005-08-17 12:55:25 +02001343 */
William Juulcfa460a2007-10-31 13:53:06 +01001344static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1345 size_t *retlen, uint8_t *buf)
Wolfgang Denk932394a2005-08-17 12:55:25 +02001346{
William Juulcfa460a2007-10-31 13:53:06 +01001347 struct nand_chip *chip = mtd->priv;
1348 int ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001349
1350 /* Do not allow reads past end of device */
William Juulcfa460a2007-10-31 13:53:06 +01001351 if ((from + len) > mtd->size)
Wolfgang Denk932394a2005-08-17 12:55:25 +02001352 return -EINVAL;
William Juulcfa460a2007-10-31 13:53:06 +01001353 if (!len)
1354 return 0;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001355
William Juulcfa460a2007-10-31 13:53:06 +01001356 nand_get_device(chip, mtd, FL_READING);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001357
William Juulcfa460a2007-10-31 13:53:06 +01001358 chip->ops.len = len;
1359 chip->ops.datbuf = buf;
1360 chip->ops.oobbuf = NULL;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001361
William Juulcfa460a2007-10-31 13:53:06 +01001362 ret = nand_do_read_ops(mtd, from, &chip->ops);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001363
William Juulcfa460a2007-10-31 13:53:06 +01001364 *retlen = chip->ops.retlen;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001365
Wolfgang Denk932394a2005-08-17 12:55:25 +02001366 nand_release_device(mtd);
1367
1368 return ret;
1369}
1370
William Juulcfa460a2007-10-31 13:53:06 +01001371/**
1372 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1373 * @mtd: mtd info structure
1374 * @chip: nand chip info structure
1375 * @page: page number to read
1376 * @sndcmd: flag whether to issue read command or not
1377 */
1378static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1379 int page, int sndcmd)
1380{
1381 if (sndcmd) {
1382 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1383 sndcmd = 0;
1384 }
1385 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1386 return sndcmd;
1387}
Wolfgang Denk932394a2005-08-17 12:55:25 +02001388
1389/**
William Juulcfa460a2007-10-31 13:53:06 +01001390 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1391 * with syndromes
1392 * @mtd: mtd info structure
1393 * @chip: nand chip info structure
1394 * @page: page number to read
1395 * @sndcmd: flag whether to issue read command or not
1396 */
1397static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1398 int page, int sndcmd)
1399{
1400 uint8_t *buf = chip->oob_poi;
1401 int length = mtd->oobsize;
1402 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1403 int eccsize = chip->ecc.size;
1404 uint8_t *bufpoi = buf;
1405 int i, toread, sndrnd = 0, pos;
1406
1407 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
1408 for (i = 0; i < chip->ecc.steps; i++) {
1409 if (sndrnd) {
1410 pos = eccsize + i * (eccsize + chunk);
1411 if (mtd->writesize > 512)
1412 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
1413 else
1414 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
1415 } else
1416 sndrnd = 1;
1417 toread = min_t(int, length, chunk);
1418 chip->read_buf(mtd, bufpoi, toread);
1419 bufpoi += toread;
1420 length -= toread;
1421 }
1422 if (length > 0)
1423 chip->read_buf(mtd, bufpoi, length);
1424
1425 return 1;
1426}
1427
1428/**
1429 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1430 * @mtd: mtd info structure
1431 * @chip: nand chip info structure
1432 * @page: page number to write
1433 */
1434static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1435 int page)
1436{
1437 int status = 0;
1438 const uint8_t *buf = chip->oob_poi;
1439 int length = mtd->oobsize;
1440
1441 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
1442 chip->write_buf(mtd, buf, length);
1443 /* Send command to program the OOB data */
1444 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1445
1446 status = chip->waitfunc(mtd, chip);
1447
1448 return status & NAND_STATUS_FAIL ? -EIO : 0;
1449}
1450
1451/**
1452 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1453 * with syndrome - only for large page flash !
1454 * @mtd: mtd info structure
1455 * @chip: nand chip info structure
1456 * @page: page number to write
1457 */
1458static int nand_write_oob_syndrome(struct mtd_info *mtd,
1459 struct nand_chip *chip, int page)
1460{
1461 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1462 int eccsize = chip->ecc.size, length = mtd->oobsize;
1463 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
1464 const uint8_t *bufpoi = chip->oob_poi;
1465
1466 /*
1467 * data-ecc-data-ecc ... ecc-oob
1468 * or
1469 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1470 */
1471 if (!chip->ecc.prepad && !chip->ecc.postpad) {
1472 pos = steps * (eccsize + chunk);
1473 steps = 0;
1474 } else
1475 pos = eccsize;
1476
1477 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
1478 for (i = 0; i < steps; i++) {
1479 if (sndcmd) {
1480 if (mtd->writesize <= 512) {
1481 uint32_t fill = 0xFFFFFFFF;
1482
1483 len = eccsize;
1484 while (len > 0) {
1485 int num = min_t(int, len, 4);
1486 chip->write_buf(mtd, (uint8_t *)&fill,
1487 num);
1488 len -= num;
1489 }
1490 } else {
1491 pos = eccsize + i * (eccsize + chunk);
1492 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
1493 }
1494 } else
1495 sndcmd = 1;
1496 len = min_t(int, length, chunk);
1497 chip->write_buf(mtd, bufpoi, len);
1498 bufpoi += len;
1499 length -= len;
1500 }
1501 if (length > 0)
1502 chip->write_buf(mtd, bufpoi, length);
1503
1504 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1505 status = chip->waitfunc(mtd, chip);
1506
1507 return status & NAND_STATUS_FAIL ? -EIO : 0;
1508}
1509
1510/**
1511 * nand_do_read_oob - [Intern] NAND read out-of-band
1512 * @mtd: MTD device structure
1513 * @from: offset to read from
1514 * @ops: oob operations description structure
1515 *
1516 * NAND read out-of-band data from the spare area
1517 */
1518static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1519 struct mtd_oob_ops *ops)
1520{
1521 int page, realpage, chipnr, sndcmd = 1;
1522 struct nand_chip *chip = mtd->priv;
1523 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1524 int readlen = ops->ooblen;
1525 int len;
1526 uint8_t *buf = ops->oobbuf;
1527
Christian Hitz90e3f392011-10-12 09:32:01 +02001528 MTDDEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08Lx, len = %i\n",
1529 __func__, (unsigned long long)from, readlen);
William Juulcfa460a2007-10-31 13:53:06 +01001530
1531 if (ops->mode == MTD_OOB_AUTO)
1532 len = chip->ecc.layout->oobavail;
1533 else
1534 len = mtd->oobsize;
1535
1536 if (unlikely(ops->ooboffs >= len)) {
Christian Hitz90e3f392011-10-12 09:32:01 +02001537 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to start read "
1538 "outside oob\n", __func__);
William Juulcfa460a2007-10-31 13:53:06 +01001539 return -EINVAL;
1540 }
1541
1542 /* Do not allow reads past end of device */
1543 if (unlikely(from >= mtd->size ||
1544 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
1545 (from >> chip->page_shift)) * len)) {
Christian Hitz90e3f392011-10-12 09:32:01 +02001546 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt read beyond end "
1547 "of device\n", __func__);
William Juulcfa460a2007-10-31 13:53:06 +01001548 return -EINVAL;
1549 }
1550
1551 chipnr = (int)(from >> chip->chip_shift);
1552 chip->select_chip(mtd, chipnr);
1553
1554 /* Shift to get page */
1555 realpage = (int)(from >> chip->page_shift);
1556 page = realpage & chip->pagemask;
1557
Christian Hitz90e3f392011-10-12 09:32:01 +02001558 while (1) {
Scott Wood6f2ffc32011-02-02 18:15:57 -06001559 WATCHDOG_RESET();
William Juulcfa460a2007-10-31 13:53:06 +01001560 sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd);
1561
1562 len = min(len, readlen);
1563 buf = nand_transfer_oob(chip, buf, ops, len);
1564
1565 if (!(chip->options & NAND_NO_READRDY)) {
1566 /*
1567 * Apply delay or wait for ready/busy pin. Do this
1568 * before the AUTOINCR check, so no problems arise if a
1569 * chip which does auto increment is marked as
1570 * NOAUTOINCR by the board driver.
1571 */
1572 if (!chip->dev_ready)
1573 udelay(chip->chip_delay);
1574 else
1575 nand_wait_ready(mtd);
1576 }
1577
1578 readlen -= len;
1579 if (!readlen)
1580 break;
1581
1582 /* Increment page address */
1583 realpage++;
1584
1585 page = realpage & chip->pagemask;
1586 /* Check, if we cross a chip boundary */
1587 if (!page) {
1588 chipnr++;
1589 chip->select_chip(mtd, -1);
1590 chip->select_chip(mtd, chipnr);
1591 }
1592
1593 /* Check, if the chip supports auto page increment
1594 * or if we have hit a block boundary.
1595 */
1596 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
1597 sndcmd = 1;
1598 }
1599
1600 ops->oobretlen = ops->ooblen;
1601 return 0;
1602}
1603
1604/**
1605 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1606 * @mtd: MTD device structure
1607 * @from: offset to read from
1608 * @ops: oob operation description structure
1609 *
1610 * NAND read data and/or out-of-band data
1611 */
1612static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1613 struct mtd_oob_ops *ops)
1614{
1615 struct nand_chip *chip = mtd->priv;
1616 int ret = -ENOTSUPP;
1617
1618 ops->retlen = 0;
1619
1620 /* Do not allow reads past end of device */
1621 if (ops->datbuf && (from + ops->len) > mtd->size) {
Christian Hitz90e3f392011-10-12 09:32:01 +02001622 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt read "
1623 "beyond end of device\n", __func__);
William Juulcfa460a2007-10-31 13:53:06 +01001624 return -EINVAL;
1625 }
1626
1627 nand_get_device(chip, mtd, FL_READING);
1628
Christian Hitz90e3f392011-10-12 09:32:01 +02001629 switch (ops->mode) {
William Juulcfa460a2007-10-31 13:53:06 +01001630 case MTD_OOB_PLACE:
1631 case MTD_OOB_AUTO:
1632 case MTD_OOB_RAW:
1633 break;
1634
1635 default:
1636 goto out;
1637 }
1638
1639 if (!ops->datbuf)
1640 ret = nand_do_read_oob(mtd, from, ops);
1641 else
1642 ret = nand_do_read_ops(mtd, from, ops);
1643
Christian Hitz90e3f392011-10-12 09:32:01 +02001644out:
William Juulcfa460a2007-10-31 13:53:06 +01001645 nand_release_device(mtd);
1646 return ret;
1647}
1648
1649
1650/**
1651 * nand_write_page_raw - [Intern] raw page write function
1652 * @mtd: mtd info structure
1653 * @chip: nand chip info structure
1654 * @buf: data buffer
David Brownell7e866612009-11-07 16:27:01 -05001655 *
1656 * Not for syndrome calculating ecc controllers, which use a special oob layout
William Juulcfa460a2007-10-31 13:53:06 +01001657 */
1658static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1659 const uint8_t *buf)
1660{
1661 chip->write_buf(mtd, buf, mtd->writesize);
1662 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1663}
1664
1665/**
David Brownell7e866612009-11-07 16:27:01 -05001666 * nand_write_page_raw_syndrome - [Intern] raw page write function
1667 * @mtd: mtd info structure
1668 * @chip: nand chip info structure
1669 * @buf: data buffer
1670 *
1671 * We need a special oob layout and handling even when ECC isn't checked.
1672 */
Christian Hitz90e3f392011-10-12 09:32:01 +02001673static void nand_write_page_raw_syndrome(struct mtd_info *mtd,
1674 struct nand_chip *chip,
1675 const uint8_t *buf)
David Brownell7e866612009-11-07 16:27:01 -05001676{
1677 int eccsize = chip->ecc.size;
1678 int eccbytes = chip->ecc.bytes;
1679 uint8_t *oob = chip->oob_poi;
1680 int steps, size;
1681
1682 for (steps = chip->ecc.steps; steps > 0; steps--) {
1683 chip->write_buf(mtd, buf, eccsize);
1684 buf += eccsize;
1685
1686 if (chip->ecc.prepad) {
1687 chip->write_buf(mtd, oob, chip->ecc.prepad);
1688 oob += chip->ecc.prepad;
1689 }
1690
1691 chip->read_buf(mtd, oob, eccbytes);
1692 oob += eccbytes;
1693
1694 if (chip->ecc.postpad) {
1695 chip->write_buf(mtd, oob, chip->ecc.postpad);
1696 oob += chip->ecc.postpad;
1697 }
1698 }
1699
1700 size = mtd->oobsize - (oob - chip->oob_poi);
1701 if (size)
1702 chip->write_buf(mtd, oob, size);
1703}
1704/**
William Juulcfa460a2007-10-31 13:53:06 +01001705 * nand_write_page_swecc - [REPLACABLE] software ecc based page write function
1706 * @mtd: mtd info structure
1707 * @chip: nand chip info structure
1708 * @buf: data buffer
1709 */
1710static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1711 const uint8_t *buf)
1712{
1713 int i, eccsize = chip->ecc.size;
1714 int eccbytes = chip->ecc.bytes;
1715 int eccsteps = chip->ecc.steps;
1716 uint8_t *ecc_calc = chip->buffers->ecccalc;
1717 const uint8_t *p = buf;
1718 uint32_t *eccpos = chip->ecc.layout->eccpos;
1719
1720 /* Software ecc calculation */
1721 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1722 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1723
1724 for (i = 0; i < chip->ecc.total; i++)
1725 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1726
1727 chip->ecc.write_page_raw(mtd, chip, buf);
1728}
1729
1730/**
1731 * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function
1732 * @mtd: mtd info structure
1733 * @chip: nand chip info structure
1734 * @buf: data buffer
1735 */
1736static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1737 const uint8_t *buf)
1738{
1739 int i, eccsize = chip->ecc.size;
1740 int eccbytes = chip->ecc.bytes;
1741 int eccsteps = chip->ecc.steps;
1742 uint8_t *ecc_calc = chip->buffers->ecccalc;
1743 const uint8_t *p = buf;
1744 uint32_t *eccpos = chip->ecc.layout->eccpos;
1745
1746 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1747 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
1748 chip->write_buf(mtd, p, eccsize);
1749 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1750 }
1751
1752 for (i = 0; i < chip->ecc.total; i++)
1753 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1754
1755 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1756}
1757
1758/**
1759 * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write
1760 * @mtd: mtd info structure
1761 * @chip: nand chip info structure
1762 * @buf: data buffer
1763 *
1764 * The hw generator calculates the error syndrome automatically. Therefor
1765 * we need a special oob layout and handling.
1766 */
1767static void nand_write_page_syndrome(struct mtd_info *mtd,
1768 struct nand_chip *chip, const uint8_t *buf)
1769{
1770 int i, eccsize = chip->ecc.size;
1771 int eccbytes = chip->ecc.bytes;
1772 int eccsteps = chip->ecc.steps;
1773 const uint8_t *p = buf;
1774 uint8_t *oob = chip->oob_poi;
1775
1776 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1777
1778 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
1779 chip->write_buf(mtd, p, eccsize);
1780
1781 if (chip->ecc.prepad) {
1782 chip->write_buf(mtd, oob, chip->ecc.prepad);
1783 oob += chip->ecc.prepad;
1784 }
1785
1786 chip->ecc.calculate(mtd, p, oob);
1787 chip->write_buf(mtd, oob, eccbytes);
1788 oob += eccbytes;
1789
1790 if (chip->ecc.postpad) {
1791 chip->write_buf(mtd, oob, chip->ecc.postpad);
1792 oob += chip->ecc.postpad;
1793 }
1794 }
1795
1796 /* Calculate remaining oob bytes */
1797 i = mtd->oobsize - (oob - chip->oob_poi);
1798 if (i)
1799 chip->write_buf(mtd, oob, i);
1800}
1801
1802/**
1803 * nand_write_page - [REPLACEABLE] write one page
1804 * @mtd: MTD device structure
1805 * @chip: NAND chip descriptor
1806 * @buf: the data to write
1807 * @page: page number to write
1808 * @cached: cached programming
1809 * @raw: use _raw version of write_page
1810 */
1811static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
1812 const uint8_t *buf, int page, int cached, int raw)
1813{
1814 int status;
1815
1816 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
1817
1818 if (unlikely(raw))
1819 chip->ecc.write_page_raw(mtd, chip, buf);
1820 else
1821 chip->ecc.write_page(mtd, chip, buf);
1822
1823 /*
1824 * Cached progamming disabled for now, Not sure if its worth the
1825 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1826 */
1827 cached = 0;
1828
1829 if (!cached || !(chip->options & NAND_CACHEPRG)) {
1830
1831 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1832 status = chip->waitfunc(mtd, chip);
1833 /*
1834 * See if operation failed and additional status checks are
1835 * available
1836 */
1837 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
1838 status = chip->errstat(mtd, chip, FL_WRITING, status,
1839 page);
1840
1841 if (status & NAND_STATUS_FAIL)
1842 return -EIO;
1843 } else {
1844 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
1845 status = chip->waitfunc(mtd, chip);
1846 }
1847
1848#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1849 /* Send command to read back the data */
1850 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1851
1852 if (chip->verify_buf(mtd, buf, mtd->writesize))
1853 return -EIO;
1854#endif
1855 return 0;
1856}
1857
1858/**
1859 * nand_fill_oob - [Internal] Transfer client buffer to oob
1860 * @chip: nand chip structure
1861 * @oob: oob data buffer
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02001862 * @len: oob data write length
William Juulcfa460a2007-10-31 13:53:06 +01001863 * @ops: oob ops structure
1864 */
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02001865static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, size_t len,
1866 struct mtd_oob_ops *ops)
William Juulcfa460a2007-10-31 13:53:06 +01001867{
Christian Hitz90e3f392011-10-12 09:32:01 +02001868 switch (ops->mode) {
William Juulcfa460a2007-10-31 13:53:06 +01001869
1870 case MTD_OOB_PLACE:
1871 case MTD_OOB_RAW:
1872 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
1873 return oob + len;
1874
1875 case MTD_OOB_AUTO: {
1876 struct nand_oobfree *free = chip->ecc.layout->oobfree;
1877 uint32_t boffs = 0, woffs = ops->ooboffs;
1878 size_t bytes = 0;
1879
Christian Hitz90e3f392011-10-12 09:32:01 +02001880 for (; free->length && len; free++, len -= bytes) {
William Juulcfa460a2007-10-31 13:53:06 +01001881 /* Write request not from offset 0 ? */
1882 if (unlikely(woffs)) {
1883 if (woffs >= free->length) {
1884 woffs -= free->length;
1885 continue;
1886 }
1887 boffs = free->offset + woffs;
1888 bytes = min_t(size_t, len,
1889 (free->length - woffs));
1890 woffs = 0;
1891 } else {
1892 bytes = min_t(size_t, len, free->length);
1893 boffs = free->offset;
1894 }
1895 memcpy(chip->oob_poi + boffs, oob, bytes);
1896 oob += bytes;
1897 }
1898 return oob;
1899 }
1900 default:
1901 BUG();
1902 }
1903 return NULL;
1904}
1905
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02001906#define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
William Juulcfa460a2007-10-31 13:53:06 +01001907
1908/**
1909 * nand_do_write_ops - [Internal] NAND write with ECC
1910 * @mtd: MTD device structure
1911 * @to: offset to write to
1912 * @ops: oob operations description structure
1913 *
1914 * NAND write with ECC
1915 */
1916static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
1917 struct mtd_oob_ops *ops)
1918{
1919 int chipnr, realpage, page, blockmask, column;
1920 struct nand_chip *chip = mtd->priv;
1921 uint32_t writelen = ops->len;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02001922
1923 uint32_t oobwritelen = ops->ooblen;
1924 uint32_t oobmaxlen = ops->mode == MTD_OOB_AUTO ?
1925 mtd->oobavail : mtd->oobsize;
1926
William Juulcfa460a2007-10-31 13:53:06 +01001927 uint8_t *oob = ops->oobbuf;
1928 uint8_t *buf = ops->datbuf;
1929 int ret, subpage;
1930
1931 ops->retlen = 0;
1932 if (!writelen)
1933 return 0;
1934
William Juulcfa460a2007-10-31 13:53:06 +01001935 column = to & (mtd->writesize - 1);
1936 subpage = column || (writelen & (mtd->writesize - 1));
1937
1938 if (subpage && oob)
1939 return -EINVAL;
1940
1941 chipnr = (int)(to >> chip->chip_shift);
1942 chip->select_chip(mtd, chipnr);
1943
1944 /* Check, if it is write protected */
1945 if (nand_check_wp(mtd)) {
1946 printk (KERN_NOTICE "nand_do_write_ops: Device is write protected\n");
1947 return -EIO;
1948 }
1949
1950 realpage = (int)(to >> chip->page_shift);
1951 page = realpage & chip->pagemask;
1952 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1953
1954 /* Invalidate the page cache, when we write to the cached page */
1955 if (to <= (chip->pagebuf << chip->page_shift) &&
1956 (chip->pagebuf << chip->page_shift) < (to + ops->len))
1957 chip->pagebuf = -1;
1958
1959 /* If we're not given explicit OOB data, let it be 0xFF */
1960 if (likely(!oob))
1961 memset(chip->oob_poi, 0xff, mtd->oobsize);
1962
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02001963 /* Don't allow multipage oob writes with offset */
1964 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen))
1965 return -EINVAL;
1966
Christian Hitz90e3f392011-10-12 09:32:01 +02001967 while (1) {
Scott Wood6f2ffc32011-02-02 18:15:57 -06001968 WATCHDOG_RESET();
1969
William Juulcfa460a2007-10-31 13:53:06 +01001970 int bytes = mtd->writesize;
1971 int cached = writelen > bytes && page != blockmask;
1972 uint8_t *wbuf = buf;
1973
1974 /* Partial page write ? */
1975 if (unlikely(column || writelen < (mtd->writesize - 1))) {
1976 cached = 0;
1977 bytes = min_t(int, bytes - column, (int) writelen);
1978 chip->pagebuf = -1;
1979 memset(chip->buffers->databuf, 0xff, mtd->writesize);
1980 memcpy(&chip->buffers->databuf[column], buf, bytes);
1981 wbuf = chip->buffers->databuf;
1982 }
1983
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02001984 if (unlikely(oob)) {
1985 size_t len = min(oobwritelen, oobmaxlen);
1986 oob = nand_fill_oob(chip, oob, len, ops);
1987 oobwritelen -= len;
1988 }
William Juulcfa460a2007-10-31 13:53:06 +01001989
1990 ret = chip->write_page(mtd, chip, wbuf, page, cached,
1991 (ops->mode == MTD_OOB_RAW));
1992 if (ret)
1993 break;
1994
1995 writelen -= bytes;
1996 if (!writelen)
1997 break;
1998
1999 column = 0;
2000 buf += bytes;
2001 realpage++;
2002
2003 page = realpage & chip->pagemask;
2004 /* Check, if we cross a chip boundary */
2005 if (!page) {
2006 chipnr++;
2007 chip->select_chip(mtd, -1);
2008 chip->select_chip(mtd, chipnr);
2009 }
2010 }
2011
2012 ops->retlen = ops->len - writelen;
2013 if (unlikely(oob))
2014 ops->oobretlen = ops->ooblen;
2015 return ret;
2016}
2017
2018/**
2019 * nand_write - [MTD Interface] NAND write with ECC
Wolfgang Denk932394a2005-08-17 12:55:25 +02002020 * @mtd: MTD device structure
2021 * @to: offset to write to
2022 * @len: number of bytes to write
2023 * @retlen: pointer to variable to store the number of written bytes
2024 * @buf: the data to write
2025 *
William Juulcfa460a2007-10-31 13:53:06 +01002026 * NAND write with ECC
2027 */
2028static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
2029 size_t *retlen, const uint8_t *buf)
2030{
2031 struct nand_chip *chip = mtd->priv;
2032 int ret;
2033
Ben Gardinerbee038e2011-05-24 10:18:34 -04002034 /* Do not allow writes past end of device */
William Juulcfa460a2007-10-31 13:53:06 +01002035 if ((to + len) > mtd->size)
2036 return -EINVAL;
2037 if (!len)
2038 return 0;
2039
2040 nand_get_device(chip, mtd, FL_WRITING);
2041
2042 chip->ops.len = len;
2043 chip->ops.datbuf = (uint8_t *)buf;
2044 chip->ops.oobbuf = NULL;
2045
2046 ret = nand_do_write_ops(mtd, to, &chip->ops);
2047
2048 *retlen = chip->ops.retlen;
2049
2050 nand_release_device(mtd);
2051
2052 return ret;
2053}
2054
2055/**
2056 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
2057 * @mtd: MTD device structure
2058 * @to: offset to write to
2059 * @ops: oob operation description structure
2060 *
Wolfgang Denk932394a2005-08-17 12:55:25 +02002061 * NAND write out-of-band
2062 */
William Juulcfa460a2007-10-31 13:53:06 +01002063static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
2064 struct mtd_oob_ops *ops)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002065{
William Juulcfa460a2007-10-31 13:53:06 +01002066 int chipnr, page, status, len;
2067 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002068
Christian Hitz90e3f392011-10-12 09:32:01 +02002069 MTDDEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
2070 __func__, (unsigned int)to, (int)ops->ooblen);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002071
William Juulcfa460a2007-10-31 13:53:06 +01002072 if (ops->mode == MTD_OOB_AUTO)
2073 len = chip->ecc.layout->oobavail;
2074 else
2075 len = mtd->oobsize;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002076
2077 /* Do not allow write past end of page */
William Juulcfa460a2007-10-31 13:53:06 +01002078 if ((ops->ooboffs + ops->ooblen) > len) {
Christian Hitz90e3f392011-10-12 09:32:01 +02002079 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to write "
2080 "past end of page\n", __func__);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002081 return -EINVAL;
2082 }
2083
William Juulcfa460a2007-10-31 13:53:06 +01002084 if (unlikely(ops->ooboffs >= len)) {
Christian Hitz90e3f392011-10-12 09:32:01 +02002085 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt to start "
2086 "write outside oob\n", __func__);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002087 return -EINVAL;
2088 }
2089
Christian Hitz90e3f392011-10-12 09:32:01 +02002090 /* Do not allow write past end of device */
William Juulcfa460a2007-10-31 13:53:06 +01002091 if (unlikely(to >= mtd->size ||
2092 ops->ooboffs + ops->ooblen >
2093 ((mtd->size >> chip->page_shift) -
2094 (to >> chip->page_shift)) * len)) {
Christian Hitz90e3f392011-10-12 09:32:01 +02002095 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt write beyond "
2096 "end of device\n", __func__);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002097 return -EINVAL;
2098 }
2099
William Juulcfa460a2007-10-31 13:53:06 +01002100 chipnr = (int)(to >> chip->chip_shift);
2101 chip->select_chip(mtd, chipnr);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002102
William Juulcfa460a2007-10-31 13:53:06 +01002103 /* Shift to get page */
2104 page = (int)(to >> chip->page_shift);
2105
2106 /*
2107 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
2108 * of my DiskOnChip 2000 test units) will clear the whole data page too
2109 * if we don't do this. I have no clue why, but I seem to have 'fixed'
2110 * it in the doc2000 driver in August 1999. dwmw2.
2111 */
2112 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002113
2114 /* Check, if it is write protected */
2115 if (nand_check_wp(mtd))
William Juulcfa460a2007-10-31 13:53:06 +01002116 return -EROFS;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002117
Wolfgang Denk932394a2005-08-17 12:55:25 +02002118 /* Invalidate the page cache, if we write to the cached page */
William Juulcfa460a2007-10-31 13:53:06 +01002119 if (page == chip->pagebuf)
2120 chip->pagebuf = -1;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002121
William Juulcfa460a2007-10-31 13:53:06 +01002122 memset(chip->oob_poi, 0xff, mtd->oobsize);
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002123 nand_fill_oob(chip, ops->oobbuf, ops->ooblen, ops);
William Juulcfa460a2007-10-31 13:53:06 +01002124 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
2125 memset(chip->oob_poi, 0xff, mtd->oobsize);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002126
William Juulcfa460a2007-10-31 13:53:06 +01002127 if (status)
2128 return status;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002129
William Juulcfa460a2007-10-31 13:53:06 +01002130 ops->oobretlen = ops->ooblen;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002131
William Juulcfa460a2007-10-31 13:53:06 +01002132 return 0;
2133}
Wolfgang Denk932394a2005-08-17 12:55:25 +02002134
William Juulcfa460a2007-10-31 13:53:06 +01002135/**
2136 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2137 * @mtd: MTD device structure
2138 * @to: offset to write to
2139 * @ops: oob operation description structure
2140 */
2141static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2142 struct mtd_oob_ops *ops)
2143{
2144 struct nand_chip *chip = mtd->priv;
2145 int ret = -ENOTSUPP;
2146
2147 ops->retlen = 0;
2148
2149 /* Do not allow writes past end of device */
2150 if (ops->datbuf && (to + ops->len) > mtd->size) {
Christian Hitz90e3f392011-10-12 09:32:01 +02002151 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Attempt write beyond "
2152 "end of device\n", __func__);
William Juulcfa460a2007-10-31 13:53:06 +01002153 return -EINVAL;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002154 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02002155
William Juulcfa460a2007-10-31 13:53:06 +01002156 nand_get_device(chip, mtd, FL_WRITING);
2157
Christian Hitz90e3f392011-10-12 09:32:01 +02002158 switch (ops->mode) {
William Juulcfa460a2007-10-31 13:53:06 +01002159 case MTD_OOB_PLACE:
2160 case MTD_OOB_AUTO:
2161 case MTD_OOB_RAW:
2162 break;
2163
2164 default:
2165 goto out;
2166 }
2167
2168 if (!ops->datbuf)
2169 ret = nand_do_write_oob(mtd, to, ops);
2170 else
2171 ret = nand_do_write_ops(mtd, to, ops);
2172
Christian Hitz90e3f392011-10-12 09:32:01 +02002173out:
William Juulcfa460a2007-10-31 13:53:06 +01002174 nand_release_device(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002175 return ret;
2176}
Wolfgang Denk932394a2005-08-17 12:55:25 +02002177
2178/**
2179 * single_erease_cmd - [GENERIC] NAND standard block erase command function
2180 * @mtd: MTD device structure
2181 * @page: the page address of the block which will be erased
2182 *
2183 * Standard erase command for NAND chips
2184 */
William Juulcfa460a2007-10-31 13:53:06 +01002185static void single_erase_cmd(struct mtd_info *mtd, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002186{
William Juulcfa460a2007-10-31 13:53:06 +01002187 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002188 /* Send commands to erase a block */
William Juulcfa460a2007-10-31 13:53:06 +01002189 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2190 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002191}
2192
2193/**
2194 * multi_erease_cmd - [GENERIC] AND specific block erase command function
2195 * @mtd: MTD device structure
2196 * @page: the page address of the block which will be erased
2197 *
2198 * AND multi block erase command function
2199 * Erase 4 consecutive blocks
2200 */
William Juulcfa460a2007-10-31 13:53:06 +01002201static void multi_erase_cmd(struct mtd_info *mtd, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002202{
William Juulcfa460a2007-10-31 13:53:06 +01002203 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002204 /* Send commands to erase a block */
William Juulcfa460a2007-10-31 13:53:06 +01002205 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2206 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2207 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2208 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2209 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002210}
2211
2212/**
2213 * nand_erase - [MTD Interface] erase block(s)
2214 * @mtd: MTD device structure
2215 * @instr: erase instruction
2216 *
2217 * Erase one ore more blocks
2218 */
William Juulcfa460a2007-10-31 13:53:06 +01002219static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002220{
William Juulcfa460a2007-10-31 13:53:06 +01002221 return nand_erase_nand(mtd, instr, 0);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002222}
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002223
William Juulcfa460a2007-10-31 13:53:06 +01002224#define BBT_PAGE_MASK 0xffffff3f
Wolfgang Denk932394a2005-08-17 12:55:25 +02002225/**
William Juulcfa460a2007-10-31 13:53:06 +01002226 * nand_erase_nand - [Internal] erase block(s)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002227 * @mtd: MTD device structure
2228 * @instr: erase instruction
2229 * @allowbbt: allow erasing the bbt area
2230 *
2231 * Erase one ore more blocks
2232 */
William Juulcfa460a2007-10-31 13:53:06 +01002233int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2234 int allowbbt)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002235{
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002236 int page, status, pages_per_block, ret, chipnr;
William Juulcfa460a2007-10-31 13:53:06 +01002237 struct nand_chip *chip = mtd->priv;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002238 loff_t rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS] = {0};
William Juulcfa460a2007-10-31 13:53:06 +01002239 unsigned int bbt_masked_page = 0xffffffff;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002240 loff_t len;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002241
Christian Hitz90e3f392011-10-12 09:32:01 +02002242 MTDDEBUG(MTD_DEBUG_LEVEL3, "%s: start = 0x%012llx, len = %llu\n",
2243 __func__, (unsigned long long)instr->addr,
2244 (unsigned long long)instr->len);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002245
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002246 if (check_offs_len(mtd, instr->addr, instr->len))
Wolfgang Denk932394a2005-08-17 12:55:25 +02002247 return -EINVAL;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002248
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002249 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002250
2251 /* Grab the lock and see if the device is available */
William Juulcfa460a2007-10-31 13:53:06 +01002252 nand_get_device(chip, mtd, FL_ERASING);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002253
2254 /* Shift to get first page */
William Juulcfa460a2007-10-31 13:53:06 +01002255 page = (int)(instr->addr >> chip->page_shift);
2256 chipnr = (int)(instr->addr >> chip->chip_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002257
2258 /* Calculate pages in each block */
William Juulcfa460a2007-10-31 13:53:06 +01002259 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
William Juul4cbb6512007-11-08 10:39:53 +01002260
Wolfgang Denk932394a2005-08-17 12:55:25 +02002261 /* Select the NAND device */
William Juulcfa460a2007-10-31 13:53:06 +01002262 chip->select_chip(mtd, chipnr);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002263
Wolfgang Denk932394a2005-08-17 12:55:25 +02002264 /* Check, if it is write protected */
2265 if (nand_check_wp(mtd)) {
Christian Hitz90e3f392011-10-12 09:32:01 +02002266 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Device is write protected!!!\n",
2267 __func__);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002268 instr->state = MTD_ERASE_FAILED;
2269 goto erase_exit;
2270 }
2271
William Juulcfa460a2007-10-31 13:53:06 +01002272 /*
2273 * If BBT requires refresh, set the BBT page mask to see if the BBT
2274 * should be rewritten. Otherwise the mask is set to 0xffffffff which
2275 * can not be matched. This is also done when the bbt is actually
2276 * erased to avoid recusrsive updates
2277 */
2278 if (chip->options & BBT_AUTO_REFRESH && !allowbbt)
2279 bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2280
Wolfgang Denk932394a2005-08-17 12:55:25 +02002281 /* Loop through the pages */
2282 len = instr->len;
2283
2284 instr->state = MTD_ERASING;
2285
2286 while (len) {
Scott Wood6f2ffc32011-02-02 18:15:57 -06002287 WATCHDOG_RESET();
William Juulcfa460a2007-10-31 13:53:06 +01002288 /*
2289 * heck if we have a bad block, we do not erase bad blocks !
2290 */
Marek Vasut6d414192011-09-12 06:04:06 +02002291 if (!instr->scrub && nand_block_checkbad(mtd, ((loff_t) page) <<
William Juulcfa460a2007-10-31 13:53:06 +01002292 chip->page_shift, 0, allowbbt)) {
Christian Hitz90e3f392011-10-12 09:32:01 +02002293 printk(KERN_WARNING "%s: attempt to erase a bad block "
2294 "at page 0x%08x\n", __func__, page);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002295 instr->state = MTD_ERASE_FAILED;
2296 goto erase_exit;
2297 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02002298
William Juulcfa460a2007-10-31 13:53:06 +01002299 /*
2300 * Invalidate the page cache, if we erase the block which
2301 * contains the current cached page
2302 */
2303 if (page <= chip->pagebuf && chip->pagebuf <
2304 (page + pages_per_block))
2305 chip->pagebuf = -1;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002306
William Juulcfa460a2007-10-31 13:53:06 +01002307 chip->erase_cmd(mtd, page & chip->pagemask);
2308
2309 status = chip->waitfunc(mtd, chip);
2310
2311 /*
2312 * See if operation failed and additional status checks are
2313 * available
2314 */
2315 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2316 status = chip->errstat(mtd, chip, FL_ERASING,
2317 status, page);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002318
2319 /* See if block erase succeeded */
William Juulcfa460a2007-10-31 13:53:06 +01002320 if (status & NAND_STATUS_FAIL) {
Christian Hitz90e3f392011-10-12 09:32:01 +02002321 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: Failed erase, "
2322 "page 0x%08x\n", __func__, page);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002323 instr->state = MTD_ERASE_FAILED;
Christian Hitz90e3f392011-10-12 09:32:01 +02002324 instr->fail_addr =
2325 ((loff_t)page << chip->page_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002326 goto erase_exit;
2327 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002328
William Juulcfa460a2007-10-31 13:53:06 +01002329 /*
2330 * If BBT requires refresh, set the BBT rewrite flag to the
2331 * page being erased
2332 */
2333 if (bbt_masked_page != 0xffffffff &&
2334 (page & BBT_PAGE_MASK) == bbt_masked_page)
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002335 rewrite_bbt[chipnr] =
2336 ((loff_t)page << chip->page_shift);
William Juulcfa460a2007-10-31 13:53:06 +01002337
Wolfgang Denk932394a2005-08-17 12:55:25 +02002338 /* Increment page address and decrement length */
William Juulcfa460a2007-10-31 13:53:06 +01002339 len -= (1 << chip->phys_erase_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002340 page += pages_per_block;
2341
2342 /* Check, if we cross a chip boundary */
William Juulcfa460a2007-10-31 13:53:06 +01002343 if (len && !(page & chip->pagemask)) {
Wolfgang Denk932394a2005-08-17 12:55:25 +02002344 chipnr++;
William Juulcfa460a2007-10-31 13:53:06 +01002345 chip->select_chip(mtd, -1);
2346 chip->select_chip(mtd, chipnr);
2347
2348 /*
2349 * If BBT requires refresh and BBT-PERCHIP, set the BBT
2350 * page mask to see if this BBT should be rewritten
2351 */
2352 if (bbt_masked_page != 0xffffffff &&
2353 (chip->bbt_td->options & NAND_BBT_PERCHIP))
2354 bbt_masked_page = chip->bbt_td->pages[chipnr] &
2355 BBT_PAGE_MASK;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002356 }
2357 }
2358 instr->state = MTD_ERASE_DONE;
2359
Christian Hitz90e3f392011-10-12 09:32:01 +02002360erase_exit:
Wolfgang Denk932394a2005-08-17 12:55:25 +02002361
2362 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002363
2364 /* Deselect and wake up anyone waiting on the device */
2365 nand_release_device(mtd);
2366
Scott Woodc45912d2008-10-24 16:20:43 -05002367 /* Do call back function */
2368 if (!ret)
2369 mtd_erase_callback(instr);
2370
William Juulcfa460a2007-10-31 13:53:06 +01002371 /*
2372 * If BBT requires refresh and erase was successful, rewrite any
2373 * selected bad block tables
2374 */
2375 if (bbt_masked_page == 0xffffffff || ret)
2376 return ret;
2377
2378 for (chipnr = 0; chipnr < chip->numchips; chipnr++) {
2379 if (!rewrite_bbt[chipnr])
2380 continue;
2381 /* update the BBT for chip */
Christian Hitz90e3f392011-10-12 09:32:01 +02002382 MTDDEBUG(MTD_DEBUG_LEVEL0, "%s: nand_update_bbt "
2383 "(%d:0x%0llx 0x%0x)\n", __func__, chipnr,
2384 rewrite_bbt[chipnr], chip->bbt_td->pages[chipnr]);
William Juulcfa460a2007-10-31 13:53:06 +01002385 nand_update_bbt(mtd, rewrite_bbt[chipnr]);
2386 }
2387
Wolfgang Denk932394a2005-08-17 12:55:25 +02002388 /* Return more or less happy */
2389 return ret;
2390}
2391
2392/**
2393 * nand_sync - [MTD Interface] sync
2394 * @mtd: MTD device structure
2395 *
2396 * Sync is actually a wait for chip ready function
2397 */
William Juulcfa460a2007-10-31 13:53:06 +01002398static void nand_sync(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002399{
William Juulcfa460a2007-10-31 13:53:06 +01002400 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002401
Christian Hitz90e3f392011-10-12 09:32:01 +02002402 MTDDEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002403
2404 /* Grab the lock and see if the device is available */
William Juulcfa460a2007-10-31 13:53:06 +01002405 nand_get_device(chip, mtd, FL_SYNCING);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002406 /* Release it and go back */
William Juulcfa460a2007-10-31 13:53:06 +01002407 nand_release_device(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002408}
2409
Wolfgang Denk932394a2005-08-17 12:55:25 +02002410/**
William Juulcfa460a2007-10-31 13:53:06 +01002411 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Wolfgang Denk932394a2005-08-17 12:55:25 +02002412 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +01002413 * @offs: offset relative to mtd start
Wolfgang Denk932394a2005-08-17 12:55:25 +02002414 */
William Juulcfa460a2007-10-31 13:53:06 +01002415static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002416{
2417 /* Check for invalid offset */
William Juulcfa460a2007-10-31 13:53:06 +01002418 if (offs > mtd->size)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002419 return -EINVAL;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002420
William Juulcfa460a2007-10-31 13:53:06 +01002421 return nand_block_checkbad(mtd, offs, 1, 0);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002422}
2423
2424/**
William Juulcfa460a2007-10-31 13:53:06 +01002425 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Wolfgang Denk932394a2005-08-17 12:55:25 +02002426 * @mtd: MTD device structure
2427 * @ofs: offset relative to mtd start
2428 */
William Juulcfa460a2007-10-31 13:53:06 +01002429static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002430{
William Juulcfa460a2007-10-31 13:53:06 +01002431 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002432 int ret;
2433
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002434 ret = nand_block_isbad(mtd, ofs);
2435 if (ret) {
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002436 /* If it was bad already, return success and do nothing. */
Wolfgang Denk932394a2005-08-17 12:55:25 +02002437 if (ret > 0)
2438 return 0;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002439 return ret;
2440 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02002441
William Juulcfa460a2007-10-31 13:53:06 +01002442 return chip->block_markbad(mtd, ofs);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002443}
2444
William Juulcfa460a2007-10-31 13:53:06 +01002445/*
2446 * Set default functions
2447 */
2448static void nand_set_defaults(struct nand_chip *chip, int busw)
2449{
2450 /* check for proper chip_delay setup, set 20us if not */
2451 if (!chip->chip_delay)
2452 chip->chip_delay = 20;
2453
2454 /* check, if a user supplied command function given */
2455 if (chip->cmdfunc == NULL)
2456 chip->cmdfunc = nand_command;
2457
2458 /* check, if a user supplied wait function given */
2459 if (chip->waitfunc == NULL)
2460 chip->waitfunc = nand_wait;
2461
2462 if (!chip->select_chip)
2463 chip->select_chip = nand_select_chip;
2464 if (!chip->read_byte)
2465 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2466 if (!chip->read_word)
2467 chip->read_word = nand_read_word;
2468 if (!chip->block_bad)
2469 chip->block_bad = nand_block_bad;
2470 if (!chip->block_markbad)
2471 chip->block_markbad = nand_default_block_markbad;
2472 if (!chip->write_buf)
2473 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2474 if (!chip->read_buf)
2475 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2476 if (!chip->verify_buf)
2477 chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2478 if (!chip->scan_bbt)
2479 chip->scan_bbt = nand_default_bbt;
Scott Wood5b8e6bb2010-08-25 17:42:49 -05002480 if (!chip->controller)
William Juulcfa460a2007-10-31 13:53:06 +01002481 chip->controller = &chip->hwcontrol;
William Juulcfa460a2007-10-31 13:53:06 +01002482}
2483
Florian Fainelli0272c712011-02-25 00:01:34 +00002484#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
Christian Hitz5454ddb2011-10-12 09:32:05 +02002485/*
2486 * sanitize ONFI strings so we can safely print them
2487 */
2488static void sanitize_string(char *s, size_t len)
2489{
2490 ssize_t i;
2491
2492 /* null terminate */
2493 s[len - 1] = 0;
2494
2495 /* remove non printable chars */
2496 for (i = 0; i < len - 1; i++) {
2497 if (s[i] < ' ' || s[i] > 127)
2498 s[i] = '?';
2499 }
2500
2501 /* remove trailing spaces */
2502 strim(s);
2503}
2504
Florian Fainelli0272c712011-02-25 00:01:34 +00002505static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
William Juulcfa460a2007-10-31 13:53:06 +01002506{
Florian Fainelli0272c712011-02-25 00:01:34 +00002507 int i;
Florian Fainelli0272c712011-02-25 00:01:34 +00002508 while (len--) {
2509 crc ^= *p++ << 8;
2510 for (i = 0; i < 8; i++)
2511 crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
Scott Woodc45912d2008-10-24 16:20:43 -05002512 }
2513
Florian Fainelli0272c712011-02-25 00:01:34 +00002514 return crc;
2515}
William Juulcfa460a2007-10-31 13:53:06 +01002516
Florian Fainelli0272c712011-02-25 00:01:34 +00002517/*
2518 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise
2519 */
Christian Hitz90e3f392011-10-12 09:32:01 +02002520static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
Florian Fainelli0272c712011-02-25 00:01:34 +00002521 int *busw)
2522{
2523 struct nand_onfi_params *p = &chip->onfi_params;
2524 int i;
2525 int val;
2526
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002527 /* try ONFI for unknow chip or LP */
Florian Fainelli0272c712011-02-25 00:01:34 +00002528 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
2529 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
2530 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
2531 return 0;
2532
Stefan Roesee52fee92012-05-07 21:29:30 +00002533 MTDDEBUG(MTD_DEBUG_LEVEL0, "ONFI flash detected\n");
Florian Fainelli0272c712011-02-25 00:01:34 +00002534 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
2535 for (i = 0; i < 3; i++) {
2536 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
2537 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
Christian Hitz90e3f392011-10-12 09:32:01 +02002538 le16_to_cpu(p->crc)) {
Stefan Roesee52fee92012-05-07 21:29:30 +00002539 MTDDEBUG(MTD_DEBUG_LEVEL0,
2540 "ONFI param page %d valid\n", i);
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002541 break;
Florian Fainelli0272c712011-02-25 00:01:34 +00002542 }
Florian Fainelli3e9b3492010-06-12 20:59:25 +02002543 }
William Juulcfa460a2007-10-31 13:53:06 +01002544
Florian Fainelli0272c712011-02-25 00:01:34 +00002545 if (i == 3)
2546 return 0;
2547
2548 /* check version */
2549 val = le16_to_cpu(p->revision);
Florian Fainelliaad99bb2011-04-03 18:23:56 +02002550 if (val & (1 << 5))
2551 chip->onfi_version = 23;
2552 else if (val & (1 << 4))
Florian Fainelli0272c712011-02-25 00:01:34 +00002553 chip->onfi_version = 22;
2554 else if (val & (1 << 3))
2555 chip->onfi_version = 21;
2556 else if (val & (1 << 2))
2557 chip->onfi_version = 20;
Florian Fainelliaad99bb2011-04-03 18:23:56 +02002558 else if (val & (1 << 1))
Florian Fainelli0272c712011-02-25 00:01:34 +00002559 chip->onfi_version = 10;
Florian Fainelliaad99bb2011-04-03 18:23:56 +02002560 else
2561 chip->onfi_version = 0;
2562
2563 if (!chip->onfi_version) {
Christian Hitz90e3f392011-10-12 09:32:01 +02002564 printk(KERN_INFO "%s: unsupported ONFI version: %d\n",
2565 __func__, val);
Florian Fainelliaad99bb2011-04-03 18:23:56 +02002566 return 0;
2567 }
Florian Fainelli0272c712011-02-25 00:01:34 +00002568
Christian Hitz5454ddb2011-10-12 09:32:05 +02002569 sanitize_string(p->manufacturer, sizeof(p->manufacturer));
2570 sanitize_string(p->model, sizeof(p->model));
William Juulcfa460a2007-10-31 13:53:06 +01002571 if (!mtd->name)
Florian Fainelli0272c712011-02-25 00:01:34 +00002572 mtd->name = p->model;
Florian Fainelli0272c712011-02-25 00:01:34 +00002573 mtd->writesize = le32_to_cpu(p->byte_per_page);
2574 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
2575 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
Florian Fainellia931f492011-04-03 18:23:52 +02002576 chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
Florian Fainelli0272c712011-02-25 00:01:34 +00002577 *busw = 0;
2578 if (le16_to_cpu(p->features) & 1)
2579 *busw = NAND_BUSWIDTH_16;
William Juulcfa460a2007-10-31 13:53:06 +01002580
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002581 chip->options &= ~NAND_CHIPOPTIONS_MSK;
2582 chip->options |= (NAND_NO_READRDY |
2583 NAND_NO_AUTOINCR) & NAND_CHIPOPTIONS_MSK;
2584
Florian Fainelli0272c712011-02-25 00:01:34 +00002585 return 1;
2586}
2587#else
2588static inline int nand_flash_detect_onfi(struct mtd_info *mtd,
2589 struct nand_chip *chip,
2590 int *busw)
2591{
2592 return 0;
2593}
2594#endif
2595
Florian Fainelli0272c712011-02-25 00:01:34 +00002596/*
2597 * Get the flash and manufacturer id and lookup if the type is supported
2598 */
2599static const struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2600 struct nand_chip *chip,
2601 int busw,
2602 int *maf_id, int *dev_id,
2603 const struct nand_flash_dev *type)
2604{
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002605 int i, maf_idx;
2606 u8 id_data[8];
2607 int ret;
Florian Fainelli0272c712011-02-25 00:01:34 +00002608
2609 /* Select the device */
2610 chip->select_chip(mtd, 0);
2611
2612 /*
2613 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
2614 * after power-up
2615 */
2616 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
2617
2618 /* Send the command for reading device ID */
2619 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2620
2621 /* Read manufacturer and device IDs */
2622 *maf_id = chip->read_byte(mtd);
2623 *dev_id = chip->read_byte(mtd);
2624
2625 /* Try again to make sure, as some systems the bus-hold or other
2626 * interface concerns can cause random data which looks like a
2627 * possibly credible NAND flash to appear. If the two results do
2628 * not match, ignore the device completely.
2629 */
2630
2631 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2632
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002633 for (i = 0; i < 2; i++)
2634 id_data[i] = chip->read_byte(mtd);
Florian Fainelli0272c712011-02-25 00:01:34 +00002635
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002636 if (id_data[0] != *maf_id || id_data[1] != *dev_id) {
Florian Fainelli0272c712011-02-25 00:01:34 +00002637 printk(KERN_INFO "%s: second ID read did not match "
2638 "%02x,%02x against %02x,%02x\n", __func__,
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002639 *maf_id, *dev_id, id_data[0], id_data[1]);
Florian Fainelli0272c712011-02-25 00:01:34 +00002640 return ERR_PTR(-ENODEV);
2641 }
2642
2643 if (!type)
2644 type = nand_flash_ids;
2645
2646 for (; type->name != NULL; type++)
2647 if (*dev_id == type->id)
2648 break;
2649
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002650 chip->onfi_version = 0;
2651 if (!type->name || !type->pagesize) {
2652 /* Check is chip is ONFI compliant */
2653 ret = nand_flash_detect_onfi(mtd, chip, &busw);
2654 if (ret)
2655 goto ident_done;
Florian Fainelli0272c712011-02-25 00:01:34 +00002656 }
2657
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002658 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2659
2660 /* Read entire ID string */
2661
2662 for (i = 0; i < 8; i++)
2663 id_data[i] = chip->read_byte(mtd);
2664
2665 if (!type->name)
2666 return ERR_PTR(-ENODEV);
2667
Florian Fainelli0272c712011-02-25 00:01:34 +00002668 if (!mtd->name)
2669 mtd->name = type->name;
2670
2671 chip->chipsize = (uint64_t)type->chipsize << 20;
Florian Fainelli0272c712011-02-25 00:01:34 +00002672
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002673 if (!type->pagesize && chip->init_size) {
2674 /* set the pagesize, oobsize, erasesize by the driver*/
2675 busw = chip->init_size(mtd, chip, id_data);
2676 } else if (!type->pagesize) {
2677 int extid;
2678 /* The 3rd id byte holds MLC / multichip data */
2679 chip->cellinfo = id_data[2];
2680 /* The 4th id byte is the important one */
2681 extid = id_data[3];
Florian Fainelli0272c712011-02-25 00:01:34 +00002682
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002683 /*
2684 * Field definitions are in the following datasheets:
2685 * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32)
2686 * New style (6 byte ID): Samsung K9GBG08U0M (p.40)
2687 *
2688 * Check for wraparound + Samsung ID + nonzero 6th byte
2689 * to decide what to do.
2690 */
2691 if (id_data[0] == id_data[6] && id_data[1] == id_data[7] &&
2692 id_data[0] == NAND_MFR_SAMSUNG &&
2693 (chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
2694 id_data[5] != 0x00) {
2695 /* Calc pagesize */
2696 mtd->writesize = 2048 << (extid & 0x03);
2697 extid >>= 2;
2698 /* Calc oobsize */
2699 switch (extid & 0x03) {
2700 case 1:
2701 mtd->oobsize = 128;
2702 break;
2703 case 2:
2704 mtd->oobsize = 218;
2705 break;
2706 case 3:
2707 mtd->oobsize = 400;
2708 break;
2709 default:
2710 mtd->oobsize = 436;
2711 break;
2712 }
2713 extid >>= 2;
2714 /* Calc blocksize */
2715 mtd->erasesize = (128 * 1024) <<
2716 (((extid >> 1) & 0x04) | (extid & 0x03));
2717 busw = 0;
2718 } else {
2719 /* Calc pagesize */
2720 mtd->writesize = 1024 << (extid & 0x03);
2721 extid >>= 2;
2722 /* Calc oobsize */
2723 mtd->oobsize = (8 << (extid & 0x01)) *
2724 (mtd->writesize >> 9);
2725 extid >>= 2;
2726 /* Calc blocksize. Blocksize is multiples of 64KiB */
2727 mtd->erasesize = (64 * 1024) << (extid & 0x03);
2728 extid >>= 2;
2729 /* Get buswidth information */
2730 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
2731 }
2732 } else {
2733 /*
2734 * Old devices have chip data hardcoded in the device id table
2735 */
2736 mtd->erasesize = type->erasesize;
2737 mtd->writesize = type->pagesize;
2738 mtd->oobsize = mtd->writesize / 32;
2739 busw = type->options & NAND_BUSWIDTH_16;
2740
2741 /*
2742 * Check for Spansion/AMD ID + repeating 5th, 6th byte since
2743 * some Spansion chips have erasesize that conflicts with size
2744 * listed in nand_ids table
2745 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39)
2746 */
2747 if (*maf_id == NAND_MFR_AMD && id_data[4] != 0x00 &&
2748 id_data[5] == 0x00 && id_data[6] == 0x00 &&
2749 id_data[7] == 0x00 && mtd->writesize == 512) {
2750 mtd->erasesize = 128 * 1024;
2751 mtd->erasesize <<= ((id_data[3] & 0x03) << 1);
2752 }
2753 }
Florian Fainelli0272c712011-02-25 00:01:34 +00002754 /* Get chip options, preserve non chip based options */
2755 chip->options &= ~NAND_CHIPOPTIONS_MSK;
2756 chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
2757
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002758 /* Check if chip is a not a samsung device. Do not clear the
2759 * options for chips which are not having an extended id.
2760 */
2761 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
2762 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
2763ident_done:
2764
Florian Fainelli0272c712011-02-25 00:01:34 +00002765 /*
2766 * Set chip as a default. Board drivers can override it, if necessary
2767 */
2768 chip->options |= NAND_NO_AUTOINCR;
William Juulcfa460a2007-10-31 13:53:06 +01002769
2770 /* Try to identify manufacturer */
2771 for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
2772 if (nand_manuf_ids[maf_idx].id == *maf_id)
2773 break;
2774 }
2775
2776 /*
2777 * Check, if buswidth is correct. Hardware drivers should set
2778 * chip correct !
2779 */
2780 if (busw != (chip->options & NAND_BUSWIDTH_16)) {
2781 printk(KERN_INFO "NAND device: Manufacturer ID:"
2782 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
Florian Fainelli0272c712011-02-25 00:01:34 +00002783 *dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
William Juulcfa460a2007-10-31 13:53:06 +01002784 printk(KERN_WARNING "NAND bus width %d instead %d bit\n",
2785 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
2786 busw ? 16 : 8);
2787 return ERR_PTR(-EINVAL);
2788 }
2789
2790 /* Calculate the address shift from the page size */
2791 chip->page_shift = ffs(mtd->writesize) - 1;
2792 /* Convert chipsize to number of pages per chip -1. */
2793 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2794
2795 chip->bbt_erase_shift = chip->phys_erase_shift =
2796 ffs(mtd->erasesize) - 1;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002797 if (chip->chipsize & 0xffffffff)
Sandeep Paulraj4f41e7e2009-11-07 14:24:06 -05002798 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002799 else {
2800 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32));
2801 chip->chip_shift += 32 - 1;
2802 }
2803
2804 chip->badblockbits = 8;
William Juulcfa460a2007-10-31 13:53:06 +01002805
2806 /* Set the bad block position */
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002807 if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16))
2808 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
2809 else
2810 chip->badblockpos = NAND_SMALL_BADBLOCK_POS;
William Juulcfa460a2007-10-31 13:53:06 +01002811
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002812 /*
2813 * Bad block marker is stored in the last page of each block
2814 * on Samsung and Hynix MLC devices; stored in first two pages
2815 * of each block on Micron devices with 2KiB pages and on
2816 * SLC Samsung, Hynix, Toshiba and AMD/Spansion. All others scan
2817 * only the first page.
William Juulcfa460a2007-10-31 13:53:06 +01002818 */
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002819 if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
2820 (*maf_id == NAND_MFR_SAMSUNG ||
2821 *maf_id == NAND_MFR_HYNIX))
2822 chip->options |= NAND_BBT_SCANLASTPAGE;
2823 else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) &&
2824 (*maf_id == NAND_MFR_SAMSUNG ||
2825 *maf_id == NAND_MFR_HYNIX ||
2826 *maf_id == NAND_MFR_TOSHIBA ||
2827 *maf_id == NAND_MFR_AMD)) ||
2828 (mtd->writesize == 2048 &&
2829 *maf_id == NAND_MFR_MICRON))
2830 chip->options |= NAND_BBT_SCAN2NDPAGE;
2831
2832 /*
2833 * Numonyx/ST 2K pages, x8 bus use BOTH byte 1 and 6
2834 */
2835 if (!(busw & NAND_BUSWIDTH_16) &&
2836 *maf_id == NAND_MFR_STMICRO &&
2837 mtd->writesize == 2048) {
2838 chip->options |= NAND_BBT_SCANBYTE1AND6;
2839 chip->badblockpos = 0;
2840 }
William Juulcfa460a2007-10-31 13:53:06 +01002841
2842 /* Check for AND chips with 4 page planes */
2843 if (chip->options & NAND_4PAGE_ARRAY)
2844 chip->erase_cmd = multi_erase_cmd;
2845 else
2846 chip->erase_cmd = single_erase_cmd;
2847
2848 /* Do not replace user supplied command function ! */
2849 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
2850 chip->cmdfunc = nand_command_lp;
2851
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002852 /* TODO onfi flash name */
Stefan Roesee52b34d2008-01-10 18:47:33 +01002853 MTDDEBUG (MTD_DEBUG_LEVEL0, "NAND device: Manufacturer ID:"
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02002854 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id,
2855 nand_manuf_ids[maf_idx].name,
2856#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
2857 chip->onfi_version ? chip->onfi_params.model : type->name);
2858#else
2859 type->name);
2860#endif
William Juulcfa460a2007-10-31 13:53:06 +01002861
2862 return type;
2863}
2864
2865/**
2866 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2867 * @mtd: MTD device structure
2868 * @maxchips: Number of chips to scan for
Lei Wen245eb902011-01-06 09:48:18 +08002869 * @table: Alternative NAND ID table
William Juulcfa460a2007-10-31 13:53:06 +01002870 *
2871 * This is the first phase of the normal nand_scan() function. It
2872 * reads the flash ID and sets up MTD fields accordingly.
2873 *
2874 * The mtd->owner field must be set to the module of the caller.
2875 */
Lei Wen245eb902011-01-06 09:48:18 +08002876int nand_scan_ident(struct mtd_info *mtd, int maxchips,
2877 const struct nand_flash_dev *table)
William Juulcfa460a2007-10-31 13:53:06 +01002878{
Florian Fainelli0272c712011-02-25 00:01:34 +00002879 int i, busw, nand_maf_id, nand_dev_id;
William Juulcfa460a2007-10-31 13:53:06 +01002880 struct nand_chip *chip = mtd->priv;
Mike Frysinger0bdecd82010-10-20 01:15:21 +00002881 const struct nand_flash_dev *type;
William Juulcfa460a2007-10-31 13:53:06 +01002882
2883 /* Get buswidth to select the correct functions */
2884 busw = chip->options & NAND_BUSWIDTH_16;
2885 /* Set the default functions */
2886 nand_set_defaults(chip, busw);
2887
2888 /* Read the flash type */
Christian Hitz90e3f392011-10-12 09:32:01 +02002889 type = nand_get_flash_type(mtd, chip, busw,
2890 &nand_maf_id, &nand_dev_id, table);
William Juulcfa460a2007-10-31 13:53:06 +01002891
2892 if (IS_ERR(type)) {
Peter Tyser10dc6a92009-02-04 13:39:40 -06002893#ifndef CONFIG_SYS_NAND_QUIET_TEST
William Juulcfa460a2007-10-31 13:53:06 +01002894 printk(KERN_WARNING "No NAND device found!!!\n");
Peter Tyser10dc6a92009-02-04 13:39:40 -06002895#endif
William Juulcfa460a2007-10-31 13:53:06 +01002896 chip->select_chip(mtd, -1);
2897 return PTR_ERR(type);
2898 }
2899
2900 /* Check for a chip array */
2901 for (i = 1; i < maxchips; i++) {
2902 chip->select_chip(mtd, i);
Karl Beldan33efde52008-09-15 16:08:03 +02002903 /* See comment in nand_get_flash_type for reset */
2904 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
William Juulcfa460a2007-10-31 13:53:06 +01002905 /* Send the command for reading device ID */
2906 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2907 /* Read manufacturer and device IDs */
2908 if (nand_maf_id != chip->read_byte(mtd) ||
Florian Fainelli0272c712011-02-25 00:01:34 +00002909 nand_dev_id != chip->read_byte(mtd))
William Juulcfa460a2007-10-31 13:53:06 +01002910 break;
2911 }
Wolfgang Grandegger672ed2a2009-02-11 18:38:20 +01002912#ifdef DEBUG
William Juulcfa460a2007-10-31 13:53:06 +01002913 if (i > 1)
2914 printk(KERN_INFO "%d NAND chips detected\n", i);
Wolfgang Grandegger672ed2a2009-02-11 18:38:20 +01002915#endif
William Juulcfa460a2007-10-31 13:53:06 +01002916
2917 /* Store the number of chips and calc total size for mtd */
2918 chip->numchips = i;
2919 mtd->size = i * chip->chipsize;
2920
2921 return 0;
2922}
2923
2924
2925/**
2926 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2927 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +01002928 *
2929 * This is the second phase of the normal nand_scan() function. It
2930 * fills out all the uninitialized function pointers with the defaults
2931 * and scans for a bad block table if appropriate.
2932 */
2933int nand_scan_tail(struct mtd_info *mtd)
2934{
2935 int i;
2936 struct nand_chip *chip = mtd->priv;
2937
2938 if (!(chip->options & NAND_OWN_BUFFERS))
2939 chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
2940 if (!chip->buffers)
2941 return -ENOMEM;
2942
2943 /* Set the internal oob buffer location, just after the page data */
2944 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
2945
2946 /*
2947 * If no default placement scheme is given, select an appropriate one
2948 */
Christian Hitz4c6de852011-10-12 09:31:59 +02002949 if (!chip->ecc.layout && (chip->ecc.mode != NAND_ECC_SOFT_BCH)) {
William Juulcfa460a2007-10-31 13:53:06 +01002950 switch (mtd->oobsize) {
2951 case 8:
2952 chip->ecc.layout = &nand_oob_8;
2953 break;
2954 case 16:
2955 chip->ecc.layout = &nand_oob_16;
2956 break;
2957 case 64:
2958 chip->ecc.layout = &nand_oob_64;
2959 break;
2960 case 128:
2961 chip->ecc.layout = &nand_oob_128;
2962 break;
2963 default:
2964 printk(KERN_WARNING "No oob scheme defined for "
2965 "oobsize %d\n", mtd->oobsize);
William Juulcfa460a2007-10-31 13:53:06 +01002966 }
2967 }
2968
2969 if (!chip->write_page)
2970 chip->write_page = nand_write_page;
2971
2972 /*
2973 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2974 * selected and we have 256 byte pagesize fallback to software ECC
2975 */
William Juulcfa460a2007-10-31 13:53:06 +01002976
2977 switch (chip->ecc.mode) {
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -04002978 case NAND_ECC_HW_OOB_FIRST:
2979 /* Similar to NAND_ECC_HW, but a separate read_page handle */
2980 if (!chip->ecc.calculate || !chip->ecc.correct ||
2981 !chip->ecc.hwctl) {
Christian Hitz90e3f392011-10-12 09:32:01 +02002982 printk(KERN_WARNING "No ECC functions supplied; "
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -04002983 "Hardware ECC not possible\n");
2984 BUG();
2985 }
2986 if (!chip->ecc.read_page)
2987 chip->ecc.read_page = nand_read_page_hwecc_oob_first;
2988
William Juulcfa460a2007-10-31 13:53:06 +01002989 case NAND_ECC_HW:
2990 /* Use standard hwecc read page function ? */
2991 if (!chip->ecc.read_page)
2992 chip->ecc.read_page = nand_read_page_hwecc;
2993 if (!chip->ecc.write_page)
2994 chip->ecc.write_page = nand_write_page_hwecc;
David Brownell7e866612009-11-07 16:27:01 -05002995 if (!chip->ecc.read_page_raw)
2996 chip->ecc.read_page_raw = nand_read_page_raw;
2997 if (!chip->ecc.write_page_raw)
2998 chip->ecc.write_page_raw = nand_write_page_raw;
William Juulcfa460a2007-10-31 13:53:06 +01002999 if (!chip->ecc.read_oob)
3000 chip->ecc.read_oob = nand_read_oob_std;
3001 if (!chip->ecc.write_oob)
3002 chip->ecc.write_oob = nand_write_oob_std;
3003
3004 case NAND_ECC_HW_SYNDROME:
Scott Wood41ef8c72008-03-18 15:29:14 -05003005 if ((!chip->ecc.calculate || !chip->ecc.correct ||
3006 !chip->ecc.hwctl) &&
3007 (!chip->ecc.read_page ||
3008 chip->ecc.read_page == nand_read_page_hwecc ||
3009 !chip->ecc.write_page ||
3010 chip->ecc.write_page == nand_write_page_hwecc)) {
Christian Hitz90e3f392011-10-12 09:32:01 +02003011 printk(KERN_WARNING "No ECC functions supplied; "
William Juulcfa460a2007-10-31 13:53:06 +01003012 "Hardware ECC not possible\n");
3013 BUG();
3014 }
3015 /* Use standard syndrome read/write page function ? */
3016 if (!chip->ecc.read_page)
3017 chip->ecc.read_page = nand_read_page_syndrome;
3018 if (!chip->ecc.write_page)
3019 chip->ecc.write_page = nand_write_page_syndrome;
David Brownell7e866612009-11-07 16:27:01 -05003020 if (!chip->ecc.read_page_raw)
3021 chip->ecc.read_page_raw = nand_read_page_raw_syndrome;
3022 if (!chip->ecc.write_page_raw)
3023 chip->ecc.write_page_raw = nand_write_page_raw_syndrome;
William Juulcfa460a2007-10-31 13:53:06 +01003024 if (!chip->ecc.read_oob)
3025 chip->ecc.read_oob = nand_read_oob_syndrome;
3026 if (!chip->ecc.write_oob)
3027 chip->ecc.write_oob = nand_write_oob_syndrome;
3028
3029 if (mtd->writesize >= chip->ecc.size)
3030 break;
3031 printk(KERN_WARNING "%d byte HW ECC not possible on "
3032 "%d byte page size, fallback to SW ECC\n",
3033 chip->ecc.size, mtd->writesize);
3034 chip->ecc.mode = NAND_ECC_SOFT;
3035
3036 case NAND_ECC_SOFT:
3037 chip->ecc.calculate = nand_calculate_ecc;
3038 chip->ecc.correct = nand_correct_data;
3039 chip->ecc.read_page = nand_read_page_swecc;
Scott Woodc45912d2008-10-24 16:20:43 -05003040 chip->ecc.read_subpage = nand_read_subpage;
William Juulcfa460a2007-10-31 13:53:06 +01003041 chip->ecc.write_page = nand_write_page_swecc;
David Brownell7e866612009-11-07 16:27:01 -05003042 chip->ecc.read_page_raw = nand_read_page_raw;
3043 chip->ecc.write_page_raw = nand_write_page_raw;
William Juulcfa460a2007-10-31 13:53:06 +01003044 chip->ecc.read_oob = nand_read_oob_std;
3045 chip->ecc.write_oob = nand_write_oob_std;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02003046 if (!chip->ecc.size)
3047 chip->ecc.size = 256;
William Juulcfa460a2007-10-31 13:53:06 +01003048 chip->ecc.bytes = 3;
3049 break;
3050
Christian Hitz4c6de852011-10-12 09:31:59 +02003051 case NAND_ECC_SOFT_BCH:
3052 if (!mtd_nand_has_bch()) {
3053 printk(KERN_WARNING "CONFIG_MTD_ECC_BCH not enabled\n");
3054 return -EINVAL;
3055 }
3056 chip->ecc.calculate = nand_bch_calculate_ecc;
3057 chip->ecc.correct = nand_bch_correct_data;
3058 chip->ecc.read_page = nand_read_page_swecc;
3059 chip->ecc.read_subpage = nand_read_subpage;
3060 chip->ecc.write_page = nand_write_page_swecc;
3061 chip->ecc.read_page_raw = nand_read_page_raw;
3062 chip->ecc.write_page_raw = nand_write_page_raw;
3063 chip->ecc.read_oob = nand_read_oob_std;
3064 chip->ecc.write_oob = nand_write_oob_std;
3065 /*
3066 * Board driver should supply ecc.size and ecc.bytes values to
3067 * select how many bits are correctable; see nand_bch_init()
3068 * for details.
3069 * Otherwise, default to 4 bits for large page devices
3070 */
3071 if (!chip->ecc.size && (mtd->oobsize >= 64)) {
3072 chip->ecc.size = 512;
3073 chip->ecc.bytes = 7;
3074 }
3075 chip->ecc.priv = nand_bch_init(mtd,
3076 chip->ecc.size,
3077 chip->ecc.bytes,
3078 &chip->ecc.layout);
3079 if (!chip->ecc.priv)
3080 printk(KERN_WARNING "BCH ECC initialization failed!\n");
3081
3082 break;
3083
William Juulcfa460a2007-10-31 13:53:06 +01003084 case NAND_ECC_NONE:
3085 printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. "
3086 "This is not recommended !!\n");
3087 chip->ecc.read_page = nand_read_page_raw;
3088 chip->ecc.write_page = nand_write_page_raw;
3089 chip->ecc.read_oob = nand_read_oob_std;
David Brownell7e866612009-11-07 16:27:01 -05003090 chip->ecc.read_page_raw = nand_read_page_raw;
3091 chip->ecc.write_page_raw = nand_write_page_raw;
William Juulcfa460a2007-10-31 13:53:06 +01003092 chip->ecc.write_oob = nand_write_oob_std;
3093 chip->ecc.size = mtd->writesize;
3094 chip->ecc.bytes = 0;
3095 break;
3096
3097 default:
3098 printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n",
3099 chip->ecc.mode);
3100 BUG();
3101 }
3102
3103 /*
3104 * The number of bytes available for a client to place data into
3105 * the out of band area
3106 */
3107 chip->ecc.layout->oobavail = 0;
Sandeep Paulraj5df3c2b2009-11-07 14:25:18 -05003108 for (i = 0; chip->ecc.layout->oobfree[i].length
3109 && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++)
William Juulcfa460a2007-10-31 13:53:06 +01003110 chip->ecc.layout->oobavail +=
3111 chip->ecc.layout->oobfree[i].length;
3112 mtd->oobavail = chip->ecc.layout->oobavail;
3113
3114 /*
3115 * Set the number of read / write steps for one page depending on ECC
3116 * mode
3117 */
3118 chip->ecc.steps = mtd->writesize / chip->ecc.size;
Christian Hitz90e3f392011-10-12 09:32:01 +02003119 if (chip->ecc.steps * chip->ecc.size != mtd->writesize) {
William Juulcfa460a2007-10-31 13:53:06 +01003120 printk(KERN_WARNING "Invalid ecc parameters\n");
3121 BUG();
3122 }
3123 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
3124
3125 /*
3126 * Allow subpage writes up to ecc.steps. Not possible for MLC
3127 * FLASH.
3128 */
3129 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
3130 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
Christian Hitz90e3f392011-10-12 09:32:01 +02003131 switch (chip->ecc.steps) {
William Juulcfa460a2007-10-31 13:53:06 +01003132 case 2:
3133 mtd->subpage_sft = 1;
3134 break;
3135 case 4:
3136 case 8:
Sandeep Paulrajaad4a282009-11-07 14:24:34 -05003137 case 16:
William Juulcfa460a2007-10-31 13:53:06 +01003138 mtd->subpage_sft = 2;
3139 break;
3140 }
3141 }
3142 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
3143
3144 /* Initialize state */
3145 chip->state = FL_READY;
3146
3147 /* De-select the device */
3148 chip->select_chip(mtd, -1);
3149
3150 /* Invalidate the pagebuffer reference */
3151 chip->pagebuf = -1;
3152
3153 /* Fill in remaining MTD driver data */
3154 mtd->type = MTD_NANDFLASH;
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02003155 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM :
3156 MTD_CAP_NANDFLASH;
William Juulcfa460a2007-10-31 13:53:06 +01003157 mtd->erase = nand_erase;
3158 mtd->point = NULL;
3159 mtd->unpoint = NULL;
3160 mtd->read = nand_read;
3161 mtd->write = nand_write;
3162 mtd->read_oob = nand_read_oob;
3163 mtd->write_oob = nand_write_oob;
3164 mtd->sync = nand_sync;
3165 mtd->lock = NULL;
3166 mtd->unlock = NULL;
William Juulcfa460a2007-10-31 13:53:06 +01003167 mtd->block_isbad = nand_block_isbad;
3168 mtd->block_markbad = nand_block_markbad;
3169
3170 /* propagate ecc.layout to mtd_info */
3171 mtd->ecclayout = chip->ecc.layout;
3172
3173 /* Check, if we should skip the bad block table scan */
3174 if (chip->options & NAND_SKIP_BBTSCAN)
Scott Woodfb494542012-02-20 14:50:39 -06003175 chip->options |= NAND_BBT_SCANNED;
William Juulcfa460a2007-10-31 13:53:06 +01003176
Scott Woodfb494542012-02-20 14:50:39 -06003177 return 0;
William Juulcfa460a2007-10-31 13:53:06 +01003178}
3179
William Juulcfa460a2007-10-31 13:53:06 +01003180/**
Wolfgang Denk932394a2005-08-17 12:55:25 +02003181 * nand_scan - [NAND Interface] Scan for the NAND device
3182 * @mtd: MTD device structure
3183 * @maxchips: Number of chips to scan for
3184 *
William Juulcfa460a2007-10-31 13:53:06 +01003185 * This fills out all the uninitialized function pointers
Wolfgang Denk932394a2005-08-17 12:55:25 +02003186 * with the defaults.
3187 * The flash ID is read and the mtd/chip structures are
William Juulcfa460a2007-10-31 13:53:06 +01003188 * filled with the appropriate values.
3189 * The mtd->owner field must be set to the module of the caller
Wolfgang Denk932394a2005-08-17 12:55:25 +02003190 *
3191 */
William Juulcfa460a2007-10-31 13:53:06 +01003192int nand_scan(struct mtd_info *mtd, int maxchips)
Wolfgang Denk932394a2005-08-17 12:55:25 +02003193{
William Juulcfa460a2007-10-31 13:53:06 +01003194 int ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +02003195
Lei Wen245eb902011-01-06 09:48:18 +08003196 ret = nand_scan_ident(mtd, maxchips, NULL);
William Juulcfa460a2007-10-31 13:53:06 +01003197 if (!ret)
3198 ret = nand_scan_tail(mtd);
3199 return ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +02003200}
3201
3202/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02003203 * nand_release - [NAND Interface] Free resources held by the NAND device
Wolfgang Denk932394a2005-08-17 12:55:25 +02003204 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +01003205*/
3206void nand_release(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +02003207{
William Juulcfa460a2007-10-31 13:53:06 +01003208 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02003209
Christian Hitz4c6de852011-10-12 09:31:59 +02003210 if (chip->ecc.mode == NAND_ECC_SOFT_BCH)
3211 nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
3212
Wolfgang Denk932394a2005-08-17 12:55:25 +02003213#ifdef CONFIG_MTD_PARTITIONS
3214 /* Deregister partitions */
William Juulcfa460a2007-10-31 13:53:06 +01003215 del_mtd_partitions(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02003216#endif
William Juulcfa460a2007-10-31 13:53:06 +01003217
3218 /* Free bad block table memory */
3219 kfree(chip->bbt);
3220 if (!(chip->options & NAND_OWN_BUFFERS))
3221 kfree(chip->buffers);
Christian Hitz2a8e0fc2011-10-12 09:32:02 +02003222
3223 /* Free bad block descriptor memory */
3224 if (chip->badblock_pattern && chip->badblock_pattern->options
3225 & NAND_BBT_DYNAMICSTRUCT)
3226 kfree(chip->badblock_pattern);
Wolfgang Denk932394a2005-08-17 12:55:25 +02003227}