blob: 5ee83ded9ea41991b9b8988f2e2ad902479d7934 [file] [log] [blame]
SARTRE Leo9b75bad2013-06-03 23:30:36 +00001/*
2 *
3 * Congatec Conga-QEVAl board configuration file.
4 *
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
SARTRE Leo9b75bad2013-06-03 23:30:36 +000011 */
12
13#ifndef __CONFIG_CGTQMX6EVAL_H
14#define __CONFIG_CGTQMX6EVAL_H
15
SARTRE Leo9b75bad2013-06-03 23:30:36 +000016#include "mx6_common.h"
17
SARTRE Leo9b75bad2013-06-03 23:30:36 +000018#define CONFIG_MACH_TYPE 4122
19
Otavio Salvadord7140352015-11-19 19:02:36 -020020#ifdef CONFIG_SPL
Otavio Salvadord7140352015-11-19 19:02:36 -020021#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
22#define CONFIG_SPL_SPI_LOAD
23#include "imx6_spl.h"
24#endif
25
SARTRE Leo9b75bad2013-06-03 23:30:36 +000026/* Size of malloc() pool */
27#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28
29#define CONFIG_BOARD_EARLY_INIT_F
Otavio Salvadord7140352015-11-19 19:02:36 -020030#define CONFIG_BOARD_LATE_INIT
SARTRE Leo9b75bad2013-06-03 23:30:36 +000031#define CONFIG_MISC_INIT_R
SARTRE Leo9b75bad2013-06-03 23:30:36 +000032
33#define CONFIG_MXC_UART
34#define CONFIG_MXC_UART_BASE UART2_BASE
35
36/* MMC Configs */
SARTRE Leo9b75bad2013-06-03 23:30:36 +000037#define CONFIG_SYS_FSL_ESDHC_ADDR 0
38
Otavio Salvador71bcdaf2015-11-19 19:02:33 -020039/* SPI NOR */
Otavio Salvador71bcdaf2015-11-19 19:02:33 -020040#define CONFIG_SPI_FLASH
41#define CONFIG_SPI_FLASH_STMICRO
42#define CONFIG_SPI_FLASH_SST
43#define CONFIG_MXC_SPI
44#define CONFIG_SF_DEFAULT_BUS 0
45#define CONFIG_SF_DEFAULT_SPEED 20000000
46#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
47
SARTRE Leo9b75bad2013-06-03 23:30:36 +000048/* Miscellaneous commands */
49#define CONFIG_CMD_BMODE
50
Otavio Salvador862187b2015-07-23 11:02:27 -030051/* Thermal support */
Adrian Alonso1368f992015-09-02 13:54:13 -050052#define CONFIG_IMX_THERMAL
Otavio Salvador862187b2015-07-23 11:02:27 -030053
Otavio Salvador4c9929d2015-07-23 11:02:28 -030054/* I2C Configs */
Otavio Salvador4c9929d2015-07-23 11:02:28 -030055#define CONFIG_SYS_I2C
56#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020057#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
58#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Otavio Salvador4c9929d2015-07-23 11:02:28 -030059#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
60#define CONFIG_SYS_I2C_SPEED 100000
61
62/* PMIC */
63#define CONFIG_POWER
64#define CONFIG_POWER_I2C
65#define CONFIG_POWER_PFUZE100
66#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
67
Otavio Salvador95246ac2015-07-23 11:02:29 -030068/* USB Configs */
Otavio Salvador95246ac2015-07-23 11:02:29 -030069#define CONFIG_USB_EHCI
70#define CONFIG_USB_EHCI_MX6
Otavio Salvador95246ac2015-07-23 11:02:29 -030071#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
72#define CONFIG_USB_HOST_ETHER
73#define CONFIG_USB_ETHER_ASIX
74#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
75#define CONFIG_MXC_USB_FLAGS 0
76#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
77#define CONFIG_USB_KEYBOARD
78#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
79
Otavio Salvador3e08e1b2015-09-17 15:13:20 -030080#define CONFIG_USBD_HS
Otavio Salvador3e08e1b2015-09-17 15:13:20 -030081
Otavio Salvador3e08e1b2015-09-17 15:13:20 -030082#define CONFIG_USB_FUNCTION_MASS_STORAGE
Otavio Salvador3e08e1b2015-09-17 15:13:20 -030083
Otavio Salvadoreb76f132015-11-19 19:02:35 -020084#define CONFIG_USB_FUNCTION_FASTBOOT
85#define CONFIG_CMD_FASTBOOT
86#define CONFIG_ANDROID_BOOT_IMAGE
87#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
88#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
89
Otavio Salvador6d551f22015-07-23 11:02:30 -030090/* Framebuffer */
91#define CONFIG_VIDEO
92#define CONFIG_VIDEO_IPUV3
93#define CONFIG_CFB_CONSOLE
94#define CONFIG_VGA_AS_SINGLE_DEVICE
95#define CONFIG_SYS_CONSOLE_IS_IN_ENV
96#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
97#define CONFIG_VIDEO_BMP_RLE8
98#define CONFIG_SPLASH_SCREEN
99#define CONFIG_SPLASH_SCREEN_ALIGN
100#define CONFIG_BMP_16BPP
101#define CONFIG_VIDEO_LOGO
102#define CONFIG_VIDEO_BMP_LOGO
103#ifdef CONFIG_MX6DL
104#define CONFIG_IPUV3_CLK 198000000
105#else
106#define CONFIG_IPUV3_CLK 264000000
107#endif
108#define CONFIG_IMX_HDMI
109
Otavio Salvador6731bc82015-07-23 11:02:31 -0300110/* SATA */
111#define CONFIG_CMD_SATA
112#define CONFIG_DWC_AHSATA
113#define CONFIG_SYS_SATA_MAX_DEVICE 1
114#define CONFIG_DWC_AHSATA_PORT_ID 0
115#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
116#define CONFIG_LBA48
117#define CONFIG_LIBATA
118
Otavio Salvadorf0222902015-07-28 20:24:41 -0300119/* Ethernet */
Otavio Salvadorf0222902015-07-28 20:24:41 -0300120#define CONFIG_FEC_MXC
121#define CONFIG_MII
122#define IMX_FEC_BASE ENET_BASE_ADDR
123#define CONFIG_FEC_XCV_TYPE RGMII
124#define CONFIG_ETHPRIME "FEC"
125#define CONFIG_FEC_MXC_PHYADDR 6
126#define CONFIG_PHYLIB
127#define CONFIG_PHY_ATHEROS
128
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300129/* Command definition */
130
131#define CONFIG_MXC_UART_BASE UART2_BASE
132#define CONFIG_CONSOLE_DEV "ttymxc1"
133#define CONFIG_MMCROOT "/dev/mmcblk0p2"
134#define CONFIG_SYS_MMC_ENV_DEV 0
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000135
Otavio Salvadord7140352015-11-19 19:02:36 -0200136#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000137#define CONFIG_EXTRA_ENV_SETTINGS \
138 "script=boot.scr\0" \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -0200139 "image=zImage\0" \
Otavio Salvadord7140352015-11-19 19:02:36 -0200140 "fdtfile=undefined\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300141 "fdt_addr_r=0x18000000\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000142 "boot_fdt=try\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300143 "ip_dyn=yes\0" \
144 "console=" CONFIG_CONSOLE_DEV "\0" \
Otavio Salvadore0a352d2015-11-19 19:02:38 -0200145 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
146 "dfu_alt_info_spl=spl raw 0x400\0" \
147 "dfu_alt_info_img=u-boot raw 0x10000\0" \
148 "dfu_alt_info=spl raw 0x400\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300149 "bootm_size=0x10000000\0" \
150 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000151 "mmcpart=1\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300152 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
153 "update_sd_firmware=" \
154 "if test ${ip_dyn} = yes; then " \
155 "setenv get_cmd dhcp; " \
156 "else " \
157 "setenv get_cmd tftp; " \
158 "fi; " \
159 "if mmc dev ${mmcdev}; then " \
160 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
161 "setexpr fw_sz ${filesize} / 0x200; " \
162 "setexpr fw_sz ${fw_sz} + 1; " \
163 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
164 "fi; " \
165 "fi\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000166 "mmcargs=setenv bootargs console=${console},${baudrate} " \
167 "root=${mmcroot}\0" \
168 "loadbootscript=" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300169 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000170 "bootscript=echo Running bootscript from mmc ...; " \
171 "source\0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300172 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
173 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000174 "mmcboot=echo Booting from mmc ...; " \
175 "run mmcargs; " \
176 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
177 "if run loadfdt; then " \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300178 "bootz ${loadaddr} - ${fdt_addr_r}; " \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000179 "else " \
180 "if test ${boot_fdt} = try; then " \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -0200181 "bootz; " \
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000182 "else " \
183 "echo WARN: Cannot load the DT; " \
184 "fi; " \
185 "fi; " \
186 "else " \
Otavio Salvador4ac0c2b2014-01-16 19:57:56 -0200187 "bootz; " \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300188 "fi;\0" \
Otavio Salvadord7140352015-11-19 19:02:36 -0200189 "findfdt="\
190 "if test $board_rev = MX6Q ; then " \
191 "setenv fdtfile imx6q-qmx6.dtb; fi; " \
192 "if test $board_rev = MX6DL ; then " \
193 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
194 "if test $fdtfile = undefined; then " \
195 "echo WARNING: Could not determine dtb to use; fi; \0" \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300196 "netargs=setenv bootargs console=${console},${baudrate} " \
197 "root=/dev/nfs " \
198 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
199 "netboot=echo Booting from net ...; " \
200 "run netargs; " \
201 "if test ${ip_dyn} = yes; then " \
202 "setenv get_cmd dhcp; " \
203 "else " \
204 "setenv get_cmd tftp; " \
205 "fi; " \
206 "${get_cmd} ${image}; " \
207 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
208 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
209 "bootz ${loadaddr} - ${fdt_addr_r}; " \
210 "else " \
211 "if test ${boot_fdt} = try; then " \
212 "bootz; " \
213 "else " \
214 "echo WARN: Cannot load the DT; " \
215 "fi; " \
216 "fi; " \
217 "else " \
218 "bootz; " \
219 "fi;\0" \
Otavio Salvador71bcdaf2015-11-19 19:02:33 -0200220 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000221
222#define CONFIG_BOOTCOMMAND \
Otavio Salvador71bcdaf2015-11-19 19:02:33 -0200223 "run spilock;" \
Otavio Salvadord7140352015-11-19 19:02:36 -0200224 "run findfdt; " \
Otavio Salvador5b94ce22015-07-23 11:02:33 -0300225 "mmc dev ${mmcdev};" \
226 "if mmc rescan; then " \
227 "if run loadbootscript; then " \
228 "run bootscript; " \
229 "else " \
230 "if run loadimage; then " \
231 "run mmcboot; " \
232 "else run netboot; " \
233 "fi; " \
234 "fi; " \
235 "else run netboot; fi"
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000236
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000237#define CONFIG_SYS_MEMTEST_START 0x10000000
238#define CONFIG_SYS_MEMTEST_END 0x10010000
239#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
240
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000241/* Physical Memory Map */
242#define CONFIG_NR_DRAM_BANKS 1
243#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000244
245#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
246#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
247#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
248
249#define CONFIG_SYS_INIT_SP_OFFSET \
250 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
251#define CONFIG_SYS_INIT_SP_ADDR \
252 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
253
Peter Robinson056845c2015-05-22 17:30:45 +0100254/* Environment organization */
Otavio Salvadord5de9102015-11-19 19:02:34 -0200255#if defined (CONFIG_ENV_IS_IN_MMC)
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000256#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
257#define CONFIG_SYS_MMC_ENV_DEV 0
Otavio Salvadord5de9102015-11-19 19:02:34 -0200258#endif
259
260#define CONFIG_ENV_SIZE (8 * 1024)
261
262#define CONFIG_ENV_IS_IN_SPI_FLASH
263#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
264#define CONFIG_ENV_OFFSET (768 * 1024)
265#define CONFIG_ENV_SECT_SIZE (64 * 1024)
266#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
267#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
268#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
269#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
270#endif
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000271
SARTRE Leo9b75bad2013-06-03 23:30:36 +0000272#endif /* __CONFIG_CGTQMX6EVAL_H */