blob: ccd9397df4ee01080bcec1340a315e5e07e73a37 [file] [log] [blame]
Stefan Roese6e7fb6e2005-11-29 18:18:21 +01001/*
2 * (C) Copyright 2005
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 * John Otken, jotken@softadvances.com
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/************************************************************************
26 * luan.h - configuration for LUAN board
27 ***********************************************************************/
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*-----------------------------------------------------------------------
32 * High Level Configuration Options
33 *----------------------------------------------------------------------*/
34#define CONFIG_LUAN 1 /* Board is Luan */
35#define CONFIG_440SP 1 /* Specific PPC440SP support */
36#define CONFIG_4xx 1 /* PPC4xx family */
37#define CONFIG_440 1
38#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
39
Stefan Roese490f2042008-06-06 15:55:03 +020040/*
41 * Include common defines/options for all AMCC eval boards
42 */
43#define CONFIG_HOSTNAME luan
44#include "amcc-common.h"
45
Stefan Roese00cdb4c2007-03-08 10:13:16 +010046#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010047#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
48
49/*-----------------------------------------------------------------------
50 * Base addresses -- Note these are effective addresses where the
51 * actual resources get mapped (not physical addresses)
52 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053#define CONFIG_SYS_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */
54#define CONFIG_SYS_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */
55#define CONFIG_SYS_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */
Wolfgang Denkbf560802010-09-10 23:04:05 +020056#define CONFIG_SYS_SRAM_SIZE (1 << 20)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057#define CONFIG_SYS_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010058
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059#define CONFIG_SYS_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010060
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#define CONFIG_SYS_PERIPHERAL_BASE 0xf0000000 /* internal peripherals */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010062
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
64#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
65#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010066
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#if CONFIG_SYS_LARGE_FLASH == 0xffc00000
68#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LARGE_FLASH
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010069#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020070#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_SMALL_FLASH
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010071#endif
72
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073#if CONFIG_SYS_SRAM_BASE
74#define CONFIG_SYS_KBYTES_SDRAM 1024*2
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010075#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define CONFIG_SYS_KBYTES_SDRAM 1024
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010077#endif
78
79/*-----------------------------------------------------------------------
80 * Initial RAM & stack pointer (placed in SDRAM)
81 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE
83#define CONFIG_SYS_INIT_RAM_END (8 << 10)
84#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
85#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
86#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010087
88/*-----------------------------------------------------------------------
89 * Serial Port
90 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010092#undef CONFIG_UART1_CONSOLE /* define if you want console on UART1 */
93
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010094/*-----------------------------------------------------------------------
95 * Environment
96 *----------------------------------------------------------------------*/
97/*
98 * Define here the location of the environment variables (FLASH or EEPROM).
99 * Note: DENX encourages to use redundant environment in FLASH.
100 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200101#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100102
103/*-----------------------------------------------------------------------
104 * FLASH related
105 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */
107#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100108
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
110#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100111
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200112#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100113
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200114#define CONFIG_SYS_FLASH_ADDR0 0x555
115#define CONFIG_SYS_FLASH_ADDR1 0x2aa
116#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100117
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200118#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200119#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200121#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100122
123/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200124#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
125#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200126#endif /* CONFIG_ENV_IS_IN_FLASH */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100127
128/*-----------------------------------------------------------------------
129 * DDR SDRAM
130 *----------------------------------------------------------------------*/
Stefan Roese00cdb4c2007-03-08 10:13:16 +0100131#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
132#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
Stefan Roesee4bbed22007-06-01 13:45:24 +0200133#define CONFIG_DDR_ECC 1 /* with ECC support */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100134
135/*-----------------------------------------------------------------------
136 * I2C
137 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200138#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100139
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_I2C_MULTI_EEPROMS
141#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
142#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
143#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
144#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
Stefan Roese4f92ed52006-08-07 14:33:32 +0200145
Stefan Roese490f2042008-06-06 15:55:03 +0200146/*
147 * Default environment variables
148 */
149#define CONFIG_EXTRA_ENV_SETTINGS \
150 CONFIG_AMCC_DEF_ENV \
151 CONFIG_AMCC_DEF_ENV_PPC \
152 CONFIG_AMCC_DEF_ENV_NOR_UPD \
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100153 "kernel_addr=fc000000\0" \
154 "ramdisk_addr=fc100000\0" \
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100155 ""
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100156
Stefan Roesea00eccf2008-05-08 11:05:15 +0200157#define CONFIG_HAS_ETH0
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100158#define CONFIG_PHY_ADDR 1
159#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
160#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
161
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100162#ifdef DEBUG
163#define CONFIG_PANIC_HANG
164#else
165#define CONFIG_HW_WATCHDOG /* watchdog */
166#endif
167
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500168/*
Stefan Roese490f2042008-06-06 15:55:03 +0200169 * Commands additional to the ones defined in amcc-common.h
Jon Loeliger7f5c0152007-07-10 09:38:02 -0500170 */
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500171#define CONFIG_CMD_PCI
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500172#define CONFIG_CMD_SDRAM
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100173
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100174/*-----------------------------------------------------------------------
175 * PCI stuff
176 *-----------------------------------------------------------------------
177 */
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500178#if defined(CONFIG_CMD_PCI)
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100179
180/* General PCI */
181#define CONFIG_PCI /* include pci support */
182#define CONFIG_PCI_PNP /* do (not) pci plug-and-play */
183#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
184
185/* Board-specific PCI */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200186#define CONFIG_SYS_PCI_TARGET_INIT
187#undef CONFIG_SYS_PCI_MASTER_INIT
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100188
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
190#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100191
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500192#endif
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100193
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100194#endif /* __CONFIG_H */