| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 1 | CONFIG_ARM=y |
| Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 2 | CONFIG_SPL_SKIP_LOWLEVEL_INIT=y |
| Tom Rini | f76750d | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 3 | CONFIG_SYS_ARCH_TIMER=y |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 4 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 5 | CONFIG_ARCH_ROCKCHIP=y |
| Tom Rini | 278b90c | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 6 | CONFIG_SYS_TEXT_BASE=0x00100000 |
| Tom Rini | 554e551 | 2020-08-10 15:31:07 -0400 | [diff] [blame] | 7 | CONFIG_NR_DRAM_BANKS=1 |
| Tom Rini | 2bba780 | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 8 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" |
| Tom Rini | c5a6e9f | 2020-07-06 13:54:25 -0400 | [diff] [blame] | 9 | CONFIG_SPL_TEXT_BASE=0xff704000 |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 10 | CONFIG_ROCKCHIP_RK3288=y |
| Simon Glass | 103c5f1 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 11 | # CONFIG_SPL_MMC is not set |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 12 | CONFIG_TARGET_CHROMEBIT_MICKEY=y |
| Tom Rini | d168bcb | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 13 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
| Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 14 | CONFIG_DEBUG_UART_BASE=0xff690000 |
| 15 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 16 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| Simon Glass | ea2ca7e | 2021-08-08 12:20:14 -0600 | [diff] [blame] | 17 | CONFIG_SPL_SPI=y |
| Tom Rini | d46e86d | 2022-04-08 13:36:51 -0400 | [diff] [blame] | 18 | CONFIG_SYS_LOAD_ADDR=0x800800 |
| Tom Rini | 556fd59 | 2020-04-28 16:15:47 -0400 | [diff] [blame] | 19 | CONFIG_SPL_PAYLOAD="u-boot.img" |
| Tom Rini | f7d0ae9 | 2020-07-28 08:46:52 -0400 | [diff] [blame] | 20 | CONFIG_DEBUG_UART=y |
| Tom Rini | eaf6ea6 | 2022-05-25 12:16:03 -0400 | [diff] [blame] | 21 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 22 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 |
| Simon Glass | 37304aa | 2019-07-20 20:51:14 -0600 | [diff] [blame] | 23 | CONFIG_USE_PREBOOT=y |
| Klaus Goger | a2a5053 | 2018-05-25 23:45:05 +0200 | [diff] [blame] | 24 | CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 25 | # CONFIG_DISPLAY_CPUINFO is not set |
| Mario Six | 78eba69 | 2018-03-28 14:38:17 +0200 | [diff] [blame] | 26 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| Urja Rannikko | fffdf72 | 2020-05-13 19:15:21 +0000 | [diff] [blame] | 27 | CONFIG_BOARD_EARLY_INIT_R=y |
| Tom Rini | ca8a329 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 28 | CONFIG_SPL_PAD_TO=0x7f8000 |
| Tom Rini | 9b5f9ae | 2022-05-19 15:09:22 -0400 | [diff] [blame] | 29 | CONFIG_SPL_NO_BSS_LIMIT=y |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 30 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| Tom Rini | f113d7d | 2022-05-26 13:13:21 -0400 | [diff] [blame] | 31 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 32 | CONFIG_SPL_STACK=0xff718000 |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 33 | CONFIG_SPL_STACK_R=y |
| 34 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 35 | # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set |
| Simon Glass | 1e52db6 | 2021-07-14 17:05:32 -0500 | [diff] [blame] | 36 | # CONFIG_SPL_CRC32 is not set |
| Marek Vasut | 5550043 | 2018-04-07 16:05:27 +0200 | [diff] [blame] | 37 | CONFIG_SPL_SPI_LOAD=y |
| Tom Rini | 3e5b62f | 2021-08-10 15:08:46 -0400 | [diff] [blame] | 38 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 |
| Tom Rini | c45568c | 2022-06-25 19:29:46 -0400 | [diff] [blame] | 39 | CONFIG_SYS_BOOTM_LEN=0x4000000 |
| Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 40 | CONFIG_CMD_GPIO=y |
| Patrick Delaunay | b331cd6 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 41 | CONFIG_CMD_GPT=y |
| Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 42 | CONFIG_CMD_I2C=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 43 | CONFIG_CMD_MMC=y |
| Simon Glass | 719d36e | 2017-08-04 16:34:46 -0600 | [diff] [blame] | 44 | CONFIG_CMD_SF_TEST=y |
| Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 45 | CONFIG_CMD_SPI=y |
| Eddie Cai | c3d098e | 2017-12-15 08:17:13 +0800 | [diff] [blame] | 46 | CONFIG_CMD_USB=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 47 | # CONFIG_CMD_SETEXPR is not set |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 48 | CONFIG_CMD_CACHE=y |
| 49 | CONFIG_CMD_TIME=y |
| 50 | CONFIG_CMD_PMIC=y |
| 51 | CONFIG_CMD_REGULATOR=y |
| Patrick Delaunay | b0cf733 | 2017-01-27 11:00:37 +0100 | [diff] [blame] | 52 | # CONFIG_SPL_DOS_PARTITION is not set |
| Patrick Delaunay | bd42a94 | 2017-01-27 11:00:41 +0100 | [diff] [blame] | 53 | # CONFIG_SPL_EFI_PARTITION is not set |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 54 | CONFIG_SPL_OF_CONTROL=y |
| 55 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 56 | CONFIG_SPL_OF_PLATDATA=y |
| Tom Rini | 8d8ee47 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 57 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 58 | CONFIG_REGMAP=y |
| 59 | CONFIG_SPL_REGMAP=y |
| 60 | CONFIG_SYSCON=y |
| 61 | CONFIG_SPL_SYSCON=y |
| 62 | # CONFIG_SPL_SIMPLE_BUS is not set |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 63 | # CONFIG_SPL_BLK is not set |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 64 | CONFIG_CLK=y |
| 65 | CONFIG_SPL_CLK=y |
| 66 | CONFIG_ROCKCHIP_GPIO=y |
| 67 | CONFIG_I2C_CROS_EC_TUNNEL=y |
| 68 | CONFIG_SYS_I2C_ROCKCHIP=y |
| 69 | CONFIG_I2C_MUX=y |
| Masahiro Yamada | 1878095 | 2016-12-07 22:10:25 +0900 | [diff] [blame] | 70 | CONFIG_DM_KEYBOARD=y |
| Simon Glass | 93e1edf | 2021-11-24 09:26:44 -0700 | [diff] [blame] | 71 | CONFIG_KEYBOARD=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 72 | CONFIG_CROS_EC_KEYB=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 73 | CONFIG_CROS_EC=y |
| 74 | CONFIG_CROS_EC_SPI=y |
| 75 | CONFIG_PWRSEQ=y |
| Jaehoon Chung | 144d057 | 2021-02-16 10:16:56 +0900 | [diff] [blame] | 76 | CONFIG_MMC_PWRSEQ=y |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 77 | # CONFIG_SPL_DM_MMC is not set |
| Masahiro Yamada | 55ed3b4 | 2017-01-10 13:32:04 +0900 | [diff] [blame] | 78 | CONFIG_MMC_DW=y |
| Masahiro Yamada | fed4408 | 2017-01-10 13:32:03 +0900 | [diff] [blame] | 79 | CONFIG_MMC_DW_ROCKCHIP=y |
| Miquel Raynal | 888f184 | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 80 | CONFIG_MTD=y |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 81 | CONFIG_SF_DEFAULT_BUS=2 |
| Patrick Delaunay | 14453fb | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 82 | CONFIG_SF_DEFAULT_SPEED=20000000 |
| Urja Rannikko | 64df512 | 2019-05-13 13:51:03 +0000 | [diff] [blame] | 83 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 84 | CONFIG_PINCTRL=y |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 85 | CONFIG_PINCONF=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 86 | CONFIG_SPL_PINCTRL=y |
| Urja Rannikko | 5e50f87 | 2020-05-13 19:15:23 +0000 | [diff] [blame] | 87 | # CONFIG_SPL_PINCTRL_FULL is not set |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 88 | CONFIG_DM_PMIC=y |
| 89 | # CONFIG_SPL_PMIC_CHILDREN is not set |
| Jacob Chen | 453c5a9 | 2017-05-02 14:54:52 +0800 | [diff] [blame] | 90 | CONFIG_PMIC_RK8XX=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 91 | CONFIG_DM_REGULATOR_FIXED=y |
| Jacob Chen | 453c5a9 | 2017-05-02 14:54:52 +0800 | [diff] [blame] | 92 | CONFIG_REGULATOR_RK8XX=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 93 | CONFIG_PWM_ROCKCHIP=y |
| 94 | CONFIG_RAM=y |
| 95 | CONFIG_SPL_RAM=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 96 | CONFIG_DEBUG_UART_SHIFT=2 |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 97 | CONFIG_ROCKCHIP_SPI=y |
| 98 | CONFIG_SYSRESET=y |
| Tom Rini | ecad705 | 2017-08-25 17:50:26 -0400 | [diff] [blame] | 99 | CONFIG_USB=y |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 100 | # CONFIG_SPL_DM_USB is not set |
| 101 | CONFIG_USB_DWC2=y |
| Adam Ford | 6574864 | 2018-01-02 10:39:52 -0600 | [diff] [blame] | 102 | CONFIG_ROCKCHIP_USB2_PHY=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 103 | CONFIG_DM_VIDEO=y |
| Anatolij Gustschin | 8a6ffed | 2020-02-04 22:43:06 +0100 | [diff] [blame] | 104 | # CONFIG_VIDEO_BPP8 is not set |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 105 | CONFIG_DISPLAY=y |
| 106 | CONFIG_VIDEO_ROCKCHIP=y |
| eric.gao@rock-chips.com | b98f0a3 | 2017-04-17 22:24:23 +0800 | [diff] [blame] | 107 | CONFIG_DISPLAY_ROCKCHIP_HDMI=y |
| Urja Rannikko | 7ba79f2 | 2019-05-13 13:51:05 +0000 | [diff] [blame] | 108 | CONFIG_SPL_TINY_MEMSET=y |
| Simon Glass | e70408c | 2016-11-13 14:22:16 -0700 | [diff] [blame] | 109 | CONFIG_CMD_DHRYSTONE=y |
| 110 | CONFIG_ERRNO_STR=y |