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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <mpc8xx.h>
26#include <asm/8xx_immap.h>
27#include "ioport.h"
28
29#if 0
30#define IOPORT_DEBUG
31#endif
32
33#ifdef IOPORT_DEBUG
34#define PRINTF(fmt,args...) printf (fmt ,##args)
35#else
36#define PRINTF(fmt,args...)
37#endif
38
39/*
40 * The ioport configuration table.
41 */
42const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
43 /*
44 * Port A configuration
wdenk7aa78612003-05-03 15:50:43 +000045 * Pin Signal Type Active Initial state
Wolfgang Denk53677ef2008-05-20 16:00:29 +020046 * PA7 fpgaProgramLowOut Out Low High
47 * PA1 fpgaCoreVoltageFailLow In Low N/A
wdenkc6097192002-11-03 00:24:07 +000048 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020049 { /* conf ppar psor pdir podr pdat pint function */
wdenkc6097192002-11-03 00:24:07 +000050 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */
51 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */
52 /* PA15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
53 /* PA14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
54 /* PA13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
55 /* PA12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
56 /* PA11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
57 /* PA10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
58 /* PA9 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 1*/
59 /* PA8 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 1*/
60 /* PA7 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaProgramLow */
61 /* PA6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
62 /* PA5 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 0*/
63 /* PA4 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 0*/
64 /* PA3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
65 /* PA2 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk7aa78612003-05-03 15:50:43 +000066#if !defined(CONFIG_SC)
67 /* PA1 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaCoreVoltageFail*/
68#else
wdenkc6097192002-11-03 00:24:07 +000069 /* PA1 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk7aa78612003-05-03 15:50:43 +000070#endif
wdenkc6097192002-11-03 00:24:07 +000071 /* PA0 */ { 0, 0, 0, 0, 0, 0, 0 } /* */
72 },
73
74 /*
wdenk7aa78612003-05-03 15:50:43 +000075 * Port B configuration
wdenkc6097192002-11-03 00:24:07 +000076 * Pin Signal Type Active Initial state
77 * PB14 docBusyLowIn In Low X
78 * PB15 gpio1Sig Out High Low
79 * PB16 fpgaDoneBi In High X
wdenk7aa78612003-05-03 15:50:43 +000080 * PB17 swBitOkLowOut Out Low High
wdenkc6097192002-11-03 00:24:07 +000081 * PB19 speakerVolSig Out/Hi-Z High/Low High (Hi-Z)
82 * PB22 fpgaInitLowBi In Low X
83 * PB23 batteryOkSig In High X
wdenk7aa78612003-05-03 15:50:43 +000084 * PB31 pulseCatcherClr Out High 0
85 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020086 { /* conf ppar psor pdir podr pdat pint function */
wdenk7aa78612003-05-03 15:50:43 +000087#if !defined(CONFIG_SC)
88 /* PB31 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
89#else
90 /* PB31 */ { 1, 0, 0, 1, 0, 0, 0 }, /* pulseCatcherClr */
91#endif
wdenkc6097192002-11-03 00:24:07 +000092 /* PB30 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
93 /* PB29 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
94 /* PB28 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
95 /* PB27 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
96 /* PB26 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
97 /* PB25 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
98 /* PB24 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk7aa78612003-05-03 15:50:43 +000099#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000100 /* PB23 */ { 1, 0, 0, 0, 0, 0, 0 }, /* batteryOk */
wdenk7aa78612003-05-03 15:50:43 +0000101#else
102 /* PB23 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
103#endif
wdenkc6097192002-11-03 00:24:07 +0000104 /* PB22 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaInitLowBi */
105 /* PB21 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
106 /* PB20 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk7aa78612003-05-03 15:50:43 +0000107#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000108 /* PB19 */ { 1, 0, 0, 1, 1, 1, 0 }, /* speakerVol */
wdenk7aa78612003-05-03 15:50:43 +0000109#else
110 /* PB19 */ { 0, 0, 0, 1, 1, 1, 0 }, /* */
111#endif
wdenkc6097192002-11-03 00:24:07 +0000112 /* PB18 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk7aa78612003-05-03 15:50:43 +0000113 /* PB17 */ { 1, 0, 0, 1, 0, 1, 0 }, /* swBitOkLow */
wdenkc6097192002-11-03 00:24:07 +0000114 /* PB16 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaDone */
115 /* PB15 */ { 1, 0, 0, 1, 0, 0, 0 }, /* gpio1 */
wdenk7aa78612003-05-03 15:50:43 +0000116#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000117 /* PB14 */ { 1, 0, 0, 0, 0, 0, 0 } /* docBusyLow */
wdenk7aa78612003-05-03 15:50:43 +0000118#else
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200119 /* PB14 */ { 0, 0, 0, 0, 0, 0, 0 } /* */
wdenk7aa78612003-05-03 15:50:43 +0000120#endif
121 },
wdenkc6097192002-11-03 00:24:07 +0000122
123 /*
wdenk7aa78612003-05-03 15:50:43 +0000124 * Port C configuration
wdenkc6097192002-11-03 00:24:07 +0000125 * Pin Signal Type Active Initial state
126 * PC4 i2cBus1EnSig Out High High
127 * PC5 i2cBus2EnSig Out High High
128 * PC6 gpio0Sig Out High Low
129 * PC8 i2cBus3EnSig Out High High
130 * PC10 i2cBus4EnSig Out High High
131 * PC11 fpgaResetLowOut Out Low High
132 * PC12 systemBitOkIn In High X
133 * PC15 selfDreqLow In Low X
134 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200135 { /* conf ppar psor pdir podr pdat pint function */
wdenkc6097192002-11-03 00:24:07 +0000136 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
137 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
138 /* PC15 */ { 1, 0, 0, 0, 0, 0, 0 }, /* selfDreqLowIn */
139 /* PC14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
140 /* PC13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk7aa78612003-05-03 15:50:43 +0000141#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000142 /* PC12 */ { 1, 0, 0, 0, 0, 0, 0 }, /* systemBitOkIn */
wdenk7aa78612003-05-03 15:50:43 +0000143#else
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200144 /* PC12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk7aa78612003-05-03 15:50:43 +0000145#endif
wdenkc6097192002-11-03 00:24:07 +0000146 /* PC11 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaResetLowOut */
wdenk7aa78612003-05-03 15:50:43 +0000147#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000148 /* PC10 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus4EnSig */
wdenk7aa78612003-05-03 15:50:43 +0000149#else
150 /* PC10 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
151#endif
wdenkc6097192002-11-03 00:24:07 +0000152 /* PC9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk7aa78612003-05-03 15:50:43 +0000153#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000154 /* PC8 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus3EnSig */
wdenk7aa78612003-05-03 15:50:43 +0000155#else
156 /* PC8 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
157#endif
wdenkc6097192002-11-03 00:24:07 +0000158 /* PC7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
159 /* PC6 */ { 1, 0, 0, 1, 0, 1, 0 }, /* gpio0 */
wdenk7aa78612003-05-03 15:50:43 +0000160#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000161 /* PC5 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus2EnSig */
162 /* PC4 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus1EnSig */
wdenk7aa78612003-05-03 15:50:43 +0000163#else
164 /* PC5 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
165 /* PC4 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
166#endif
wdenkc6097192002-11-03 00:24:07 +0000167 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
168 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
169 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
170 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */
wdenk7aa78612003-05-03 15:50:43 +0000171 },
wdenkc6097192002-11-03 00:24:07 +0000172
wdenk7aa78612003-05-03 15:50:43 +0000173 /*
174 * Port D configuration
175 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200176 { /* conf ppar psor pdir podr pdat pint function */
wdenkc6097192002-11-03 00:24:07 +0000177 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
178 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
179 /* PD15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
180 /* PD14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
181 /* PD13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
182 /* PD12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
183 /* PD11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
184 /* PD10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
185 /* PD9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
186 /* PD8 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
187 /* PD7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
188 /* PD6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
189 /* PD5 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
190 /* PD4 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
191 /* PD3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
192 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
193 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
194 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */
wdenk7aa78612003-05-03 15:50:43 +0000195 }
wdenkc6097192002-11-03 00:24:07 +0000196};
197
198/*
199 * Configure the MPC8XX I/O ports per the ioport configuration table
200 * (taken from ./cpu/mpc8260/cpu_init.c)
201 */
wdenkbf9e3b32004-02-12 00:47:09 +0000202void config_mpc8xx_ioports (volatile immap_t * immr)
wdenkc6097192002-11-03 00:24:07 +0000203{
wdenkbf9e3b32004-02-12 00:47:09 +0000204 int portnum;
wdenkc6097192002-11-03 00:24:07 +0000205
wdenkbf9e3b32004-02-12 00:47:09 +0000206 for (portnum = 0; portnum < NUM_PORTS; portnum++) {
wdenkc6097192002-11-03 00:24:07 +0000207 uint pmsk = 0, ppar = 0, psor = 0, pdir = 0;
208 uint podr = 0, pdat = 0, pint = 0;
209 uint msk = 1;
wdenkbf9e3b32004-02-12 00:47:09 +0000210 mpc8xx_iop_conf_t *iopc =
211 (mpc8xx_iop_conf_t *) & iop_conf_tab[portnum][0];
wdenkc6097192002-11-03 00:24:07 +0000212 mpc8xx_iop_conf_t *eiopc = iopc + PORT_BITS;
213
214 /*
215 * For all ports except port B, ignore the two don't care entries
216 * in the configuration tables.
217 */
218 if (portnum != 1) {
wdenkbf9e3b32004-02-12 00:47:09 +0000219 iopc = (mpc8xx_iop_conf_t *) &
220 iop_conf_tab[portnum][2];
wdenkc6097192002-11-03 00:24:07 +0000221 }
222
223 /*
224 * NOTE: index 0 refers to pin 17, index 17 refers to pin 0
225 */
226 while (iopc < eiopc) {
wdenkbf9e3b32004-02-12 00:47:09 +0000227 if (iopc->conf) {
wdenkc6097192002-11-03 00:24:07 +0000228 pmsk |= msk;
wdenkbf9e3b32004-02-12 00:47:09 +0000229 if (iopc->ppar)
230 ppar |= msk;
231 if (iopc->psor)
232 psor |= msk;
233 if (iopc->pdir)
234 pdir |= msk;
235 if (iopc->podr)
236 podr |= msk;
237 if (iopc->pdat)
238 pdat |= msk;
239 if (iopc->pint)
240 pint |= msk;
241 }
242 msk <<= 1;
243 iopc++;
wdenkc6097192002-11-03 00:24:07 +0000244 }
245
wdenkbf9e3b32004-02-12 00:47:09 +0000246 PRINTF ("%s:%d:\n portnum=%d ", __FUNCTION__, __LINE__,
247 portnum);
wdenkc6097192002-11-03 00:24:07 +0000248#ifdef IOPORT_DEBUG
wdenkbf9e3b32004-02-12 00:47:09 +0000249 switch (portnum) {
250 case 0:
251 printf ("(A)\n");
252 break;
253 case 1:
254 printf ("(B)\n");
255 break;
256 case 2:
257 printf ("(C)\n");
258 break;
259 case 3:
260 printf ("(D)\n");
261 break;
262 default:
263 printf ("(?)\n");
264 break;
wdenkc6097192002-11-03 00:24:07 +0000265 }
266#endif
wdenkbf9e3b32004-02-12 00:47:09 +0000267 PRINTF (" ppar=0x%.8x pdir=0x%.8x podr=0x%.8x\n"
268 " pdat=0x%.8x psor=0x%.8x pint=0x%.8x pmsk=0x%.8x\n",
269 ppar, pdir, podr, pdat, psor, pint, pmsk);
wdenkc6097192002-11-03 00:24:07 +0000270
271 /*
272 * Have to handle the ioports on a port-by-port basis since there
273 * are three different flavors.
274 */
275 if (pmsk != 0) {
wdenkbf9e3b32004-02-12 00:47:09 +0000276 uint tpmsk = ~pmsk;
wdenkc6097192002-11-03 00:24:07 +0000277
wdenkbf9e3b32004-02-12 00:47:09 +0000278 if (0 == portnum) { /* port A */
279 immr->im_ioport.iop_papar &= tpmsk;
280 immr->im_ioport.iop_padat =
281 (immr->im_ioport.
282 iop_padat & tpmsk) | pdat;
283 immr->im_ioport.iop_padir =
284 (immr->im_ioport.
285 iop_padir & tpmsk) | pdir;
286 immr->im_ioport.iop_paodr =
287 (immr->im_ioport.
288 iop_paodr & tpmsk) | podr;
289 immr->im_ioport.iop_papar |= ppar;
290 } else if (1 == portnum) { /* port B */
291 immr->im_cpm.cp_pbpar &= tpmsk;
292 immr->im_cpm.cp_pbdat =
293 (immr->im_cpm.
294 cp_pbdat & tpmsk) | pdat;
295 immr->im_cpm.cp_pbdir =
296 (immr->im_cpm.
297 cp_pbdir & tpmsk) | pdir;
298 immr->im_cpm.cp_pbodr =
299 (immr->im_cpm.
300 cp_pbodr & tpmsk) | podr;
301 immr->im_cpm.cp_pbpar |= ppar;
302 } else if (2 == portnum) { /* port C */
303 immr->im_ioport.iop_pcpar &= tpmsk;
304 immr->im_ioport.iop_pcdat =
305 (immr->im_ioport.
306 iop_pcdat & tpmsk) | pdat;
307 immr->im_ioport.iop_pcdir =
308 (immr->im_ioport.
309 iop_pcdir & tpmsk) | pdir;
310 immr->im_ioport.iop_pcint =
311 (immr->im_ioport.
312 iop_pcint & tpmsk) | pint;
313 immr->im_ioport.iop_pcso =
314 (immr->im_ioport.
315 iop_pcso & tpmsk) | psor;
316 immr->im_ioport.iop_pcpar |= ppar;
317 } else if (3 == portnum) { /* port D */
318 immr->im_ioport.iop_pdpar &= tpmsk;
319 immr->im_ioport.iop_pddat =
320 (immr->im_ioport.
321 iop_pddat & tpmsk) | pdat;
322 immr->im_ioport.iop_pddir =
323 (immr->im_ioport.
324 iop_pddir & tpmsk) | pdir;
325 immr->im_ioport.iop_pdpar |= ppar;
wdenkc6097192002-11-03 00:24:07 +0000326 }
327 }
wdenkbf9e3b32004-02-12 00:47:09 +0000328 }
wdenkc6097192002-11-03 00:24:07 +0000329
wdenkbf9e3b32004-02-12 00:47:09 +0000330 PRINTF ("%s:%d: Port A:\n papar=0x%.4x padir=0x%.4x"
331 " paodr=0x%.4x\n padat=0x%.4x\n", __FUNCTION__, __LINE__,
332 immr->im_ioport.iop_papar, immr->im_ioport.iop_padir,
333 immr->im_ioport.iop_paodr, immr->im_ioport.iop_padat);
334 PRINTF ("%s:%d: Port B:\n pbpar=0x%.8x pbdir=0x%.8x"
335 " pbodr=0x%.8x\n pbdat=0x%.8x\n", __FUNCTION__, __LINE__,
336 immr->im_cpm.cp_pbpar, immr->im_cpm.cp_pbdir,
337 immr->im_cpm.cp_pbodr, immr->im_cpm.cp_pbdat);
338 PRINTF ("%s:%d: Port C:\n pcpar=0x%.4x pcdir=0x%.4x"
339 " pcdat=0x%.4x\n pcso=0x%.4x pcint=0x%.4x\n ",
340 __FUNCTION__, __LINE__, immr->im_ioport.iop_pcpar,
341 immr->im_ioport.iop_pcdir, immr->im_ioport.iop_pcdat,
342 immr->im_ioport.iop_pcso, immr->im_ioport.iop_pcint);
343 PRINTF ("%s:%d: Port D:\n pdpar=0x%.4x pddir=0x%.4x"
344 " pddat=0x%.4x\n", __FUNCTION__, __LINE__,
345 immr->im_ioport.iop_pdpar, immr->im_ioport.iop_pddir,
346 immr->im_ioport.iop_pddat);
wdenkc6097192002-11-03 00:24:07 +0000347}