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Dirk Eibach89b86192008-12-09 13:12:40 +01001/*
2 * (C) Copyright 2008
3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4 *
5 * Based on include/configs/yosemite.h
6 * (C) Copyright 2005-2007
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28/*
29 * gdppc440etx.h - configuration for G&D 440EP/GR ETX-Module
30 */
31#ifndef __CONFIG_H
32#define __CONFIG_H
33
34/*
35 * High Level Configuration Options
36 */
37#define CONFIG_440GR 1 /* Specific PPC440GR support */
38#define CONFIG_HOSTNAME gdppc440etx
39#define CONFIG_440 1 /* ... PPC440 family */
40#define CONFIG_4xx 1 /* ... PPC4xx family */
41#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
42
Wolfgang Denk2ae18242010-10-06 09:05:45 +020043#define CONFIG_SYS_TEXT_BASE 0xFFF80000
44
Dirk Eibach89b86192008-12-09 13:12:40 +010045/*
46 * Include common defines/options for all AMCC eval boards
47 */
48#include "amcc-common.h"
49
50#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f*/
51#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
52
Dirk Eibach996d88d2012-04-26 03:54:25 +000053#undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */
54#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
55#define CONFIG_AUTOBOOT_STOP_STR " "
56
Dirk Eibach89b86192008-12-09 13:12:40 +010057/*
58 * Base addresses -- Note these are effective addresses where the
59 * actual resources get mapped (not physical addresses)
60 */
61#define CONFIG_SYS_FLASH_BASE 0xfc000000 /* start of FLASH */
62#define CONFIG_SYS_PCI_MEMBASE 0xa0000000 /* mapped pci memory */
63#define CONFIG_SYS_PCI_MEMBASE1 CONFIG_SYS_PCI_MEMBASE + 0x10000000
64#define CONFIG_SYS_PCI_MEMBASE2 CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
65#define CONFIG_SYS_PCI_MEMBASE3 CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
66
67/*Don't change either of these*/
Dirk Eibach89b86192008-12-09 13:12:40 +010068#define CONFIG_SYS_PCI_BASE 0xe0000000 /* internal PCI regs */
69/*Don't change either of these*/
70
71#define CONFIG_SYS_USB_DEVICE 0x50000000
72#define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000
73
74/*
75 * Initial RAM & stack pointer (placed in SDRAM)
76 */
77#define CONFIG_SYS_INIT_RAM_DCACHE 1 /* d-cache as init ram*/
78#define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* DCache */
Wolfgang Denk553f0982010-10-26 13:32:32 +020079#define CONFIG_SYS_INIT_RAM_SIZE (4 << 10)
Wolfgang Denk553f0982010-10-26 13:32:32 +020080#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE \
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +020081 - GENERATED_GBL_DATA_SIZE)
Dirk Eibach89b86192008-12-09 13:12:40 +010082#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
83
84/*
85 * Serial Port
86 */
Stefan Roese550650d2010-09-20 16:05:31 +020087#define CONFIG_CONS_INDEX 2 /* Use UART1 */
88#define CONFIG_SYS_NS16550
89#define CONFIG_SYS_NS16550_SERIAL
90#define CONFIG_SYS_NS16550_REG_SIZE 1
91#define CONFIG_SYS_NS16550_CLK get_serial_clock()
Dirk Eibach89b86192008-12-09 13:12:40 +010092#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200 /* ext. 11.059MHz clk */
Dirk Eibach89b86192008-12-09 13:12:40 +010093
94/*
95 * Environment
96 * Define here the location of the environment variables (FLASH or EEPROM).
97 * Note: DENX encourages to use redundant environment in FLASH.
98 */
99#define CONFIG_ENV_IS_IN_FLASH 1 /* FLASH for env. vars*/
100
101/*
102 * FLASH related
103 */
104#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible*/
105#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
106#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* AMD RESET for STM 29W320DB!*/
107
108#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
109#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors/chip */
110
111#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout/Flash Erase (in ms)*/
112#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout/Flash Write (in ms)*/
113
114#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1/* use buffered writes (20x faster)*/
115
116#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
117
118#ifdef CONFIG_ENV_IS_IN_FLASH
119#define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector*/
120#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
121#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Env. Sector */
122
123/* Address and size of Redundant Environment Sector */
124#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
125#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
126#endif /* CONFIG_ENV_IS_IN_FLASH */
127
128/*
129 * DDR SDRAM
130 */
131#undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup*/
132#define CONFIG_SYS_KBYTES_SDRAM (128 * 1024) /* 128MB */
133#define CONFIG_SYS_SDRAM_BANKS (2)
134
135#define CONFIG_SDRAM_BANK0
136#define CONFIG_SDRAM_BANK1
137
138#define CONFIG_SYS_SDRAM0_TR0 0x410a4012
139#define CONFIG_SYS_SDRAM0_WDDCTR 0x40000000
140#define CONFIG_SYS_SDRAM0_RTR 0x04080000
141#define CONFIG_SYS_SDRAM0_CFG0 0x80000000
142
143#undef CONFIG_SDRAM_ECC
144
145/*
146 * I2C
147 */
148#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed+slave address*/
149
150/*
151 * Default environment variables
152 */
153#define CONFIG_EXTRA_ENV_SETTINGS \
154 CONFIG_AMCC_DEF_ENV \
155 CONFIG_AMCC_DEF_ENV_POWERPC \
156 CONFIG_AMCC_DEF_ENV_NOR_UPD \
157 "kernel_addr=fc000000\0" \
158 "ramdisk_addr=fc180000\0" \
159 ""
160
161#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
162#define CONFIG_PHY_ADDR 1
163#define CONFIG_PHY1_ADDR 3
164
165#ifdef DEBUG
166#define CONFIG_PANIC_HANG
167#endif
168
169/*
170 * Commands additional to the ones defined in amcc-common.h
171 */
172#define CONFIG_CMD_PCI
173#undef CONFIG_CMD_EEPROM
174
175/*
176 * PCI stuff
177 */
178
179/* General PCI */
180#define CONFIG_PCI /* include pci support */
181#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
182#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup*/
183#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to \
184 CONFIG_SYS_PCI_MEMBASE*/
185
186/* Board-specific PCI */
187#define CONFIG_SYS_PCI_TARGET_INIT
188#define CONFIG_SYS_PCI_MASTER_INIT
189
190#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
191#define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe /* tbd */
192
193/*
194 * External Bus Controller (EBC) Setup
195 */
196#define CONFIG_SYS_FLASH CONFIG_SYS_FLASH_BASE
197
198/* Memory Bank 0 (NOR-FLASH) initialization */
199#define CONFIG_SYS_EBC_PB0AP 0x03017200
200#define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_FLASH | 0xda000)
201
202#endif /* __CONFIG_H */