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Peter Pearse5ca98812007-11-09 15:24:26 +00001/*
Kyungmin Park8af657d2008-03-31 10:40:54 +09002 * (C) Copyright 2005-2008
Peter Pearse5ca98812007-11-09 15:24:26 +00003 * Samsung Electronics,
4 * Kyungmin Park <kyungmin.park@samsung.com>
5 *
6 * Configuration settings for the 2420 Samsung Apollon board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*
31 * High Level Configuration Options
32 */
33#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
34#define CONFIG_OMAP 1 /* in a TI OMAP core */
35#define CONFIG_OMAP2420 1 /* which is in a 2420 */
36#define CONFIG_OMAP2420_APOLLON 1
37#define CONFIG_APOLLON 1
38#define CONFIG_APOLLON_PLUS 1 /* If you have apollon plus 1.x */
39
Wolfgang Denka276db22011-12-09 12:14:27 +010040#define CONFIG_ONENAND_U_BOOT y
41
Peter Pearse5ca98812007-11-09 15:24:26 +000042/* Clock config to target*/
43#define PRCM_CONFIG_I 1
Wolfgang Denk435dc8f2008-01-09 11:36:21 +010044/* #define PRCM_CONFIG_II 1 */
Peter Pearse5ca98812007-11-09 15:24:26 +000045
46/* Boot method */
47/* uncomment if you use NOR boot */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020048/* #define CONFIG_SYS_NOR_BOOT 1 */
Peter Pearse5ca98812007-11-09 15:24:26 +000049
50/* uncomment if you use NOR on CS3 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020051/* #define CONFIG_SYS_USE_NOR 1 */
Peter Pearse5ca98812007-11-09 15:24:26 +000052
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053#ifdef CONFIG_SYS_NOR_BOOT
54#undef CONFIG_SYS_USE_NOR
55#define CONFIG_SYS_USE_NOR 1
Peter Pearse5ca98812007-11-09 15:24:26 +000056#endif
57
Kyungmin Park8000b082008-10-24 14:55:33 +020058/* uncommnet if you want to use UBI */
59#define CONFIG_SYS_USE_UBI
60
Peter Pearse5ca98812007-11-09 15:24:26 +000061#include <asm/arch/omap2420.h> /* get chip and board defs */
62
63#define V_SCLK 12000000
64
65/* input clock of PLL */
66/* the OMAP2420 H4 has 12MHz, 13MHz, or 19.2Mhz crystal input */
67#define CONFIG_SYS_CLK_FREQ V_SCLK
68
Peter Pearse5ca98812007-11-09 15:24:26 +000069#define CONFIG_MISC_INIT_R
70
71#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
72#define CONFIG_SETUP_MEMORY_TAGS 1
73#define CONFIG_INITRD_TAG 1
74#define CONFIG_REVISION_TAG 1
75
76/*
77 * Size of malloc() pool
78 */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020079#define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */
Amul Kumar Sahac758e942009-11-04 10:38:46 +053080#define CONFIG_ENV_SIZE_FLEX SZ_256K
Kyungmin Park8000b082008-10-24 14:55:33 +020081#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M)
Peter Pearse5ca98812007-11-09 15:24:26 +000082
83/*
84 * Hardware drivers
85 */
86
87/*
88 * SMC91c96 Etherent
89 */
Nishanth Menonac6b3622009-10-16 00:06:37 -050090#define CONFIG_LAN91C96
Peter Pearse5ca98812007-11-09 15:24:26 +000091#define CONFIG_LAN91C96_BASE (APOLLON_CS1_BASE+0x300)
92#define CONFIG_LAN91C96_EXT_PHY
93
94/*
95 * NS16550 Configuration
96 */
97#define V_NS16550_CLK (48000000) /* 48MHz (APLL96/2) */
98
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020099#define CONFIG_SYS_NS16550
100#define CONFIG_SYS_NS16550_SERIAL
101#define CONFIG_SYS_NS16550_REG_SIZE (-4)
102#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK /* 3MHz (1.5MHz*2) */
103#define CONFIG_SYS_NS16550_COM1 OMAP2420_UART1
Peter Pearse5ca98812007-11-09 15:24:26 +0000104
105/*
106 * select serial console configuration
107 */
108#define CONFIG_SERIAL1 1 /* UART1 on H4 */
109
Wolfgang Denk435dc8f2008-01-09 11:36:21 +0100110/* allow to overwrite serial and ethaddr */
Peter Pearse5ca98812007-11-09 15:24:26 +0000111#define CONFIG_ENV_OVERWRITE
112#define CONFIG_CONS_INDEX 1
113#define CONFIG_BAUDRATE 115200
Peter Pearse5ca98812007-11-09 15:24:26 +0000114
Wolfgang Denk435dc8f2008-01-09 11:36:21 +0100115/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
Peter Pearse5ca98812007-11-09 15:24:26 +0000116#include <config_cmd_default.h>
117
118#define CONFIG_CMD_DHCP
119#define CONFIG_CMD_DIAG
120#define CONFIG_CMD_ONENAND
121
Kyungmin Park8000b082008-10-24 14:55:33 +0200122#ifdef CONFIG_SYS_USE_UBI
123#define CONFIG_CMD_JFFS2
124#define CONFIG_CMD_UBI
125#define CONFIG_RBTREE
Stefan Roese942556a2009-05-12 14:32:58 +0200126#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Kyungmin Park8000b082008-10-24 14:55:33 +0200127#define CONFIG_MTD_PARTITIONS
128#endif
129
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200130#undef CONFIG_CMD_SOURCE
Peter Pearse5ca98812007-11-09 15:24:26 +0000131
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132#ifndef CONFIG_SYS_USE_NOR
Peter Pearse5ca98812007-11-09 15:24:26 +0000133# undef CONFIG_CMD_FLASH
134# undef CONFIG_CMD_IMLS
135#endif
136
137#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
138
139#define CONFIG_BOOTDELAY 1
140
141#define CONFIG_NETMASK 255.255.255.0
142#define CONFIG_IPADDR 192.168.116.25
143#define CONFIG_SERVERIP 192.168.116.1
144#define CONFIG_BOOTFILE "uImage"
145#define CONFIG_ETHADDR 00:0E:99:00:24:20
146
Kyungmin Park8000b082008-10-24 14:55:33 +0200147#ifdef CONFIG_APOLLON_PLUS
148#define CONFIG_SYS_MEM "mem=64M"
Peter Pearse5ca98812007-11-09 15:24:26 +0000149#else
Kyungmin Park8000b082008-10-24 14:55:33 +0200150#define CONFIG_SYS_MEM "mem=128"
Peter Pearse5ca98812007-11-09 15:24:26 +0000151#endif
152
Kyungmin Park8000b082008-10-24 14:55:33 +0200153#ifdef CONFIG_SYS_USE_UBI
154#define CONFIG_SYS_UBI "ubi.mtd=4"
155#else
156#define CONFIG_SYS_UBI ""
157#endif
158
159#define CONFIG_BOOTARGS "root=/dev/nfs rw " CONFIG_SYS_MEM \
160 " console=ttyS0,115200n8" \
161 " ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:" \
162 "apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2 " \
163 CONFIG_SYS_UBI
164
Peter Pearse5ca98812007-11-09 15:24:26 +0000165#define CONFIG_EXTRA_ENV_SETTINGS \
Peter Pearse2ae64f52007-11-15 08:58:00 +0000166 "Image=tftp 0x80008000 Image; go 0x80008000\0" \
167 "zImage=tftp 0x80180000 zImage; go 0x80180000\0" \
168 "uImage=tftp 0x80180000 uImage; bootm 0x80180000\0" \
169 "uboot=tftp 0x80008000 u-boot.bin; go 0x80008000\0" \
Kyungmin Park8000b082008-10-24 14:55:33 +0200170 "xloader=tftp 0x80180000 x-load.bin; " \
171 " cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \
Peter Pearse2ae64f52007-11-15 08:58:00 +0000172 "syncmode50=mw.w 0x1e442 0xc0c4; mw 0x6800a060 0xe30d1201\0" \
173 "syncmode=mw.w 0x1e442 0xe0f4; mw 0x6800a060 0xe30d1201\0" \
174 "norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0" \
Kyungmin Park8000b082008-10-24 14:55:33 +0200175 "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0" \
Peter Pearse5ca98812007-11-09 15:24:26 +0000176 "onesyncboot=run syncmode oneboot\0" \
Kyungmin Park8000b082008-10-24 14:55:33 +0200177 "updateb=tftp 0x80180000 u-boot-onenand.bin; " \
178 " onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \
179 "ubi=setenv bootargs ${bootargs} ubi.mtd=4 ${mtdparts}; run uImage\0" \
Peter Pearse5ca98812007-11-09 15:24:26 +0000180 "bootcmd=run uboot\0"
181
182/*
183 * Miscellaneous configurable options
184 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_LONGHELP /* undef to save memory */
Robert P. J. Day1270ec12009-12-12 12:10:33 -0500186#define CONFIG_SYS_PROMPT "Apollon # "
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Peter Pearse5ca98812007-11-09 15:24:26 +0000188/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
190#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
Kyungmin Park8000b082008-10-24 14:55:33 +0200191/* Boot Argument Buffer Size */
192#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
193/* memtest works on */
194#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195#define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M)
Peter Pearse5ca98812007-11-09 15:24:26 +0000196
Kyungmin Park8000b082008-10-24 14:55:33 +0200197/* default load address */
198#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0)
Peter Pearse5ca98812007-11-09 15:24:26 +0000199
Wolfgang Denk435dc8f2008-01-09 11:36:21 +0100200/* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2)
201 * or by 32KHz clk, or from external sig. This rate is divided by a local
Peter Pearse5ca98812007-11-09 15:24:26 +0000202 * divisor.
203 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200204#define CONFIG_SYS_TIMERBASE OMAP2420_GPT2
Ladislav Michl81472d82009-03-30 18:58:41 +0200205#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
206#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
Peter Pearse5ca98812007-11-09 15:24:26 +0000207
208/*-----------------------------------------------------------------------
Peter Pearse5ca98812007-11-09 15:24:26 +0000209 * Physical Memory Map
210 */
211#define CONFIG_NR_DRAM_BANKS 1 /* CS1 may or may not be populated */
212#define PHYS_SDRAM_1 OMAP2420_SDRC_CS0
213#define PHYS_SDRAM_1_SIZE SZ_128M
214#define PHYS_SDRAM_2 OMAP2420_SDRC_CS1
215
216/*-----------------------------------------------------------------------
217 * FLASH and environment organization
218 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200219#ifdef CONFIG_SYS_USE_NOR
Peter Pearse5ca98812007-11-09 15:24:26 +0000220/* OneNAND boot, NOR has CS3, But NOR has CS0 when NOR boot */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200221# define CONFIG_SYS_FLASH_BASE 0x18000000
222# define CONFIG_SYS_MAX_FLASH_BANKS 1
223# define CONFIG_SYS_MAX_FLASH_SECT 1024
Peter Pearse5ca98812007-11-09 15:24:26 +0000224/*-----------------------------------------------------------------------
Peter Pearse5ca98812007-11-09 15:24:26 +0000225 * CFI FLASH driver setup
226 */
Kyungmin Park8000b082008-10-24 14:55:33 +0200227/* Flash memory is CFI compliant */
228# define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200229# define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
Kyungmin Park8000b082008-10-24 14:55:33 +0200230/* Use buffered writes (~10x faster) */
231/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */
232/* Use h/w sector protection*/
233# define CONFIG_SYS_FLASH_PROTECTION 1
Peter Pearse5ca98812007-11-09 15:24:26 +0000234
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200235#else /* !CONFIG_SYS_USE_NOR */
236# define CONFIG_SYS_NO_FLASH 1
237#endif /* CONFIG_SYS_USE_NOR */
Peter Pearse5ca98812007-11-09 15:24:26 +0000238
239/* OneNAND boot, OneNAND has CS0, NOR boot ONeNAND has CS2 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200240#define CONFIG_SYS_ONENAND_BASE 0x00000000
Rohit Hagargundgi12a67532009-03-09 19:45:46 +0530241#define CONFIG_SYS_MONITOR_LEN SZ_256K /* U-Boot image size */
Jean-Christophe PLAGNIOL-VILLARD96561382008-09-10 22:47:59 +0200242#define CONFIG_ENV_IS_IN_ONENAND 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200243#define CONFIG_ENV_ADDR 0x00020000
Amul Kumar Sahac758e942009-11-04 10:38:46 +0530244#define CONFIG_ENV_ADDR_FLEX 0x00040000
Peter Pearse5ca98812007-11-09 15:24:26 +0000245
Kyungmin Park8000b082008-10-24 14:55:33 +0200246#ifdef CONFIG_SYS_USE_UBI
Stefan Roese68d7d652009-03-19 13:30:36 +0100247#define CONFIG_CMD_MTDPARTS
Kyungmin Park8000b082008-10-24 14:55:33 +0200248#define MTDIDS_DEFAULT "onenand0=onenand"
249#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(bootloader)," \
250 "128k(params)," \
251 "2m(kernel)," \
252 "16m(rootfs)," \
253 "32m(fs)," \
254 "-(ubifs)"
255#endif
256
Igor Grinberg0aeb01d2011-06-24 09:34:38 +0000257#define PHYS_SRAM 0x4020F800
258#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
259#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
260
Peter Pearse5ca98812007-11-09 15:24:26 +0000261#endif /* __CONFIG_H */