blob: d6c5744818404d30073bda0f3062b507c0284f9e [file] [log] [blame]
Dan Murphy2d2358a2013-08-26 08:54:52 -05001/*
2 * OMAP USB HOST xHCI Controller
3 *
4 * (C) Copyright 2013
5 * Texas Instruments, <www.ti.com>
6 *
7 * Author: Dan Murphy <dmurphy@ti.com>
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#include <common.h>
13#include <usb.h>
Masahiro Yamada5d97dff2016-09-21 11:28:57 +090014#include <linux/errno.h>
Dan Murphy2d2358a2013-08-26 08:54:52 -050015#include <asm/omap_common.h>
16#include <asm/arch/cpu.h>
17#include <asm/arch/sys_proto.h>
Dan Murphy2d2358a2013-08-26 08:54:52 -050018
19#include <linux/compat.h>
20#include <linux/usb/dwc3.h>
Dan Murphy41b667b2013-10-11 12:28:14 -050021#include <linux/usb/xhci-omap.h>
Dan Murphy2d2358a2013-08-26 08:54:52 -050022
23#include "xhci.h"
24
25/* Declare global data pointer */
26DECLARE_GLOBAL_DATA_PTR;
27
28static struct omap_xhci omap;
29
Uri Mashiach1a9a5f72017-02-23 15:39:37 +020030__weak int omap_xhci_board_usb_init(int index, enum usb_init_type init)
Dan Murphy2d2358a2013-08-26 08:54:52 -050031{
Uri Mashiach4acfe1a2017-02-23 15:39:38 +020032 enable_usb_clocks(index);
Dan Murphy2d2358a2013-08-26 08:54:52 -050033 return 0;
34}
Uri Mashiach1a9a5f72017-02-23 15:39:37 +020035
Troy Kisky7e575c42013-10-22 14:27:17 -070036int board_usb_init(int index, enum usb_init_type init)
Uri Mashiach1a9a5f72017-02-23 15:39:37 +020037{
38 return omap_xhci_board_usb_init(index, init);
39}
40
41__weak int omap_xhci_board_usb_cleanup(int index, enum usb_init_type init)
42{
Uri Mashiach4acfe1a2017-02-23 15:39:38 +020043 disable_usb_clocks(index);
Uri Mashiach1a9a5f72017-02-23 15:39:37 +020044 return 0;
45}
46
47int board_usb_cleanup(int index, enum usb_init_type init)
48{
49 return omap_xhci_board_usb_cleanup(index, init);
50}
Dan Murphy2d2358a2013-08-26 08:54:52 -050051
Dan Murphy2d2358a2013-08-26 08:54:52 -050052static int omap_xhci_core_init(struct omap_xhci *omap)
53{
54 int ret = 0;
55
Felipe Balbi26707d92014-06-23 16:25:38 -050056 usb_phy_power(1);
Dan Murphy834e91a2013-10-11 12:28:17 -050057 omap_enable_phy(omap);
Dan Murphy2d2358a2013-08-26 08:54:52 -050058
59 ret = dwc3_core_init(omap->dwc3_reg);
60 if (ret) {
61 debug("%s:failed to initialize core\n", __func__);
62 return ret;
63 }
64
65 /* We are hard-coding DWC3 core to Host Mode */
66 dwc3_set_mode(omap->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
67
68 return ret;
69}
70
71static void omap_xhci_core_exit(struct omap_xhci *omap)
72{
Dan Murphy834e91a2013-10-11 12:28:17 -050073 usb_phy_power(0);
Dan Murphy2d2358a2013-08-26 08:54:52 -050074}
75
76int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
77{
78 struct omap_xhci *ctx = &omap;
79 int ret = 0;
80
81 ctx->hcd = (struct xhci_hccr *)OMAP_XHCI_BASE;
82 ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
83 ctx->usb3_phy = (struct omap_usb3_phy *)OMAP_OCP1_SCP_BASE;
84 ctx->otg_wrapper = (struct omap_dwc_wrapper *)OMAP_OTG_WRAPPER_BASE;
85
Dan Murphyb2168212013-10-11 12:28:15 -050086 ret = board_usb_init(index, USB_INIT_HOST);
Dan Murphy2d2358a2013-08-26 08:54:52 -050087 if (ret != 0) {
88 puts("Failed to initialize board for USB\n");
89 return ret;
90 }
91
92 ret = omap_xhci_core_init(ctx);
93 if (ret < 0) {
94 puts("Failed to initialize xhci\n");
95 return ret;
96 }
97
98 *hccr = (struct xhci_hccr *)(OMAP_XHCI_BASE);
99 *hcor = (struct xhci_hcor *)((uint32_t) *hccr
100 + HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
101
102 debug("omap-xhci: init hccr %x and hcor %x hc_length %d\n",
103 (uint32_t)*hccr, (uint32_t)*hcor,
104 (uint32_t)HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)));
105
106 return ret;
107}
108
109void xhci_hcd_stop(int index)
110{
111 struct omap_xhci *ctx = &omap;
112
113 omap_xhci_core_exit(ctx);
Kishon Vijay Abraham If1811442015-08-19 13:49:47 +0530114 board_usb_cleanup(index, USB_INIT_HOST);
Dan Murphy2d2358a2013-08-26 08:54:52 -0500115}