maxims@google.com | 0753bc2 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 1 | menu "Watchdog Timer Support" |
Ye Li | 253531b | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 2 | |
Shreenidhi Shedi | 42537ca | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 3 | config WATCHDOG |
| 4 | bool "Enable U-Boot watchdog reset" |
Christophe Leroy | 7e00e90 | 2020-02-26 16:17:52 +0000 | [diff] [blame] | 5 | depends on !HW_WATCHDOG |
Shreenidhi Shedi | 42537ca | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 6 | help |
| 7 | This option enables U-Boot watchdog support where U-Boot is using |
| 8 | watchdog_reset function to service watchdog device in U-Boot. Enable |
| 9 | this option if you want to service enabled watchdog by U-Boot. Disable |
| 10 | this option if you want U-Boot to start watchdog but never service it. |
| 11 | |
Heiko Schocher | ca51ef7 | 2019-09-30 09:33:43 +0200 | [diff] [blame] | 12 | config WATCHDOG_TIMEOUT_MSECS |
| 13 | int "Watchdog timeout in msec" |
| 14 | default 128000 if ARCH_MX25 || ARCH_MX31 || ARCH_MX5 || ARCH_MX6 |
| 15 | default 128000 if ARCH_MX7 || ARCH_VF610 |
| 16 | default 30000 if ARCH_SOCFPGA |
| 17 | default 60000 |
| 18 | help |
| 19 | Watchdog timeout in msec |
| 20 | |
Paolo Pisati | 45a6d23 | 2017-02-10 17:28:05 +0100 | [diff] [blame] | 21 | config HW_WATCHDOG |
| 22 | bool |
| 23 | |
Xiaoliang Yang | da4918a | 2018-10-18 18:27:46 +0800 | [diff] [blame] | 24 | config WATCHDOG_RESET_DISABLE |
| 25 | bool "Disable reset watchdog" |
| 26 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 27 | Disable reset watchdog, which can let WATCHDOG_RESET invalid, so |
| 28 | that the watchdog will not be fed in u-boot. |
Xiaoliang Yang | da4918a | 2018-10-18 18:27:46 +0800 | [diff] [blame] | 29 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 30 | config IMX_WATCHDOG |
| 31 | bool "Enable Watchdog Timer support for IMX and LSCH2 of NXP" |
Marek Vasut | 4b969de | 2019-06-09 03:46:22 +0200 | [diff] [blame] | 32 | select HW_WATCHDOG if !WDT |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 33 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 34 | Select this to enable the IMX and LSCH2 of Layerscape watchdog |
| 35 | driver. |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 36 | |
Tom Rini | 897f706 | 2017-05-12 22:33:24 -0400 | [diff] [blame] | 37 | config OMAP_WATCHDOG |
| 38 | bool "TI OMAP watchdog driver" |
| 39 | depends on ARCH_OMAP2PLUS |
| 40 | select HW_WATCHDOG |
Tom Rini | 897f706 | 2017-05-12 22:33:24 -0400 | [diff] [blame] | 41 | help |
| 42 | Say Y here to enable the OMAP3+ watchdog driver. |
Felipe Balbi | 8f8a12d | 2017-07-05 20:33:20 +0300 | [diff] [blame] | 43 | |
Ye Li | 253531b | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 44 | config ULP_WATCHDOG |
| 45 | bool "i.MX7ULP watchdog" |
| 46 | help |
| 47 | Say Y here to enable i.MX7ULP watchdog driver. |
| 48 | |
Marek Vasut | 8941f84 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 49 | config DESIGNWARE_WATCHDOG |
| 50 | bool "Designware watchdog timer support" |
Marek Vasut | cf8c836 | 2019-06-27 01:19:23 +0200 | [diff] [blame] | 51 | select HW_WATCHDOG if !WDT |
Jagan Teki | 0a08a61 | 2020-04-20 23:34:13 +0530 | [diff] [blame] | 52 | default y if WDT && ROCKCHIP_RK3399 |
Marek Vasut | 8941f84 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 53 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 54 | Enable this to support Designware Watchdog Timer IP, present e.g. |
| 55 | on Altera SoCFPGA SoCs. |
Marek Vasut | 8941f84 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 56 | |
maxims@google.com | 0753bc2 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 57 | config WDT |
| 58 | bool "Enable driver model for watchdog timer drivers" |
| 59 | depends on DM |
Stefan Roese | 0698528 | 2019-04-11 15:58:44 +0200 | [diff] [blame] | 60 | imply WATCHDOG |
maxims@google.com | 0753bc2 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 61 | help |
| 62 | Enable driver model for watchdog timer. At the moment the API |
| 63 | is very simple and only supports four operations: |
Patrice Chotard | 8d4f91b | 2019-04-25 12:57:28 +0200 | [diff] [blame] | 64 | start, stop, reset and expire_now (expire immediately). |
maxims@google.com | 0753bc2 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 65 | What exactly happens when the timer expires is up to a particular |
| 66 | device/driver. |
| 67 | |
Marek Behún | 2b69a67 | 2018-04-24 17:21:30 +0200 | [diff] [blame] | 68 | config WDT_ARMADA_37XX |
| 69 | bool "Marvell Armada 37xx watchdog timer support" |
| 70 | depends on WDT && ARMADA_3700 |
| 71 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 72 | Enable this to support Watchdog Timer on Marvell Armada 37xx SoC. |
| 73 | There are 4 possible clocks which can be used on these SoCs. This |
| 74 | driver uses the second clock (ID 1), assuming that so will also |
| 75 | Linux's driver. |
Marek Behún | 2b69a67 | 2018-04-24 17:21:30 +0200 | [diff] [blame] | 76 | |
maxims@google.com | 1eb0a46 | 2017-04-17 12:00:22 -0700 | [diff] [blame] | 77 | config WDT_ASPEED |
| 78 | bool "Aspeed ast2400/ast2500 watchdog timer support" |
| 79 | depends on WDT |
| 80 | default y if ARCH_ASPEED |
| 81 | help |
| 82 | Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices. |
| 83 | The watchdog timer is stopped when initialized. It performs reset, either |
| 84 | full SoC reset or CPU or just some peripherals, based on the flags. |
| 85 | It currently does not support Boot Flash Addressing Mode Detection or |
| 86 | Second Boot. |
| 87 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 88 | config WDT_AT91 |
| 89 | bool "AT91 watchdog timer support" |
| 90 | depends on WDT |
| 91 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 92 | Select this to enable Microchip watchdog timer, which can be found on |
| 93 | some AT91 devices. |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 94 | |
Álvaro Fernández Rojas | 7733193 | 2017-05-16 18:29:09 +0200 | [diff] [blame] | 95 | config WDT_BCM6345 |
| 96 | bool "BCM6345 watchdog timer support" |
Philippe Reynes | d0edec6 | 2020-01-07 20:14:11 +0100 | [diff] [blame] | 97 | depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \ |
| 98 | ARCH_BCM6858 || ARCH_BCM63158) |
Álvaro Fernández Rojas | 7733193 | 2017-05-16 18:29:09 +0200 | [diff] [blame] | 99 | help |
| 100 | Select this to enable watchdog timer for BCM6345 SoCs. |
| 101 | The watchdog timer is stopped when initialized. |
| 102 | It performs full SoC reset. |
| 103 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 104 | config WDT_CDNS |
| 105 | bool "Cadence watchdog timer support" |
| 106 | depends on WDT |
| 107 | imply WATCHDOG |
| 108 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 109 | Select this to enable Cadence watchdog timer, which can be found on some |
| 110 | Xilinx Microzed Platform. |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 111 | |
Jason Li | 7f54b83 | 2020-01-30 12:34:57 -0800 | [diff] [blame] | 112 | config WDT_CORTINA |
| 113 | bool "Cortina Access CAxxxx watchdog timer support" |
| 114 | depends on WDT |
| 115 | help |
| 116 | Cortina Access CAxxxx watchdog timer support. |
| 117 | This driver support all CPU ISAs supported by Cortina |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 118 | Access CAxxxx SoCs. |
Jason Li | 7f54b83 | 2020-01-30 12:34:57 -0800 | [diff] [blame] | 119 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 120 | config WDT_MPC8xx |
| 121 | bool "MPC8xx watchdog timer support" |
| 122 | depends on WDT && MPC8xx |
Christophe Leroy | a682560 | 2020-02-20 07:39:51 +0000 | [diff] [blame] | 123 | select HW_WATCHDOG |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 124 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 125 | Select this to enable mpc8xx watchdog timer |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 126 | |
| 127 | config WDT_MT7621 |
| 128 | bool "MediaTek MT7621 watchdog timer support" |
| 129 | depends on WDT && SOC_MT7628 |
| 130 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 131 | Select this to enable Ralink / Mediatek watchdog timer, |
| 132 | which can be found on some MediaTek chips. |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 133 | |
| 134 | config WDT_MTK |
| 135 | bool "MediaTek watchdog timer support" |
| 136 | depends on WDT && ARCH_MEDIATEK |
| 137 | help |
| 138 | Select this to enable watchdog timer for MediaTek SoCs. |
| 139 | The watchdog timer is stopped when initialized. |
| 140 | It performs full SoC reset. |
| 141 | |
Suniel Mahesh | 7659ea3 | 2019-07-31 21:54:06 +0530 | [diff] [blame] | 142 | config WDT_OMAP3 |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 143 | bool "TI OMAP watchdog timer support" |
| 144 | depends on WDT && ARCH_OMAP2PLUS |
| 145 | default y if AM33XX |
| 146 | help |
Suniel Mahesh | 7659ea3 | 2019-07-31 21:54:06 +0530 | [diff] [blame] | 147 | This enables OMAP3+ watchdog timer driver, which can be |
| 148 | found on some TI chipsets and inline with driver model. |
| 149 | |
Marek Behún | 2ab7704 | 2017-06-09 19:28:41 +0200 | [diff] [blame] | 150 | config WDT_ORION |
| 151 | bool "Orion watchdog timer support" |
| 152 | depends on WDT |
Chris Packham | 8e427ba | 2019-02-18 10:30:53 +1300 | [diff] [blame] | 153 | select CLK |
Marek Behún | 2ab7704 | 2017-06-09 19:28:41 +0200 | [diff] [blame] | 154 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 155 | Select this to enable Orion watchdog timer, which can be found on some |
| 156 | Marvell Armada chips. |
Marek Behún | 2ab7704 | 2017-06-09 19:28:41 +0200 | [diff] [blame] | 157 | |
Patrice Chotard | b3134ff | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 158 | config WDT_SANDBOX |
| 159 | bool "Enable Watchdog Timer support for Sandbox" |
| 160 | depends on SANDBOX && WDT |
| 161 | help |
| 162 | Enable Watchdog Timer support in Sandbox. This is a dummy device that |
| 163 | can be probed and supports all of the methods of WDT, but does not |
| 164 | really do anything. |
| 165 | |
Zhao Qiang | f27d73e | 2020-07-10 16:55:18 +0800 | [diff] [blame^] | 166 | config WDT_SBSA |
| 167 | bool "SBSA watchdog timer support" |
| 168 | depends on WDT |
| 169 | help |
| 170 | Select this to enable SBSA watchdog timer. |
| 171 | This driver can operate ARM SBSA Generic Watchdog as a single stage. |
| 172 | In the single stage mode, when the timeout is reached, your system |
| 173 | will be reset by WS1. The first signal (WS0) is ignored. |
| 174 | |
Qiang Zhao | 0652d9f | 2019-05-07 03:16:09 +0000 | [diff] [blame] | 175 | config WDT_SP805 |
| 176 | bool "SP805 watchdog timer support" |
| 177 | depends on WDT |
| 178 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 179 | Select this to enable SP805 watchdog timer, which can be found on some |
| 180 | nxp layerscape chips. |
Qiang Zhao | 0652d9f | 2019-05-07 03:16:09 +0000 | [diff] [blame] | 181 | |
Patrice Chotard | 8c1007a | 2019-04-30 17:26:22 +0200 | [diff] [blame] | 182 | config WDT_STM32MP |
| 183 | bool "IWDG watchdog driver for STM32 MP's family" |
| 184 | depends on WDT |
| 185 | imply WATCHDOG |
| 186 | help |
| 187 | Enable the STM32 watchdog (IWDG) driver. Enable support to |
| 188 | configure STM32's on-SoC watchdog. |
| 189 | |
Shreenidhi Shedi | e0e9caa | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 190 | config XILINX_TB_WATCHDOG |
| 191 | bool "Xilinx Axi watchdog timer support" |
| 192 | depends on WDT |
| 193 | imply WATCHDOG |
| 194 | help |
Michal Simek | 92a19be | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 195 | Select this to enable Xilinx Axi watchdog timer, which can be found on some |
| 196 | Xilinx Microblaze Platforms. |
Shreenidhi Shedi | e0e9caa | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 197 | |
Ashok Reddy Soma | 5028358 | 2020-03-11 03:06:04 -0600 | [diff] [blame] | 198 | config WDT_XILINX |
| 199 | bool "Xilinx window watchdog timer support" |
| 200 | depends on WDT && ARCH_VERSAL |
| 201 | select REGMAP |
| 202 | imply WATCHDOG |
| 203 | help |
| 204 | Select this to enable Xilinx window watchdog timer, which can be found on |
| 205 | Xilinx Versal Platforms. |
| 206 | |
Andy Shevchenko | c974a3d | 2019-06-21 13:28:08 +0300 | [diff] [blame] | 207 | config WDT_TANGIER |
| 208 | bool "Intel Tangier watchdog timer support" |
| 209 | depends on WDT && INTEL_MID |
| 210 | help |
| 211 | This enables support for watchdog controller available on |
| 212 | Intel Tangier SoC. If you're using a board with Intel Tangier |
| 213 | SoC, say Y here. |
| 214 | |
Marek Vasut | 6874cb7 | 2019-06-09 03:46:21 +0200 | [diff] [blame] | 215 | config SPL_WDT |
| 216 | bool "Enable driver model for watchdog timer drivers in SPL" |
| 217 | depends on SPL_DM |
| 218 | help |
| 219 | Enable driver model for watchdog timer in SPL. |
| 220 | This is similar to CONFIG_WDT in U-Boot. |
| 221 | |
Ye Li | 253531b | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 222 | endmenu |