blob: 492062abb351c5ff38b56c42d574cd65c3e0e295 [file] [log] [blame]
Hideyuki Sano1a31ca42012-06-27 10:35:35 +09001/*
2 * Configuation settings for the bonito board
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Hideyuki Sano1a31ca42012-06-27 10:35:35 +09007 */
8
9#ifndef __ARMADILLO_800EVA_H
10#define __ARMADILLO_800EVA_H
11
12#undef DEBUG
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090013#define CONFIG_R8A7740
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +090014#define CONFIG_ARCH_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n"
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090015#define CONFIG_SH_GPIO_PFC
16
17#include <asm/arch/rmobile.h>
18
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090019#define CONFIG_CMD_SDRAM
Nobuhiro Iwamatsu09a3be02012-08-09 15:38:47 +090020
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090021#define BOARD_LATE_INIT
22
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090023#define CONFIG_BOOTARGS ""
24
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090025#undef CONFIG_SHOW_BOOT_PROGRESS
26
27#define CONFIG_ARCH_CPU_INIT
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090028#define CONFIG_TMU_TIMER
29#define CONFIG_SYS_DCACHE_OFF
30
31/* STACK */
32#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
33#define STACK_AREA_SIZE 0xC000
34#define LOW_LEVEL_MERAM_STACK \
35 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
36
37/* MEMORY */
38#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
39#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
40
41#define CONFIG_SYS_LONGHELP
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090042#define CONFIG_SYS_CBSIZE 256
43#define CONFIG_SYS_PBSIZE 256
44#define CONFIG_SYS_MAXARGS 16
45#define CONFIG_SYS_BARGSIZE 512
46#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
47
48/* SCIF */
49#define CONFIG_SCIF_CONSOLE
50#define CONFIG_CONS_SCIF1
51#define SCIF0_BASE 0xe6c40000
52#define SCIF1_BASE 0xe6c50000
53#define SCIF2_BASE 0xe6c60000
54#define SCIF4_BASE 0xe6c80000
55#define CONFIG_SCIF_A
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090056
57#define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE)
58#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
59 504 * 1024 * 1024)
60#undef CONFIG_SYS_ALT_MEMTEST
61#undef CONFIG_SYS_MEMTEST_SCRATCH
62#undef CONFIG_SYS_LOADS_BAUD_CHANGE
63
64#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
65#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
66#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
67 64 * 1024 * 1024)
68#define CONFIG_NR_DRAM_BANKS 1
69
70#define CONFIG_SYS_MONITOR_BASE 0x00000000
71#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
72#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090073#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
74#define CONFIG_SYS_TEXT_BASE 0xE80C0000
75
76/* FLASH */
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090077#define CONFIG_SYS_FLASH_CFI
78#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
79#define CONFIG_SYS_FLASH_BASE 0x00000000
80#define CONFIG_SYS_MAX_FLASH_SECT 512
81#define CONFIG_SYS_MAX_FLASH_BANKS 1
82#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
83
84#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
85#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
86#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
87#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
88
89/* ENV setting */
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090090#define CONFIG_ENV_OVERWRITE 1
91#define CONFIG_ENV_SECT_SIZE (128 * 1024)
92#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
93 CONFIG_SYS_MONITOR_LEN)
94#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
95#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
96#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
97
98/* SH Ether */
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090099#define CONFIG_SH_ETHER
100#define CONFIG_SH_ETHER_USE_PORT 0
101#define CONFIG_SH_ETHER_PHY_ADDR 0x0
102#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
103#define CONFIG_SH_ETHER_SH7734_MII (0x01)
104#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
105#define CONFIG_PHYLIB
106#define CONFIG_PHY_SMSC
107#define CONFIG_BITBANGMII
108#define CONFIG_BITBANGMII_MULTI
109
110/* Board Clock */
111#define CONFIG_SYS_CLK_FREQ 50000000
Nobuhiro Iwamatsu717ceb62013-09-30 10:30:41 +0900112#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
113#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Hideyuki Sano1a31ca42012-06-27 10:35:35 +0900114#define CONFIG_SYS_TMU_CLK_DIV 4
Hideyuki Sano1a31ca42012-06-27 10:35:35 +0900115
116#endif /* __ARMADILLO_800EVA_H */