stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001-2003 |
| 3 | * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/processor.h> |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 10 | #include <asm/io.h> |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 11 | #include <command.h> |
| 12 | #include <malloc.h> |
| 13 | |
Wolfgang Denk | d87080b | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 14 | DECLARE_GLOBAL_DATA_PTR; |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 15 | |
| 16 | extern void lxt971_no_sleep(void); |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 17 | |
stroese | 47b1e3d | 2005-03-01 17:26:39 +0000 | [diff] [blame] | 18 | int board_revision(void) |
| 19 | { |
| 20 | unsigned long osrl_reg; |
| 21 | unsigned long isr1l_reg; |
| 22 | unsigned long tcr_reg; |
| 23 | unsigned long value; |
| 24 | |
| 25 | /* |
| 26 | * Get version of HUB405 board from GPIO's |
| 27 | */ |
| 28 | |
| 29 | /* |
| 30 | * Setup GPIO pin(s) (IRQ6/GPIO23) |
| 31 | */ |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 32 | osrl_reg = in_be32((void *)GPIO0_OSRH); |
| 33 | isr1l_reg = in_be32((void *)GPIO0_ISR1H); |
| 34 | tcr_reg = in_be32((void *)GPIO0_TCR); |
| 35 | out_be32((void *)GPIO0_OSRH, osrl_reg & ~0x00030000); /* output select */ |
| 36 | out_be32((void *)GPIO0_ISR1H, isr1l_reg | 0x00030000); /* input select */ |
| 37 | out_be32((void *)GPIO0_TCR, tcr_reg & ~0x00000100); /* select input */ |
stroese | 47b1e3d | 2005-03-01 17:26:39 +0000 | [diff] [blame] | 38 | |
| 39 | udelay(1000); /* wait some time before reading input */ |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 40 | value = in_be32((void *)GPIO0_IR) & 0x00000100; /* get config bits */ |
stroese | 47b1e3d | 2005-03-01 17:26:39 +0000 | [diff] [blame] | 41 | |
| 42 | /* |
| 43 | * Restore GPIO settings |
| 44 | */ |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 45 | out_be32((void *)GPIO0_OSRH, osrl_reg); /* output select */ |
| 46 | out_be32((void *)GPIO0_ISR1H, isr1l_reg); /* input select */ |
| 47 | out_be32((void *)GPIO0_TCR, tcr_reg); /* enable output driver for outputs */ |
stroese | 47b1e3d | 2005-03-01 17:26:39 +0000 | [diff] [blame] | 48 | |
| 49 | if (value & 0x00000100) { |
| 50 | /* Revision 1.1 or 1.2 detected */ |
| 51 | return 1; |
| 52 | } |
| 53 | |
| 54 | /* Revision 1.0 */ |
| 55 | return 0; |
| 56 | } |
| 57 | |
| 58 | |
wdenk | c837dcb | 2004-01-20 23:12:12 +0000 | [diff] [blame] | 59 | int board_early_init_f (void) |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 60 | { |
| 61 | /* |
| 62 | * IRQ 0-15 405GP internally generated; active high; level sensitive |
| 63 | * IRQ 16 405GP internally generated; active low; level sensitive |
| 64 | * IRQ 17-24 RESERVED |
| 65 | * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive |
| 66 | * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive |
| 67 | * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive |
| 68 | * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive |
| 69 | * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive |
| 70 | * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive |
| 71 | * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive |
| 72 | */ |
Stefan Roese | 952e776 | 2009-09-24 09:55:50 +0200 | [diff] [blame] | 73 | mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ |
| 74 | mtdcr(UIC0ER, 0x00000000); /* disable all ints */ |
| 75 | mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/ |
| 76 | mtdcr(UIC0PR, 0xFFFFFF9F); /* set int polarities */ |
| 77 | mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */ |
| 78 | mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority*/ |
| 79 | mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */ |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 80 | |
| 81 | /* |
| 82 | * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us |
| 83 | */ |
Stefan Roese | d1c3b27 | 2009-09-09 16:25:29 +0200 | [diff] [blame] | 84 | mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */ |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 85 | |
| 86 | return 0; |
| 87 | } |
| 88 | |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 89 | #define LED_REG (DUART0_BA + 0x20) |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 90 | int misc_init_r (void) |
| 91 | { |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 92 | unsigned long val; |
| 93 | int delay, flashcnt; |
| 94 | char *str; |
stroese | 47b1e3d | 2005-03-01 17:26:39 +0000 | [diff] [blame] | 95 | char hw_rev[4]; |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 96 | |
| 97 | /* |
| 98 | * Enable interrupts in exar duart mcr[3] |
| 99 | */ |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 100 | out_8((void *)(DUART0_BA + 4), 0x08); |
| 101 | out_8((void *)(DUART1_BA + 4), 0x08); |
| 102 | out_8((void *)(DUART2_BA + 4), 0x08); |
| 103 | out_8((void *)(DUART3_BA + 4), 0x08); |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 104 | |
wdenk | efe2a4d | 2004-12-16 21:44:03 +0000 | [diff] [blame] | 105 | /* |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 106 | * Set RS232/RS422 control (RS232 = high on GPIO) |
| 107 | */ |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 108 | val = in_be32((void *)GPIO0_OR); |
| 109 | val &= ~(CONFIG_SYS_UART2_RS232 | CONFIG_SYS_UART3_RS232 | |
| 110 | CONFIG_SYS_UART4_RS232 | CONFIG_SYS_UART5_RS232); |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 111 | |
| 112 | str = getenv("phys0"); |
| 113 | if (!str || (str && (str[0] == '0'))) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 114 | val |= CONFIG_SYS_UART2_RS232; |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 115 | |
| 116 | str = getenv("phys1"); |
| 117 | if (!str || (str && (str[0] == '0'))) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 118 | val |= CONFIG_SYS_UART3_RS232; |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 119 | |
| 120 | str = getenv("phys2"); |
| 121 | if (!str || (str && (str[0] == '0'))) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 122 | val |= CONFIG_SYS_UART4_RS232; |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 123 | |
| 124 | str = getenv("phys3"); |
| 125 | if (!str || (str && (str[0] == '0'))) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 126 | val |= CONFIG_SYS_UART5_RS232; |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 127 | |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 128 | out_be32((void *)GPIO0_OR, val); |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 129 | |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 130 | /* |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 131 | * check board type and setup AP power |
| 132 | */ |
| 133 | str = getenv("bd_type"); /* this is only set on non prototype hardware */ |
| 134 | if (str != NULL) { |
stroese | 47b1e3d | 2005-03-01 17:26:39 +0000 | [diff] [blame] | 135 | if ((strcmp(str, "swch405") == 0) || ((!strcmp(str, "hub405") && (gd->board_type >= 1)))) { |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 136 | unsigned char led_reg_default = 0; |
| 137 | str = getenv("ap_pwr"); |
| 138 | if (!str || (str && (str[0] == '1'))) |
| 139 | led_reg_default = 0x04 | 0x02 ; /* U2_LED | AP_PWR */ |
| 140 | |
| 141 | /* |
stroese | 47b1e3d | 2005-03-01 17:26:39 +0000 | [diff] [blame] | 142 | * Flash LEDs |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 143 | */ |
| 144 | for (flashcnt = 0; flashcnt < 3; flashcnt++) { |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 145 | /* LED_A..D off */ |
| 146 | out_8((void *)LED_REG, led_reg_default); |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 147 | for (delay = 0; delay < 100; delay++) |
| 148 | udelay(1000); |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 149 | /* LED_A..D on */ |
| 150 | out_8((void *)LED_REG, led_reg_default | 0xf0); |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 151 | for (delay = 0; delay < 50; delay++) |
| 152 | udelay(1000); |
| 153 | } |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 154 | out_8((void *)LED_REG, led_reg_default); |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 155 | } |
| 156 | } |
| 157 | |
| 158 | /* |
| 159 | * Reset external DUARTs |
| 160 | */ |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 161 | out_be32((void *)GPIO0_OR, |
| 162 | in_be32((void *)GPIO0_OR) | CONFIG_SYS_DUART_RST); /* set reset to high */ |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 163 | udelay(10); /* wait 10us */ |
Matthias Fuchs | bb57ad4 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 164 | out_be32((void *)GPIO0_OR, |
| 165 | in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_DUART_RST); /* set reset to low */ |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 166 | udelay(1000); /* wait 1ms */ |
| 167 | |
stroese | 47b1e3d | 2005-03-01 17:26:39 +0000 | [diff] [blame] | 168 | /* |
| 169 | * Store hardware revision in environment for further processing |
| 170 | */ |
| 171 | sprintf(hw_rev, "1.%ld", gd->board_type); |
| 172 | setenv("hw_rev", hw_rev); |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 173 | return (0); |
| 174 | } |
| 175 | |
| 176 | |
| 177 | /* |
| 178 | * Check Board Identity: |
| 179 | */ |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 180 | int checkboard (void) |
| 181 | { |
Wolfgang Denk | 77ddac9 | 2005-10-13 16:45:02 +0200 | [diff] [blame] | 182 | char str[64]; |
Wolfgang Denk | cdb7497 | 2010-07-24 21:55:43 +0200 | [diff] [blame] | 183 | int i = getenv_f("serial#", str, sizeof(str)); |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 184 | |
| 185 | puts ("Board: "); |
| 186 | |
| 187 | if (i == -1) { |
| 188 | puts ("### No HW ID - assuming HUB405"); |
| 189 | } else { |
| 190 | puts(str); |
| 191 | } |
| 192 | |
Wolfgang Denk | cdb7497 | 2010-07-24 21:55:43 +0200 | [diff] [blame] | 193 | if (getenv_f("bd_type", str, sizeof(str)) != -1) { |
stroese | 47b1e3d | 2005-03-01 17:26:39 +0000 | [diff] [blame] | 194 | printf(" (%s", str); |
| 195 | } else { |
| 196 | puts(" (Missing bd_type!"); |
| 197 | } |
| 198 | |
| 199 | gd->board_type = board_revision(); |
| 200 | printf(", Rev 1.%ld)\n", gd->board_type); |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 201 | |
stroese | 31193c2 | 2004-12-16 18:37:08 +0000 | [diff] [blame] | 202 | /* |
| 203 | * Disable sleep mode in LXT971 |
| 204 | */ |
| 205 | lxt971_no_sleep(); |
| 206 | |
stroese | a65cb68 | 2003-09-12 08:41:39 +0000 | [diff] [blame] | 207 | return 0; |
| 208 | } |