Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2015 - 2016 Xilinx, Inc. |
| 4 | * |
| 5 | * Michal Simek <michal.simek@xilinx.com> |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Simon Glass | 4d72caa | 2020-05-10 11:40:01 -0600 | [diff] [blame] | 9 | #include <image.h> |
Simon Glass | 5255932 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 10 | #include <init.h> |
Simon Glass | f7ae49f | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 11 | #include <log.h> |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 12 | #include <spl.h> |
Simon Glass | c05ed00 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 13 | #include <linux/delay.h> |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 14 | |
| 15 | #include <asm/io.h> |
| 16 | #include <asm/spl.h> |
| 17 | #include <asm/arch/hardware.h> |
Michal Simek | e82024d | 2019-12-03 15:02:50 +0100 | [diff] [blame] | 18 | #include <asm/arch/psu_init_gpl.h> |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 19 | #include <asm/arch/sys_proto.h> |
| 20 | |
| 21 | void board_init_f(ulong dummy) |
| 22 | { |
Michal Simek | 55de092 | 2017-07-12 13:08:41 +0200 | [diff] [blame] | 23 | board_early_init_f(); |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 24 | board_early_init_r(); |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 25 | } |
| 26 | |
Michal Simek | 48255f5 | 2016-08-15 09:41:36 +0200 | [diff] [blame] | 27 | static void ps_mode_reset(ulong mode) |
| 28 | { |
Michal Simek | 48255f5 | 2016-08-15 09:41:36 +0200 | [diff] [blame] | 29 | writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT, |
| 30 | &crlapb_base->boot_pin_ctrl); |
| 31 | udelay(5); |
| 32 | writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT | |
| 33 | mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT, |
| 34 | &crlapb_base->boot_pin_ctrl); |
| 35 | } |
| 36 | |
| 37 | /* |
| 38 | * Set default PS_MODE1 which is used for USB ULPI phy reset |
| 39 | * Also other resets can be connected to this certain pin |
| 40 | */ |
| 41 | #ifndef MODE_RESET |
| 42 | # define MODE_RESET PS_MODE1 |
| 43 | #endif |
| 44 | |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 45 | #ifdef CONFIG_SPL_BOARD_INIT |
| 46 | void spl_board_init(void) |
| 47 | { |
| 48 | preloader_console_init(); |
Michal Simek | 48255f5 | 2016-08-15 09:41:36 +0200 | [diff] [blame] | 49 | ps_mode_reset(MODE_RESET); |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 50 | board_init(); |
Michal Simek | e82024d | 2019-12-03 15:02:50 +0100 | [diff] [blame] | 51 | psu_post_config_data(); |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 52 | } |
| 53 | #endif |
| 54 | |
Michal Simek | de79ca95 | 2019-12-09 13:00:57 +0100 | [diff] [blame] | 55 | void board_boot_order(u32 *spl_boot_list) |
| 56 | { |
| 57 | spl_boot_list[0] = spl_boot_device(); |
| 58 | |
| 59 | if (spl_boot_list[0] == BOOT_DEVICE_MMC1) |
| 60 | spl_boot_list[1] = BOOT_DEVICE_MMC2; |
| 61 | if (spl_boot_list[0] == BOOT_DEVICE_MMC2) |
| 62 | spl_boot_list[1] = BOOT_DEVICE_MMC1; |
Michal Simek | f1433d0 | 2020-03-11 15:00:51 +0100 | [diff] [blame] | 63 | |
| 64 | spl_boot_list[2] = BOOT_DEVICE_RAM; |
Michal Simek | de79ca95 | 2019-12-09 13:00:57 +0100 | [diff] [blame] | 65 | } |
| 66 | |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 67 | u32 spl_boot_device(void) |
| 68 | { |
| 69 | u32 reg = 0; |
| 70 | u8 bootmode; |
| 71 | |
Michal Simek | 7f491d7 | 2016-08-30 16:17:27 +0200 | [diff] [blame] | 72 | #if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED) |
| 73 | /* Change default boot mode at run-time */ |
Michal Simek | 47359a0 | 2016-10-25 11:43:02 +0200 | [diff] [blame] | 74 | writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT, |
Michal Simek | 7f491d7 | 2016-08-30 16:17:27 +0200 | [diff] [blame] | 75 | &crlapb_base->boot_mode); |
| 76 | #endif |
| 77 | |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 78 | reg = readl(&crlapb_base->boot_mode); |
Michal Simek | 47359a0 | 2016-10-25 11:43:02 +0200 | [diff] [blame] | 79 | if (reg >> BOOT_MODE_ALT_SHIFT) |
| 80 | reg >>= BOOT_MODE_ALT_SHIFT; |
| 81 | |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 82 | bootmode = reg & BOOT_MODES_MASK; |
| 83 | |
| 84 | switch (bootmode) { |
| 85 | case JTAG_MODE: |
| 86 | return BOOT_DEVICE_RAM; |
| 87 | #ifdef CONFIG_SPL_MMC_SUPPORT |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 88 | case SD_MODE1: |
Michal Simek | b0259c8 | 2017-03-02 11:02:55 +0100 | [diff] [blame] | 89 | case SD1_LSHFT_MODE: /* not working on silicon v1 */ |
Jean-Francois Dagenais | e3fdf5d | 2017-04-02 21:44:34 -0400 | [diff] [blame] | 90 | return BOOT_DEVICE_MMC2; |
Jean-Francois Dagenais | e3fdf5d | 2017-04-02 21:44:34 -0400 | [diff] [blame] | 91 | case SD_MODE: |
| 92 | case EMMC_MODE: |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 93 | return BOOT_DEVICE_MMC1; |
| 94 | #endif |
Andrew F. Davis | 6536ca4 | 2019-01-17 13:43:02 -0600 | [diff] [blame] | 95 | #ifdef CONFIG_SPL_DFU |
Michal Simek | d58fc12 | 2016-08-19 14:14:52 +0200 | [diff] [blame] | 96 | case USB_MODE: |
| 97 | return BOOT_DEVICE_DFU; |
| 98 | #endif |
Michal Simek | 2661081 | 2016-10-26 09:24:32 +0200 | [diff] [blame] | 99 | #ifdef CONFIG_SPL_SATA_SUPPORT |
| 100 | case SW_SATA_MODE: |
| 101 | return BOOT_DEVICE_SATA; |
| 102 | #endif |
Michal Simek | 40d1f8a | 2017-11-02 09:15:05 +0100 | [diff] [blame] | 103 | #ifdef CONFIG_SPL_SPI_SUPPORT |
| 104 | case QSPI_MODE_24BIT: |
| 105 | case QSPI_MODE_32BIT: |
| 106 | return BOOT_DEVICE_SPI; |
| 107 | #endif |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 108 | default: |
| 109 | printf("Invalid Boot Mode:0x%x\n", bootmode); |
| 110 | break; |
| 111 | } |
| 112 | |
| 113 | return 0; |
| 114 | } |
| 115 | |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 116 | #ifdef CONFIG_SPL_OS_BOOT |
| 117 | int spl_start_uboot(void) |
| 118 | { |
Michal Simek | e6a9ed0 | 2015-11-20 13:17:22 +0100 | [diff] [blame] | 119 | return 0; |
| 120 | } |
| 121 | #endif |