blob: c85dbcecfa739fb2b43a3e162ac5ed441c29cfca [file] [log] [blame]
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001/*-
2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
michaeldb632992008-12-10 17:55:19 +01003 * Copyright (c) 2008, Excito Elektronik i Skåne AB
Remy Böhmerc0d722f2008-12-13 22:51:58 +01004 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
5 *
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01006 * All rights reserved.
7 *
Simon Glasse62b5262015-07-06 16:47:42 -06008 * SPDX-License-Identifier: GPL-2.0
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01009 */
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010010#include <common.h>
Simon Glass46b01792015-03-25 12:22:29 -060011#include <dm.h>
Patrick Georgi8f62ca62013-03-06 14:08:31 +000012#include <errno.h>
michaeldb632992008-12-10 17:55:19 +010013#include <asm/byteorder.h>
Lucas Stach93ad9082012-09-06 08:00:13 +020014#include <asm/unaligned.h>
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010015#include <usb.h>
16#include <asm/io.h>
michaeldb632992008-12-10 17:55:19 +010017#include <malloc.h>
Simon Glasscf92e052015-09-02 17:24:58 -060018#include <memalign.h>
Stefan Roese67333f72010-11-26 15:43:28 +010019#include <watchdog.h>
Patrick Georgi8f62ca62013-03-06 14:08:31 +000020#include <linux/compiler.h>
Jean-Christophe PLAGNIOL-VILLARD2731b9a2009-04-03 12:46:58 +020021
22#include "ehci.h"
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010023
Lucas Stach676ae062012-09-26 00:14:35 +020024#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
25#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
26#endif
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010027
Julius Werner5077f962013-09-24 10:53:07 -070028/*
29 * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
30 * Let's time out after 8 to have a little safety margin on top of that.
31 */
32#define HCHALT_TIMEOUT (8 * 1000)
33
Simon Glass46b01792015-03-25 12:22:29 -060034#ifndef CONFIG_DM_USB
Marek Vasutb9596552013-07-10 03:16:31 +020035static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
Simon Glass46b01792015-03-25 12:22:29 -060036#endif
Tom Rini71c5de42012-07-15 22:14:24 +000037
38#define ALIGN_END_ADDR(type, ptr, size) \
Rob Herring98ae8402015-03-17 15:46:37 -050039 ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
Michael Trimarchiaaf098c2008-11-28 13:20:46 +010040
michaeldb632992008-12-10 17:55:19 +010041static struct descriptor {
42 struct usb_hub_descriptor hub;
43 struct usb_device_descriptor device;
44 struct usb_linux_config_descriptor config;
45 struct usb_linux_interface_descriptor interface;
46 struct usb_endpoint_descriptor endpoint;
47} __attribute__ ((packed)) descriptor = {
48 {
49 0x8, /* bDescLength */
50 0x29, /* bDescriptorType: hub descriptor */
51 2, /* bNrPorts -- runtime modified */
52 0, /* wHubCharacteristics */
Vincent Palatin5f4b4f22011-12-05 14:52:22 -080053 10, /* bPwrOn2PwrGood */
michaeldb632992008-12-10 17:55:19 +010054 0, /* bHubCntrCurrent */
55 {}, /* Device removable */
56 {} /* at most 7 ports! XXX */
57 },
58 {
59 0x12, /* bLength */
60 1, /* bDescriptorType: UDESC_DEVICE */
Sergei Shtylyov6d313c82010-02-27 21:29:42 +030061 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
michaeldb632992008-12-10 17:55:19 +010062 9, /* bDeviceClass: UDCLASS_HUB */
63 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
64 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
65 64, /* bMaxPacketSize: 64 bytes */
66 0x0000, /* idVendor */
67 0x0000, /* idProduct */
Sergei Shtylyov6d313c82010-02-27 21:29:42 +030068 cpu_to_le16(0x0100), /* bcdDevice */
michaeldb632992008-12-10 17:55:19 +010069 1, /* iManufacturer */
70 2, /* iProduct */
71 0, /* iSerialNumber */
72 1 /* bNumConfigurations: 1 */
73 },
74 {
75 0x9,
76 2, /* bDescriptorType: UDESC_CONFIG */
77 cpu_to_le16(0x19),
78 1, /* bNumInterface */
79 1, /* bConfigurationValue */
80 0, /* iConfiguration */
81 0x40, /* bmAttributes: UC_SELF_POWER */
82 0 /* bMaxPower */
83 },
84 {
85 0x9, /* bLength */
86 4, /* bDescriptorType: UDESC_INTERFACE */
87 0, /* bInterfaceNumber */
88 0, /* bAlternateSetting */
89 1, /* bNumEndpoints */
90 9, /* bInterfaceClass: UICLASS_HUB */
91 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
92 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
93 0 /* iInterface */
94 },
95 {
96 0x7, /* bLength */
97 5, /* bDescriptorType: UDESC_ENDPOINT */
98 0x81, /* bEndpointAddress:
99 * UE_DIR_IN | EHCI_INTR_ENDPT
100 */
101 3, /* bmAttributes: UE_INTERRUPT */
Tom Rix8f8bd562009-10-31 12:37:38 -0500102 8, /* wMaxPacketSize */
michaeldb632992008-12-10 17:55:19 +0100103 255 /* bInterval */
104 },
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100105};
106
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100107#if defined(CONFIG_EHCI_IS_TDI)
108#define ehci_is_TDI() (1)
109#else
110#define ehci_is_TDI() (0)
111#endif
112
Simon Glass24ed8942015-03-25 12:22:25 -0600113static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
114{
Simon Glass46b01792015-03-25 12:22:29 -0600115#ifdef CONFIG_DM_USB
Hans de Goede25c8ebd2015-05-05 11:54:33 +0200116 return dev_get_priv(usb_get_bus(udev->dev));
Simon Glass46b01792015-03-25 12:22:29 -0600117#else
Simon Glass24ed8942015-03-25 12:22:25 -0600118 return udev->controller;
Simon Glass46b01792015-03-25 12:22:29 -0600119#endif
Simon Glass24ed8942015-03-25 12:22:25 -0600120}
121
Simon Glassdeb85082015-03-25 12:22:27 -0600122static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
Jim Linb068deb2013-03-27 00:52:32 +0000123{
124 return PORTSC_PSPD(reg);
125}
126
Simon Glassdeb85082015-03-25 12:22:27 -0600127static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
Jim Linb068deb2013-03-27 00:52:32 +0000128{
129 uint32_t tmp;
130 uint32_t *reg_ptr;
131
Simon Glass11d18a12015-03-25 12:22:23 -0600132 reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
Jim Linb068deb2013-03-27 00:52:32 +0000133 tmp = ehci_readl(reg_ptr);
134 tmp |= USBMODE_CM_HC;
135#if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
136 tmp |= USBMODE_BE;
137#endif
138 ehci_writel(reg_ptr, tmp);
139}
140
Simon Glassdeb85082015-03-25 12:22:27 -0600141static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
Simon Glass727fce32015-03-25 12:22:21 -0600142 uint32_t *reg)
Marek Vasut3874b6d2011-07-11 02:37:01 +0200143{
144 mdelay(50);
145}
146
Simon Glassdeb85082015-03-25 12:22:27 -0600147static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
Simon Glassaac064f2015-03-25 12:22:17 -0600148{
149 if (port < 0 || port >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
150 /* Printing the message would cause a scan failure! */
151 debug("The request port(%u) is not configured\n", port);
152 return NULL;
153 }
154
Simon Glass6a1a8162015-03-25 12:22:24 -0600155 return (uint32_t *)&ctrl->hcor->or_portsc[port];
Simon Glassaac064f2015-03-25 12:22:17 -0600156}
157
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100158static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
michaeldb632992008-12-10 17:55:19 +0100159{
michael51ab1422008-12-11 13:43:55 +0100160 uint32_t result;
161 do {
162 result = ehci_readl(ptr);
Wolfgang Denk09c83a42010-10-22 14:23:00 +0200163 udelay(5);
michael51ab1422008-12-11 13:43:55 +0100164 if (result == ~(uint32_t)0)
165 return -1;
166 result &= mask;
167 if (result == done)
168 return 0;
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100169 usec--;
170 } while (usec > 0);
michael51ab1422008-12-11 13:43:55 +0100171 return -1;
172}
173
Simon Glassaeca43e2015-03-25 12:22:28 -0600174static int ehci_reset(struct ehci_ctrl *ctrl)
michael51ab1422008-12-11 13:43:55 +0100175{
176 uint32_t cmd;
michael51ab1422008-12-11 13:43:55 +0100177 int ret = 0;
178
Simon Glassaeca43e2015-03-25 12:22:28 -0600179 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Stefan Roese273d7202010-11-26 15:44:00 +0100180 cmd = (cmd & ~CMD_RUN) | CMD_RESET;
Simon Glassaeca43e2015-03-25 12:22:28 -0600181 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
182 ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
Lucas Stach676ae062012-09-26 00:14:35 +0200183 CMD_RESET, 0, 250 * 1000);
michael51ab1422008-12-11 13:43:55 +0100184 if (ret < 0) {
185 printf("EHCI fail to reset\n");
186 goto out;
187 }
188
Jim Linb068deb2013-03-27 00:52:32 +0000189 if (ehci_is_TDI())
Simon Glassaeca43e2015-03-25 12:22:28 -0600190 ctrl->ops.set_usb_mode(ctrl);
Simon Glass9ab4ce22012-02-27 10:52:47 +0000191
192#ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
Simon Glassaeca43e2015-03-25 12:22:28 -0600193 cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200194 cmd &= ~TXFIFO_THRESH_MASK;
Simon Glass9ab4ce22012-02-27 10:52:47 +0000195 cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
Simon Glassaeca43e2015-03-25 12:22:28 -0600196 ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
Simon Glass9ab4ce22012-02-27 10:52:47 +0000197#endif
michael51ab1422008-12-11 13:43:55 +0100198out:
199 return ret;
michaeldb632992008-12-10 17:55:19 +0100200}
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100201
Julius Werner5077f962013-09-24 10:53:07 -0700202static int ehci_shutdown(struct ehci_ctrl *ctrl)
203{
204 int i, ret = 0;
205 uint32_t cmd, reg;
206
Marek Vasut1e1be6d2013-12-14 02:03:11 +0100207 if (!ctrl || !ctrl->hcor)
208 return -EINVAL;
209
Julius Werner5077f962013-09-24 10:53:07 -0700210 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
211 cmd &= ~(CMD_PSE | CMD_ASE);
212 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
213 ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
214 100 * 1000);
215
216 if (!ret) {
217 for (i = 0; i < CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS; i++) {
218 reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
219 reg |= EHCI_PS_SUSP;
220 ehci_writel(&ctrl->hcor->or_portsc[i], reg);
221 }
222
223 cmd &= ~CMD_RUN;
224 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
225 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
226 HCHALT_TIMEOUT);
227 }
228
229 if (ret)
230 puts("EHCI failed to shut down host controller.\n");
231
232 return ret;
233}
234
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100235static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
236{
Marek Vasutb8adb122012-04-09 04:07:46 +0200237 uint32_t delta, next;
Rob Herring98ae8402015-03-17 15:46:37 -0500238 uint32_t addr = (unsigned long)buf;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100239 int idx;
240
Ilya Yanok189a6952012-07-15 04:43:49 +0000241 if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
Marek Vasutb8adb122012-04-09 04:07:46 +0200242 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
243
Ilya Yanok189a6952012-07-15 04:43:49 +0000244 flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
245
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100246 idx = 0;
Benoît Thébaudeaucdeb9162012-07-19 22:16:38 +0200247 while (idx < QT_BUFFER_CNT) {
michaeldb632992008-12-10 17:55:19 +0100248 td->qt_buffer[idx] = cpu_to_hc32(addr);
Wolfgang Denk3ed16072010-10-19 16:13:15 +0200249 td->qt_buffer_hi[idx] = 0;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200250 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100251 delta = next - addr;
252 if (delta >= sz)
253 break;
254 sz -= delta;
255 addr = next;
256 idx++;
257 }
258
Benoît Thébaudeaucdeb9162012-07-19 22:16:38 +0200259 if (idx == QT_BUFFER_CNT) {
Rob Herring98ae8402015-03-17 15:46:37 -0500260 printf("out of buffer pointers (%zu bytes left)\n", sz);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100261 return -1;
262 }
263
264 return 0;
265}
266
Ilya Yanokc60795f2012-11-06 13:48:20 +0000267static inline u8 ehci_encode_speed(enum usb_device_speed speed)
268{
269 #define QH_HIGH_SPEED 2
270 #define QH_FULL_SPEED 0
271 #define QH_LOW_SPEED 1
272 if (speed == USB_SPEED_HIGH)
273 return QH_HIGH_SPEED;
274 if (speed == USB_SPEED_LOW)
275 return QH_LOW_SPEED;
276 return QH_FULL_SPEED;
277}
278
Simon Glass46b01792015-03-25 12:22:29 -0600279static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
Hans de Goede4e2c4ad2014-09-20 16:51:22 +0200280 struct QH *qh)
281{
282 struct usb_device *ttdev;
Simon Glass46b01792015-03-25 12:22:29 -0600283 int parent_devnum;
Hans de Goede4e2c4ad2014-09-20 16:51:22 +0200284
Simon Glass46b01792015-03-25 12:22:29 -0600285 if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
Hans de Goede4e2c4ad2014-09-20 16:51:22 +0200286 return;
287
288 /*
289 * For full / low speed devices we need to get the devnum and portnr of
290 * the tt, so of the first upstream usb-2 hub, there may be usb-1 hubs
291 * in the tree before that one!
292 */
Simon Glass46b01792015-03-25 12:22:29 -0600293#ifdef CONFIG_DM_USB
Hans de Goedefcdd8aa2015-05-05 11:54:34 +0200294 /*
295 * When called from usb-uclass.c: usb_scan_device() udev->dev points
296 * to the parent udevice, not the actual udevice belonging to the
297 * udev as the device is not instantiated yet. So when searching
298 * for the first usb-2 parent start with udev->dev not
299 * udev->dev->parent .
300 */
Simon Glass46b01792015-03-25 12:22:29 -0600301 struct udevice *parent;
Hans de Goedefcdd8aa2015-05-05 11:54:34 +0200302 struct usb_device *uparent;
Simon Glass46b01792015-03-25 12:22:29 -0600303
Hans de Goedefcdd8aa2015-05-05 11:54:34 +0200304 ttdev = udev;
305 parent = udev->dev;
Simon Glassbcbe3d12015-09-28 23:32:01 -0600306 uparent = dev_get_parent_priv(parent);
Simon Glass46b01792015-03-25 12:22:29 -0600307
Hans de Goedefcdd8aa2015-05-05 11:54:34 +0200308 while (uparent->speed != USB_SPEED_HIGH) {
309 struct udevice *dev = parent;
310
311 if (device_get_uclass_id(dev->parent) != UCLASS_USB_HUB) {
Simon Glass19df0bc2015-07-06 16:47:41 -0600312 printf("ehci: Error cannot find high-speed parent of usb-1 device\n");
Simon Glass46b01792015-03-25 12:22:29 -0600313 return;
Hans de Goedefcdd8aa2015-05-05 11:54:34 +0200314 }
315
Simon Glassbcbe3d12015-09-28 23:32:01 -0600316 ttdev = dev_get_parent_priv(dev);
Hans de Goedefcdd8aa2015-05-05 11:54:34 +0200317 parent = dev->parent;
Simon Glassbcbe3d12015-09-28 23:32:01 -0600318 uparent = dev_get_parent_priv(parent);
Simon Glass46b01792015-03-25 12:22:29 -0600319 }
Hans de Goedefcdd8aa2015-05-05 11:54:34 +0200320 parent_devnum = uparent->devnum;
Simon Glass46b01792015-03-25 12:22:29 -0600321#else
322 ttdev = udev;
Hans de Goede4e2c4ad2014-09-20 16:51:22 +0200323 while (ttdev->parent && ttdev->parent->speed != USB_SPEED_HIGH)
324 ttdev = ttdev->parent;
325 if (!ttdev->parent)
326 return;
Simon Glass46b01792015-03-25 12:22:29 -0600327 parent_devnum = ttdev->parent->devnum;
328#endif
Hans de Goede4e2c4ad2014-09-20 16:51:22 +0200329
330 qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(ttdev->portnr) |
Simon Glass46b01792015-03-25 12:22:29 -0600331 QH_ENDPT2_HUBADDR(parent_devnum));
Hans de Goede4e2c4ad2014-09-20 16:51:22 +0200332}
333
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100334static int
335ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
336 int length, struct devrequest *req)
337{
Tom Rini71c5de42012-07-15 22:14:24 +0000338 ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200339 struct qTD *qtd;
340 int qtd_count = 0;
Marek Vasutde98e8b2012-04-08 23:32:05 +0200341 int qtd_counter = 0;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100342 volatile struct qTD *vtd;
343 unsigned long ts;
344 uint32_t *tdp;
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200345 uint32_t endpt, maxpacket, token, usbsts;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100346 uint32_t c, toggle;
michaeldb632992008-12-10 17:55:19 +0100347 uint32_t cmd;
Simon Glass96820a32011-02-07 14:42:16 -0800348 int timeout;
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100349 int ret = 0;
Simon Glass24ed8942015-03-25 12:22:25 -0600350 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100351
michaeldb632992008-12-10 17:55:19 +0100352 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100353 buffer, length, req);
354 if (req != NULL)
michaeldb632992008-12-10 17:55:19 +0100355 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100356 req->request, req->request,
357 req->requesttype, req->requesttype,
358 le16_to_cpu(req->value), le16_to_cpu(req->value),
michaeldb632992008-12-10 17:55:19 +0100359 le16_to_cpu(req->index));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100360
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200361#define PKT_ALIGN 512
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200362 /*
363 * The USB transfer is split into qTD transfers. Eeach qTD transfer is
364 * described by a transfer descriptor (the qTD). The qTDs form a linked
365 * list with a queue head (QH).
366 *
367 * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
368 * have its beginning in a qTD transfer and its end in the following
369 * one, so the qTD transfer lengths have to be chosen accordingly.
370 *
371 * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
372 * single pages. The first data buffer can start at any offset within a
373 * page (not considering the cache-line alignment issues), while the
374 * following buffers must be page-aligned. There is no alignment
375 * constraint on the size of a qTD transfer.
376 */
377 if (req != NULL)
378 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
379 qtd_count += 1 + 1;
380 if (length > 0 || req == NULL) {
381 /*
382 * Determine the qTD transfer size that will be used for the
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200383 * data payload (not considering the first qTD transfer, which
384 * may be longer or shorter, and the final one, which may be
385 * shorter).
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200386 *
387 * In order to keep each packet within a qTD transfer, the qTD
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200388 * transfer size is aligned to PKT_ALIGN, which is a multiple of
389 * wMaxPacketSize (except in some cases for interrupt transfers,
390 * see comment in submit_int_msg()).
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200391 *
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200392 * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200393 * QT_BUFFER_CNT full pages will be used.
394 */
395 int xfr_sz = QT_BUFFER_CNT;
396 /*
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200397 * However, if the input buffer is not aligned to PKT_ALIGN, the
398 * qTD transfer size will be one page shorter, and the first qTD
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200399 * data buffer of each transfer will be page-unaligned.
400 */
Rob Herring98ae8402015-03-17 15:46:37 -0500401 if ((unsigned long)buffer & (PKT_ALIGN - 1))
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200402 xfr_sz--;
403 /* Convert the qTD transfer size to bytes. */
404 xfr_sz *= EHCI_PAGE_SIZE;
405 /*
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200406 * Approximate by excess the number of qTDs that will be
407 * required for the data payload. The exact formula is way more
408 * complicated and saves at most 2 qTDs, i.e. a total of 128
409 * bytes.
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200410 */
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200411 qtd_count += 2 + length / xfr_sz;
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200412 }
413/*
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200414 * Threshold value based on the worst-case total size of the allocated qTDs for
415 * a mass-storage transfer of 65535 blocks of 512 bytes.
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200416 */
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200417#if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200418#warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
419#endif
420 qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
421 if (qtd == NULL) {
422 printf("unable to allocate TDs\n");
423 return -1;
424 }
425
Tom Rini71c5de42012-07-15 22:14:24 +0000426 memset(qh, 0, sizeof(struct QH));
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200427 memset(qtd, 0, qtd_count * sizeof(*qtd));
Marek Vasutde98e8b2012-04-08 23:32:05 +0200428
Marek Vasutb8adb122012-04-09 04:07:46 +0200429 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
430
Marek Vasut41b1f0a2012-04-09 04:13:00 +0200431 /*
432 * Setup QH (3.6 in ehci-r10.pdf)
433 *
434 * qh_link ................. 03-00 H
435 * qh_endpt1 ............... 07-04 H
436 * qh_endpt2 ............... 0B-08 H
437 * - qh_curtd
438 * qh_overlay.qt_next ...... 13-10 H
439 * - qh_overlay.qt_altnext
440 */
Rob Herring98ae8402015-03-17 15:46:37 -0500441 qh->qh_link = cpu_to_hc32((unsigned long)&ctrl->qh_list | QH_LINK_TYPE_QH);
Ilya Yanokc60795f2012-11-06 13:48:20 +0000442 c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200443 maxpacket = usb_maxpacket(dev, pipe);
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200444 endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200445 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200446 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
Ilya Yanokc60795f2012-11-06 13:48:20 +0000447 QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200448 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
449 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
Tom Rini71c5de42012-07-15 22:14:24 +0000450 qh->qh_endpt1 = cpu_to_hc32(endpt);
Hans de Goede4e2c4ad2014-09-20 16:51:22 +0200451 endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
Tom Rini71c5de42012-07-15 22:14:24 +0000452 qh->qh_endpt2 = cpu_to_hc32(endpt);
Hans de Goede4e2c4ad2014-09-20 16:51:22 +0200453 ehci_update_endpt2_dev_n_port(dev, qh);
Tom Rini71c5de42012-07-15 22:14:24 +0000454 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
Stephen Warren2456b972014-02-07 09:53:50 -0700455 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100456
Tom Rini71c5de42012-07-15 22:14:24 +0000457 tdp = &qh->qh_overlay.qt_next;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100458
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100459 if (req != NULL) {
Marek Vasut41b1f0a2012-04-09 04:13:00 +0200460 /*
461 * Setup request qTD (3.5 in ehci-r10.pdf)
462 *
463 * qt_next ................ 03-00 H
464 * qt_altnext ............. 07-04 H
465 * qt_token ............... 0B-08 H
466 *
467 * [ buffer, buffer_hi ] loaded with "req".
468 */
Marek Vasutde98e8b2012-04-08 23:32:05 +0200469 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
470 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200471 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
472 QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
473 QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
474 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
Marek Vasutde98e8b2012-04-08 23:32:05 +0200475 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200476 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
477 printf("unable to construct SETUP TD\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100478 goto fail;
479 }
Marek Vasut41b1f0a2012-04-09 04:13:00 +0200480 /* Update previous qTD! */
Rob Herring98ae8402015-03-17 15:46:37 -0500481 *tdp = cpu_to_hc32((unsigned long)&qtd[qtd_counter]);
Marek Vasutde98e8b2012-04-08 23:32:05 +0200482 tdp = &qtd[qtd_counter++].qt_next;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100483 toggle = 1;
484 }
485
486 if (length > 0 || req == NULL) {
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200487 uint8_t *buf_ptr = buffer;
488 int left_length = length;
489
490 do {
491 /*
492 * Determine the size of this qTD transfer. By default,
493 * QT_BUFFER_CNT full pages can be used.
494 */
495 int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
496 /*
497 * However, if the input buffer is not page-aligned, the
498 * portion of the first page before the buffer start
499 * offset within that page is unusable.
500 */
Rob Herring98ae8402015-03-17 15:46:37 -0500501 xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200502 /*
503 * In order to keep each packet within a qTD transfer,
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200504 * align the qTD transfer size to PKT_ALIGN.
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200505 */
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200506 xfr_bytes &= ~(PKT_ALIGN - 1);
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200507 /*
508 * This transfer may be shorter than the available qTD
509 * transfer size that has just been computed.
510 */
511 xfr_bytes = min(xfr_bytes, left_length);
512
513 /*
514 * Setup request qTD (3.5 in ehci-r10.pdf)
515 *
516 * qt_next ................ 03-00 H
517 * qt_altnext ............. 07-04 H
518 * qt_token ............... 0B-08 H
519 *
520 * [ buffer, buffer_hi ] loaded with "buffer".
521 */
522 qtd[qtd_counter].qt_next =
523 cpu_to_hc32(QT_NEXT_TERMINATE);
524 qtd[qtd_counter].qt_altnext =
525 cpu_to_hc32(QT_NEXT_TERMINATE);
526 token = QT_TOKEN_DT(toggle) |
527 QT_TOKEN_TOTALBYTES(xfr_bytes) |
528 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
529 QT_TOKEN_CERR(3) |
530 QT_TOKEN_PID(usb_pipein(pipe) ?
531 QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
532 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
533 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
534 if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
535 xfr_bytes)) {
536 printf("unable to construct DATA TD\n");
537 goto fail;
538 }
539 /* Update previous qTD! */
Rob Herring98ae8402015-03-17 15:46:37 -0500540 *tdp = cpu_to_hc32((unsigned long)&qtd[qtd_counter]);
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200541 tdp = &qtd[qtd_counter++].qt_next;
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200542 /*
543 * Data toggle has to be adjusted since the qTD transfer
544 * size is not always an even multiple of
545 * wMaxPacketSize.
546 */
547 if ((xfr_bytes / maxpacket) & 1)
548 toggle ^= 1;
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200549 buf_ptr += xfr_bytes;
550 left_length -= xfr_bytes;
551 } while (left_length > 0);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100552 }
553
554 if (req != NULL) {
Marek Vasut41b1f0a2012-04-09 04:13:00 +0200555 /*
556 * Setup request qTD (3.5 in ehci-r10.pdf)
557 *
558 * qt_next ................ 03-00 H
559 * qt_altnext ............. 07-04 H
560 * qt_token ............... 0B-08 H
561 */
Marek Vasutde98e8b2012-04-08 23:32:05 +0200562 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
563 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeaudb191342012-08-10 18:27:23 +0200564 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200565 QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
566 QT_TOKEN_PID(usb_pipein(pipe) ?
567 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
568 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
Marek Vasutde98e8b2012-04-08 23:32:05 +0200569 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
Marek Vasut41b1f0a2012-04-09 04:13:00 +0200570 /* Update previous qTD! */
Rob Herring98ae8402015-03-17 15:46:37 -0500571 *tdp = cpu_to_hc32((unsigned long)&qtd[qtd_counter]);
Marek Vasutde98e8b2012-04-08 23:32:05 +0200572 tdp = &qtd[qtd_counter++].qt_next;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100573 }
574
Rob Herring98ae8402015-03-17 15:46:37 -0500575 ctrl->qh_list.qh_link = cpu_to_hc32((unsigned long)qh | QH_LINK_TYPE_QH);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100576
Stefan Roesedaa2daf2009-01-21 17:12:19 +0100577 /* Flush dcache */
Rob Herring98ae8402015-03-17 15:46:37 -0500578 flush_dcache_range((unsigned long)&ctrl->qh_list,
Lucas Stach676ae062012-09-26 00:14:35 +0200579 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Rob Herring98ae8402015-03-17 15:46:37 -0500580 flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
581 flush_dcache_range((unsigned long)qtd,
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200582 ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
Stefan Roesedaa2daf2009-01-21 17:12:19 +0100583
Ilya Yanokc7701af2012-07-15 22:12:08 +0000584 /* Set async. queue head pointer. */
Rob Herring98ae8402015-03-17 15:46:37 -0500585 ehci_writel(&ctrl->hcor->or_asynclistaddr, (unsigned long)&ctrl->qh_list);
Ilya Yanokc7701af2012-07-15 22:12:08 +0000586
Lucas Stach676ae062012-09-26 00:14:35 +0200587 usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
588 ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100589
590 /* Enable async. schedule. */
Lucas Stach676ae062012-09-26 00:14:35 +0200591 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
michael51ab1422008-12-11 13:43:55 +0100592 cmd |= CMD_ASE;
Lucas Stach676ae062012-09-26 00:14:35 +0200593 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
michaeldb632992008-12-10 17:55:19 +0100594
Lucas Stach676ae062012-09-26 00:14:35 +0200595 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100596 100 * 1000);
597 if (ret < 0) {
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200598 printf("EHCI fail timeout STS_ASS set\n");
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100599 goto fail;
michael51ab1422008-12-11 13:43:55 +0100600 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100601
602 /* Wait for TDs to be processed. */
603 ts = get_timer(0);
Marek Vasutde98e8b2012-04-08 23:32:05 +0200604 vtd = &qtd[qtd_counter - 1];
Simon Glass96820a32011-02-07 14:42:16 -0800605 timeout = USB_TIMEOUT_MS(pipe);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100606 do {
Stefan Roesedaa2daf2009-01-21 17:12:19 +0100607 /* Invalidate dcache */
Rob Herring98ae8402015-03-17 15:46:37 -0500608 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
Lucas Stach676ae062012-09-26 00:14:35 +0200609 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Rob Herring98ae8402015-03-17 15:46:37 -0500610 invalidate_dcache_range((unsigned long)qh,
Tom Rini71c5de42012-07-15 22:14:24 +0000611 ALIGN_END_ADDR(struct QH, qh, 1));
Rob Herring98ae8402015-03-17 15:46:37 -0500612 invalidate_dcache_range((unsigned long)qtd,
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200613 ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
Marek Vasutb8adb122012-04-09 04:07:46 +0200614
michaeldb632992008-12-10 17:55:19 +0100615 token = hc32_to_cpu(vtd->qt_token);
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200616 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100617 break;
Stefan Roese67333f72010-11-26 15:43:28 +0100618 WATCHDOG_RESET();
Simon Glass96820a32011-02-07 14:42:16 -0800619 } while (get_timer(ts) < timeout);
620
Ilya Yanok189a6952012-07-15 04:43:49 +0000621 /*
622 * Invalidate the memory area occupied by buffer
623 * Don't try to fix the buffer alignment, if it isn't properly
624 * aligned it's upper layer's fault so let invalidate_dcache_range()
625 * vow about it. But we have to fix the length as it's actual
626 * transfer length and can be unaligned. This is potentially
627 * dangerous operation, it's responsibility of the calling
628 * code to make sure enough space is reserved.
629 */
Rob Herring98ae8402015-03-17 15:46:37 -0500630 invalidate_dcache_range((unsigned long)buffer,
631 ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
Marek Vasutb8adb122012-04-09 04:07:46 +0200632
Simon Glass96820a32011-02-07 14:42:16 -0800633 /* Check that the TD processing happened */
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200634 if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
Simon Glass96820a32011-02-07 14:42:16 -0800635 printf("EHCI timed out on TD - token=%#x\n", token);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100636
637 /* Disable async schedule. */
Lucas Stach676ae062012-09-26 00:14:35 +0200638 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
michaeldb632992008-12-10 17:55:19 +0100639 cmd &= ~CMD_ASE;
Lucas Stach676ae062012-09-26 00:14:35 +0200640 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
michael51ab1422008-12-11 13:43:55 +0100641
Lucas Stach676ae062012-09-26 00:14:35 +0200642 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100643 100 * 1000);
644 if (ret < 0) {
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200645 printf("EHCI fail timeout STS_ASS reset\n");
Michael Trimarchi1ed9f9a2008-12-31 10:33:22 +0100646 goto fail;
michael51ab1422008-12-11 13:43:55 +0100647 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100648
Tom Rini71c5de42012-07-15 22:14:24 +0000649 token = hc32_to_cpu(qh->qh_overlay.qt_token);
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200650 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)) {
michaeldb632992008-12-10 17:55:19 +0100651 debug("TOKEN=%#x\n", token);
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200652 switch (QT_TOKEN_GET_STATUS(token) &
653 ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100654 case 0:
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200655 toggle = QT_TOKEN_GET_DT(token);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100656 usb_settoggle(dev, usb_pipeendpoint(pipe),
657 usb_pipeout(pipe), toggle);
658 dev->status = 0;
659 break;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200660 case QT_TOKEN_STATUS_HALTED:
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100661 dev->status = USB_ST_STALLED;
662 break;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200663 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
664 case QT_TOKEN_STATUS_DATBUFERR:
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100665 dev->status = USB_ST_BUF_ERR;
666 break;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200667 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
668 case QT_TOKEN_STATUS_BABBLEDET:
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100669 dev->status = USB_ST_BABBLE_DET;
670 break;
671 default:
672 dev->status = USB_ST_CRC_ERR;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200673 if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_HALTED)
Anatolij Gustschin222d6df2010-11-02 11:47:29 +0100674 dev->status |= USB_ST_STALLED;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100675 break;
676 }
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200677 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(token);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100678 } else {
679 dev->act_len = 0;
Kuo-Jung Sue82a3162013-05-15 15:29:23 +0800680#ifndef CONFIG_USB_EHCI_FARADAY
michaeldb632992008-12-10 17:55:19 +0100681 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
Lucas Stach676ae062012-09-26 00:14:35 +0200682 dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
683 ehci_readl(&ctrl->hcor->or_portsc[0]),
684 ehci_readl(&ctrl->hcor->or_portsc[1]));
Kuo-Jung Sue82a3162013-05-15 15:29:23 +0800685#endif
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100686 }
687
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200688 free(qtd);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100689 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
690
691fail:
Benoît Thébaudeau5cec2142012-08-10 18:22:32 +0200692 free(qtd);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100693 return -1;
694}
695
Simon Glass24ed8942015-03-25 12:22:25 -0600696static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
697 void *buffer, int length, struct devrequest *req)
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100698{
699 uint8_t tmpbuf[4];
700 u16 typeReq;
michaeldb632992008-12-10 17:55:19 +0100701 void *srcptr = NULL;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100702 int len, srclen;
703 uint32_t reg;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100704 uint32_t *status_reg;
Julius Werner7d9aa8f2013-02-28 18:08:40 +0000705 int port = le16_to_cpu(req->index) & 0xff;
Simon Glass24ed8942015-03-25 12:22:25 -0600706 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100707
708 srclen = 0;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100709
michaeldb632992008-12-10 17:55:19 +0100710 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100711 req->request, req->request,
712 req->requesttype, req->requesttype,
713 le16_to_cpu(req->value), le16_to_cpu(req->index));
714
Prafulla Wadaskar44259bb2009-07-17 19:56:30 +0530715 typeReq = req->request | req->requesttype << 8;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100716
Prafulla Wadaskar44259bb2009-07-17 19:56:30 +0530717 switch (typeReq) {
Kuo-Jung Su9c6a9d72013-05-15 15:29:20 +0800718 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
719 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
720 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Simon Glassdeb85082015-03-25 12:22:27 -0600721 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
Kuo-Jung Su1dde1422013-05-15 15:29:21 +0800722 if (!status_reg)
Kuo-Jung Su9c6a9d72013-05-15 15:29:20 +0800723 return -1;
Kuo-Jung Su9c6a9d72013-05-15 15:29:20 +0800724 break;
725 default:
726 status_reg = NULL;
727 break;
728 }
729
730 switch (typeReq) {
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100731 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
732 switch (le16_to_cpu(req->value) >> 8) {
733 case USB_DT_DEVICE:
michaeldb632992008-12-10 17:55:19 +0100734 debug("USB_DT_DEVICE request\n");
735 srcptr = &descriptor.device;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200736 srclen = descriptor.device.bLength;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100737 break;
738 case USB_DT_CONFIG:
michaeldb632992008-12-10 17:55:19 +0100739 debug("USB_DT_CONFIG config\n");
740 srcptr = &descriptor.config;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200741 srclen = descriptor.config.bLength +
742 descriptor.interface.bLength +
743 descriptor.endpoint.bLength;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100744 break;
745 case USB_DT_STRING:
michaeldb632992008-12-10 17:55:19 +0100746 debug("USB_DT_STRING config\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100747 switch (le16_to_cpu(req->value) & 0xff) {
748 case 0: /* Language */
749 srcptr = "\4\3\1\0";
750 srclen = 4;
751 break;
752 case 1: /* Vendor */
753 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
754 srclen = 14;
755 break;
756 case 2: /* Product */
757 srcptr = "\52\3E\0H\0C\0I\0 "
758 "\0H\0o\0s\0t\0 "
759 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
760 srclen = 42;
761 break;
762 default:
michaeldb632992008-12-10 17:55:19 +0100763 debug("unknown value DT_STRING %x\n",
764 le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100765 goto unknown;
766 }
767 break;
768 default:
michaeldb632992008-12-10 17:55:19 +0100769 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100770 goto unknown;
771 }
772 break;
773 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
774 switch (le16_to_cpu(req->value) >> 8) {
775 case USB_DT_HUB:
michaeldb632992008-12-10 17:55:19 +0100776 debug("USB_DT_HUB config\n");
777 srcptr = &descriptor.hub;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200778 srclen = descriptor.hub.bLength;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100779 break;
780 default:
michaeldb632992008-12-10 17:55:19 +0100781 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100782 goto unknown;
783 }
784 break;
785 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
michaeldb632992008-12-10 17:55:19 +0100786 debug("USB_REQ_SET_ADDRESS\n");
Lucas Stach676ae062012-09-26 00:14:35 +0200787 ctrl->rootdev = le16_to_cpu(req->value);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100788 break;
789 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
michaeldb632992008-12-10 17:55:19 +0100790 debug("USB_REQ_SET_CONFIGURATION\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100791 /* Nothing to do */
792 break;
793 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
794 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
795 tmpbuf[1] = 0;
796 srcptr = tmpbuf;
797 srclen = 2;
798 break;
michaeldb632992008-12-10 17:55:19 +0100799 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100800 memset(tmpbuf, 0, 4);
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100801 reg = ehci_readl(status_reg);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100802 if (reg & EHCI_PS_CS)
803 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
804 if (reg & EHCI_PS_PE)
805 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
806 if (reg & EHCI_PS_SUSP)
807 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
808 if (reg & EHCI_PS_OCA)
809 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
Sergei Shtylyovc8b2d1d2010-02-27 21:33:21 +0300810 if (reg & EHCI_PS_PR)
811 tmpbuf[0] |= USB_PORT_STAT_RESET;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100812 if (reg & EHCI_PS_PP)
813 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
Stefan Roese597eb282009-01-21 17:12:01 +0100814
815 if (ehci_is_TDI()) {
Simon Glassdeb85082015-03-25 12:22:27 -0600816 switch (ctrl->ops.get_port_speed(ctrl, reg)) {
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200817 case PORTSC_PSPD_FS:
Stefan Roese597eb282009-01-21 17:12:01 +0100818 break;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200819 case PORTSC_PSPD_LS:
Stefan Roese597eb282009-01-21 17:12:01 +0100820 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
821 break;
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +0200822 case PORTSC_PSPD_HS:
Stefan Roese597eb282009-01-21 17:12:01 +0100823 default:
824 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
825 break;
826 }
827 } else {
828 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
829 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100830
831 if (reg & EHCI_PS_CSC)
832 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
833 if (reg & EHCI_PS_PEC)
834 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
835 if (reg & EHCI_PS_OCC)
836 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
Julius Werner7d9aa8f2013-02-28 18:08:40 +0000837 if (ctrl->portreset & (1 << port))
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100838 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100839
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100840 srcptr = tmpbuf;
841 srclen = 4;
842 break;
michaeldb632992008-12-10 17:55:19 +0100843 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100844 reg = ehci_readl(status_reg);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100845 reg &= ~EHCI_PS_CLEAR;
846 switch (le16_to_cpu(req->value)) {
michael51ab1422008-12-11 13:43:55 +0100847 case USB_PORT_FEAT_ENABLE:
848 reg |= EHCI_PS_PE;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100849 ehci_writel(status_reg, reg);
michael51ab1422008-12-11 13:43:55 +0100850 break;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100851 case USB_PORT_FEAT_POWER:
Lucas Stach676ae062012-09-26 00:14:35 +0200852 if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100853 reg |= EHCI_PS_PP;
854 ehci_writel(status_reg, reg);
855 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100856 break;
857 case USB_PORT_FEAT_RESET:
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100858 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
859 !ehci_is_TDI() &&
860 EHCI_PS_IS_LOWSPEED(reg)) {
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100861 /* Low speed device, give up ownership. */
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100862 debug("port %d low speed --> companion\n",
Julius Werner7d9aa8f2013-02-28 18:08:40 +0000863 port - 1);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100864 reg |= EHCI_PS_PO;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100865 ehci_writel(status_reg, reg);
Hans de Goede45b9ea12015-05-10 14:10:16 +0200866 return -ENXIO;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100867 } else {
Sergei Shtylyovc8b2d1d2010-02-27 21:33:21 +0300868 int ret;
869
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100870 reg |= EHCI_PS_PR;
871 reg &= ~EHCI_PS_PE;
872 ehci_writel(status_reg, reg);
873 /*
874 * caller must wait, then call GetPortStatus
875 * usb 2.0 specification say 50 ms resets on
876 * root
877 */
Simon Glassdeb85082015-03-25 12:22:27 -0600878 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
Marek Vasut3874b6d2011-07-11 02:37:01 +0200879
Chris Zhangb4161912010-01-06 13:34:04 -0800880 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
Sergei Shtylyovc8b2d1d2010-02-27 21:33:21 +0300881 /*
882 * A host controller must terminate the reset
883 * and stabilize the state of the port within
884 * 2 milliseconds
885 */
886 ret = handshake(status_reg, EHCI_PS_PR, 0,
887 2 * 1000);
Hans de Goede71b94522015-05-10 14:10:13 +0200888 if (!ret) {
889 reg = ehci_readl(status_reg);
890 if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
891 == EHCI_PS_CS && !ehci_is_TDI()) {
892 debug("port %d full speed --> companion\n", port - 1);
893 reg &= ~EHCI_PS_CLEAR;
894 reg |= EHCI_PS_PO;
895 ehci_writel(status_reg, reg);
Hans de Goede45b9ea12015-05-10 14:10:16 +0200896 return -ENXIO;
Hans de Goede71b94522015-05-10 14:10:13 +0200897 } else {
898 ctrl->portreset |= 1 << port;
899 }
900 } else {
Sergei Shtylyovc8b2d1d2010-02-27 21:33:21 +0300901 printf("port(%d) reset error\n",
Julius Werner7d9aa8f2013-02-28 18:08:40 +0000902 port - 1);
Hans de Goede71b94522015-05-10 14:10:13 +0200903 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100904 }
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100905 break;
Julius Werner7d9aa8f2013-02-28 18:08:40 +0000906 case USB_PORT_FEAT_TEST:
Julius Werner5077f962013-09-24 10:53:07 -0700907 ehci_shutdown(ctrl);
Julius Werner7d9aa8f2013-02-28 18:08:40 +0000908 reg &= ~(0xf << 16);
909 reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
910 ehci_writel(status_reg, reg);
911 break;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100912 default:
michaeldb632992008-12-10 17:55:19 +0100913 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100914 goto unknown;
915 }
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100916 /* unblock posted writes */
Lucas Stach676ae062012-09-26 00:14:35 +0200917 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100918 break;
michaeldb632992008-12-10 17:55:19 +0100919 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100920 reg = ehci_readl(status_reg);
Simon Glassed10e662013-05-10 19:49:00 -0700921 reg &= ~EHCI_PS_CLEAR;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100922 switch (le16_to_cpu(req->value)) {
923 case USB_PORT_FEAT_ENABLE:
924 reg &= ~EHCI_PS_PE;
925 break;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100926 case USB_PORT_FEAT_C_ENABLE:
Simon Glassed10e662013-05-10 19:49:00 -0700927 reg |= EHCI_PS_PE;
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100928 break;
929 case USB_PORT_FEAT_POWER:
Lucas Stach676ae062012-09-26 00:14:35 +0200930 if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
Simon Glassed10e662013-05-10 19:49:00 -0700931 reg &= ~EHCI_PS_PP;
932 break;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100933 case USB_PORT_FEAT_C_CONNECTION:
Simon Glassed10e662013-05-10 19:49:00 -0700934 reg |= EHCI_PS_CSC;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100935 break;
michael51ab1422008-12-11 13:43:55 +0100936 case USB_PORT_FEAT_OVER_CURRENT:
Simon Glassed10e662013-05-10 19:49:00 -0700937 reg |= EHCI_PS_OCC;
michael51ab1422008-12-11 13:43:55 +0100938 break;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100939 case USB_PORT_FEAT_C_RESET:
Julius Werner7d9aa8f2013-02-28 18:08:40 +0000940 ctrl->portreset &= ~(1 << port);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100941 break;
942 default:
michaeldb632992008-12-10 17:55:19 +0100943 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100944 goto unknown;
945 }
Remy Böhmerc0d722f2008-12-13 22:51:58 +0100946 ehci_writel(status_reg, reg);
947 /* unblock posted write */
Lucas Stach676ae062012-09-26 00:14:35 +0200948 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100949 break;
950 default:
michaeldb632992008-12-10 17:55:19 +0100951 debug("Unknown request\n");
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100952 goto unknown;
953 }
954
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000955 mdelay(1);
Masahiro Yamadab4141192014-11-07 03:03:31 +0900956 len = min3(srclen, (int)le16_to_cpu(req->length), length);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100957 if (srcptr != NULL && len > 0)
958 memcpy(buffer, srcptr, len);
michaeldb632992008-12-10 17:55:19 +0100959 else
960 debug("Len is 0\n");
961
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100962 dev->act_len = len;
963 dev->status = 0;
964 return 0;
965
966unknown:
michaeldb632992008-12-10 17:55:19 +0100967 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
Michael Trimarchiaaf098c2008-11-28 13:20:46 +0100968 req->requesttype, req->request, le16_to_cpu(req->value),
969 le16_to_cpu(req->index), le16_to_cpu(req->length));
970
971 dev->act_len = 0;
972 dev->status = USB_ST_STALLED;
973 return -1;
974}
975
Simon Glassdeb85082015-03-25 12:22:27 -0600976const struct ehci_ops default_ehci_ops = {
977 .set_usb_mode = ehci_set_usbmode,
978 .get_port_speed = ehci_get_port_speed,
979 .powerup_fixup = ehci_powerup_fixup,
980 .get_portsc_register = ehci_get_portsc_register,
981};
982
983static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
Simon Glassc4a31412015-03-25 12:22:19 -0600984{
Simon Glassdeb85082015-03-25 12:22:27 -0600985 if (!ops) {
986 ctrl->ops = default_ehci_ops;
987 } else {
988 ctrl->ops = *ops;
989 if (!ctrl->ops.set_usb_mode)
990 ctrl->ops.set_usb_mode = ehci_set_usbmode;
991 if (!ctrl->ops.get_port_speed)
992 ctrl->ops.get_port_speed = ehci_get_port_speed;
993 if (!ctrl->ops.powerup_fixup)
994 ctrl->ops.powerup_fixup = ehci_powerup_fixup;
995 if (!ctrl->ops.get_portsc_register)
996 ctrl->ops.get_portsc_register =
997 ehci_get_portsc_register;
998 }
999}
1000
Simon Glass46b01792015-03-25 12:22:29 -06001001#ifndef CONFIG_DM_USB
Simon Glassdeb85082015-03-25 12:22:27 -06001002void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
1003{
1004 struct ehci_ctrl *ctrl = &ehcic[index];
1005
1006 ctrl->priv = priv;
1007 ehci_setup_ops(ctrl, ops);
Simon Glassc4a31412015-03-25 12:22:19 -06001008}
1009
1010void *ehci_get_controller_priv(int index)
1011{
1012 return ehcic[index].priv;
1013}
Simon Glass46b01792015-03-25 12:22:29 -06001014#endif
Simon Glassc4a31412015-03-25 12:22:19 -06001015
Simon Glass7372b5b2015-03-25 12:22:26 -06001016static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001017{
Lucas Stach676ae062012-09-26 00:14:35 +02001018 struct QH *qh_list;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001019 struct QH *periodic;
Simon Glass7372b5b2015-03-25 12:22:26 -06001020 uint32_t reg;
1021 uint32_t cmd;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001022 int i;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001023
Vincent Palatin29828372012-12-12 17:55:22 -08001024 /* Set the high address word (aka segment) for 64-bit controller */
Simon Glass7372b5b2015-03-25 12:22:26 -06001025 if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1026 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
Stefan Roese832e6142009-01-21 17:12:10 +01001027
Simon Glass7372b5b2015-03-25 12:22:26 -06001028 qh_list = &ctrl->qh_list;
Lucas Stach676ae062012-09-26 00:14:35 +02001029
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001030 /* Set head of reclaim list */
Tom Rini71c5de42012-07-15 22:14:24 +00001031 memset(qh_list, 0, sizeof(*qh_list));
Rob Herring98ae8402015-03-17 15:46:37 -05001032 qh_list->qh_link = cpu_to_hc32((unsigned long)qh_list | QH_LINK_TYPE_QH);
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +02001033 qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1034 QH_ENDPT1_EPS(USB_SPEED_HIGH));
Tom Rini71c5de42012-07-15 22:14:24 +00001035 qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1036 qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau14eb79b2012-08-10 18:22:11 +02001037 qh_list->qh_overlay.qt_token =
1038 cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001039
Rob Herring98ae8402015-03-17 15:46:37 -05001040 flush_dcache_range((unsigned long)qh_list,
Stephen Warrend3e07472013-05-24 15:03:17 -06001041 ALIGN_END_ADDR(struct QH, qh_list, 1));
1042
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001043 /* Set async. queue head pointer. */
Simon Glass7372b5b2015-03-25 12:22:26 -06001044 ehci_writel(&ctrl->hcor->or_asynclistaddr, (unsigned long)qh_list);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001045
1046 /*
1047 * Set up periodic list
1048 * Step 1: Parent QH for all periodic transfers.
1049 */
Simon Glass7372b5b2015-03-25 12:22:26 -06001050 ctrl->periodic_schedules = 0;
1051 periodic = &ctrl->periodic_queue;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001052 memset(periodic, 0, sizeof(*periodic));
1053 periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1054 periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1055 periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1056
Rob Herring98ae8402015-03-17 15:46:37 -05001057 flush_dcache_range((unsigned long)periodic,
Stephen Warrend3e07472013-05-24 15:03:17 -06001058 ALIGN_END_ADDR(struct QH, periodic, 1));
1059
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001060 /*
1061 * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1062 * In particular, device specifications on polling frequency
1063 * are disregarded. Keyboards seem to send NAK/NYet reliably
1064 * when polled with an empty buffer.
1065 *
1066 * Split Transactions will be spread across microframes using
1067 * S-mask and C-mask.
1068 */
Simon Glass7372b5b2015-03-25 12:22:26 -06001069 if (ctrl->periodic_list == NULL)
1070 ctrl->periodic_list = memalign(4096, 1024 * 4);
Nikita Kiryanov8bc36032013-07-29 13:27:40 +03001071
Simon Glass7372b5b2015-03-25 12:22:26 -06001072 if (!ctrl->periodic_list)
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001073 return -ENOMEM;
1074 for (i = 0; i < 1024; i++) {
Simon Glass7372b5b2015-03-25 12:22:26 -06001075 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
Adrian Coxea427772014-04-10 13:29:45 +01001076 | QH_LINK_TYPE_QH);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001077 }
1078
Simon Glass7372b5b2015-03-25 12:22:26 -06001079 flush_dcache_range((unsigned long)ctrl->periodic_list,
1080 ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
Stephen Warrend3e07472013-05-24 15:03:17 -06001081 1024));
1082
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001083 /* Set periodic list base address */
Simon Glass7372b5b2015-03-25 12:22:26 -06001084 ehci_writel(&ctrl->hcor->or_periodiclistbase,
1085 (unsigned long)ctrl->periodic_list);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001086
Simon Glass7372b5b2015-03-25 12:22:26 -06001087 reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
michael51ab1422008-12-11 13:43:55 +01001088 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
Lucas Stach7a46b2c2012-09-28 00:26:19 +02001089 debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
Remy Böhmerc0d722f2008-12-13 22:51:58 +01001090 /* Port Indicators */
1091 if (HCS_INDICATOR(reg))
Lucas Stach93ad9082012-09-06 08:00:13 +02001092 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1093 | 0x80, &descriptor.hub.wHubCharacteristics);
Remy Böhmerc0d722f2008-12-13 22:51:58 +01001094 /* Port Power Control */
1095 if (HCS_PPC(reg))
Lucas Stach93ad9082012-09-06 08:00:13 +02001096 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1097 | 0x01, &descriptor.hub.wHubCharacteristics);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001098
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001099 /* Start the host controller. */
Simon Glass7372b5b2015-03-25 12:22:26 -06001100 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Wolfgang Denkf15c6512009-02-12 00:08:39 +01001101 /*
1102 * Philips, Intel, and maybe others need CMD_RUN before the
1103 * root hub will detect new devices (why?); NEC doesn't
1104 */
michael51ab1422008-12-11 13:43:55 +01001105 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1106 cmd |= CMD_RUN;
Simon Glass7372b5b2015-03-25 12:22:26 -06001107 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
michael51ab1422008-12-11 13:43:55 +01001108
Simon Glass7372b5b2015-03-25 12:22:26 -06001109 if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1110 /* take control over the ports */
1111 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1112 cmd |= FLAG_CF;
1113 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1114 }
Kuo-Jung Sue82a3162013-05-15 15:29:23 +08001115
Remy Böhmerc0d722f2008-12-13 22:51:58 +01001116 /* unblock posted write */
Simon Glass7372b5b2015-03-25 12:22:26 -06001117 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Mike Frysinger5b84dd62012-03-05 13:47:00 +00001118 mdelay(5);
Simon Glass7372b5b2015-03-25 12:22:26 -06001119 reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
Remy Böhmerc0d722f2008-12-13 22:51:58 +01001120 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001121
Simon Glass7372b5b2015-03-25 12:22:26 -06001122 return 0;
1123}
1124
Simon Glass46b01792015-03-25 12:22:29 -06001125#ifndef CONFIG_DM_USB
Simon Glass7372b5b2015-03-25 12:22:26 -06001126int usb_lowlevel_stop(int index)
1127{
1128 ehci_shutdown(&ehcic[index]);
1129 return ehci_hcd_stop(index);
1130}
1131
1132int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1133{
1134 struct ehci_ctrl *ctrl = &ehcic[index];
1135 uint tweaks = 0;
1136 int rc;
1137
Simon Glassdeb85082015-03-25 12:22:27 -06001138 /**
1139 * Set ops to default_ehci_ops, ehci_hcd_init should call
1140 * ehci_set_controller_priv to change any of these function pointers.
1141 */
1142 ctrl->ops = default_ehci_ops;
1143
Simon Glass7372b5b2015-03-25 12:22:26 -06001144 rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1145 if (rc)
1146 return rc;
1147 if (init == USB_INIT_DEVICE)
1148 goto done;
1149
1150 /* EHCI spec section 4.1 */
Simon Glassaeca43e2015-03-25 12:22:28 -06001151 if (ehci_reset(ctrl))
Simon Glass7372b5b2015-03-25 12:22:26 -06001152 return -1;
1153
1154#if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1155 rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1156 if (rc)
1157 return rc;
1158#endif
1159#ifdef CONFIG_USB_EHCI_FARADAY
1160 tweaks |= EHCI_TWEAK_NO_INIT_CF;
1161#endif
1162 rc = ehci_common_init(ctrl, tweaks);
1163 if (rc)
1164 return rc;
1165
1166 ctrl->rootdev = 0;
Troy Kisky127efc42013-10-10 15:27:57 -07001167done:
Lucas Stach676ae062012-09-26 00:14:35 +02001168 *controller = &ehcic[index];
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001169 return 0;
1170}
Simon Glass46b01792015-03-25 12:22:29 -06001171#endif
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001172
Simon Glass24ed8942015-03-25 12:22:25 -06001173static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1174 void *buffer, int length)
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001175{
1176
1177 if (usb_pipetype(pipe) != PIPE_BULK) {
1178 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1179 return -1;
1180 }
1181 return ehci_submit_async(dev, pipe, buffer, length, NULL);
1182}
1183
Simon Glass24ed8942015-03-25 12:22:25 -06001184static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1185 void *buffer, int length,
1186 struct devrequest *setup)
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001187{
Simon Glass24ed8942015-03-25 12:22:25 -06001188 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001189
1190 if (usb_pipetype(pipe) != PIPE_CONTROL) {
1191 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1192 return -1;
1193 }
1194
Lucas Stach676ae062012-09-26 00:14:35 +02001195 if (usb_pipedevice(pipe) == ctrl->rootdev) {
1196 if (!ctrl->rootdev)
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001197 dev->speed = USB_SPEED_HIGH;
1198 return ehci_submit_root(dev, pipe, buffer, length, setup);
1199 }
1200 return ehci_submit_async(dev, pipe, buffer, length, setup);
1201}
1202
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001203struct int_queue {
Hans de Goede8aa26b82014-09-24 14:06:05 +02001204 int elementsize;
Hans de Goede7f59d162015-06-18 22:34:33 +02001205 unsigned long pipe;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001206 struct QH *first;
1207 struct QH *current;
1208 struct QH *last;
1209 struct qTD *tds;
1210};
1211
Rob Herring98ae8402015-03-17 15:46:37 -05001212#define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001213
1214static int
1215enable_periodic(struct ehci_ctrl *ctrl)
1216{
1217 uint32_t cmd;
1218 struct ehci_hcor *hcor = ctrl->hcor;
1219 int ret;
1220
1221 cmd = ehci_readl(&hcor->or_usbcmd);
1222 cmd |= CMD_PSE;
1223 ehci_writel(&hcor->or_usbcmd, cmd);
1224
1225 ret = handshake((uint32_t *)&hcor->or_usbsts,
1226 STS_PSS, STS_PSS, 100 * 1000);
1227 if (ret < 0) {
1228 printf("EHCI failed: timeout when enabling periodic list\n");
1229 return -ETIMEDOUT;
1230 }
1231 udelay(1000);
1232 return 0;
1233}
1234
1235static int
1236disable_periodic(struct ehci_ctrl *ctrl)
1237{
1238 uint32_t cmd;
1239 struct ehci_hcor *hcor = ctrl->hcor;
1240 int ret;
1241
1242 cmd = ehci_readl(&hcor->or_usbcmd);
1243 cmd &= ~CMD_PSE;
1244 ehci_writel(&hcor->or_usbcmd, cmd);
1245
1246 ret = handshake((uint32_t *)&hcor->or_usbsts,
1247 STS_PSS, 0, 100 * 1000);
1248 if (ret < 0) {
1249 printf("EHCI failed: timeout when disabling periodic list\n");
1250 return -ETIMEDOUT;
1251 }
1252 return 0;
1253}
1254
Hans de Goede029fd8e2015-05-11 20:43:52 +02001255static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1256 unsigned long pipe, int queuesize, int elementsize,
1257 void *buffer, int interval)
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001258{
Simon Glass24ed8942015-03-25 12:22:25 -06001259 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001260 struct int_queue *result = NULL;
Hans de Goede7f59d162015-06-18 22:34:33 +02001261 uint32_t i, toggle;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001262
Hans de Goedebd818d82014-09-24 14:06:04 +02001263 /*
1264 * Interrupt transfers requiring several transactions are not supported
1265 * because bInterval is ignored.
1266 *
1267 * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1268 * <= PKT_ALIGN if several qTDs are required, while the USB
1269 * specification does not constrain this for interrupt transfers. That
1270 * means that ehci_submit_async() would support interrupt transfers
1271 * requiring several transactions only as long as the transfer size does
1272 * not require more than a single qTD.
1273 */
1274 if (elementsize > usb_maxpacket(dev, pipe)) {
1275 printf("%s: xfers requiring several transactions are not supported.\n",
1276 __func__);
1277 return NULL;
1278 }
1279
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001280 debug("Enter create_int_queue\n");
1281 if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1282 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1283 return NULL;
1284 }
1285
1286 /* limit to 4 full pages worth of data -
1287 * we can safely fit them in a single TD,
1288 * no matter the alignment
1289 */
1290 if (elementsize >= 16384) {
1291 debug("too large elements for interrupt transfers\n");
1292 return NULL;
1293 }
1294
1295 result = malloc(sizeof(*result));
1296 if (!result) {
1297 debug("ehci intr queue: out of memory\n");
1298 goto fail1;
1299 }
Hans de Goede8aa26b82014-09-24 14:06:05 +02001300 result->elementsize = elementsize;
Hans de Goede7f59d162015-06-18 22:34:33 +02001301 result->pipe = pipe;
Stephen Warren8165e342014-02-06 13:13:06 -07001302 result->first = memalign(USB_DMA_MINALIGN,
1303 sizeof(struct QH) * queuesize);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001304 if (!result->first) {
1305 debug("ehci intr queue: out of memory\n");
1306 goto fail2;
1307 }
1308 result->current = result->first;
1309 result->last = result->first + queuesize - 1;
Stephen Warren8165e342014-02-06 13:13:06 -07001310 result->tds = memalign(USB_DMA_MINALIGN,
1311 sizeof(struct qTD) * queuesize);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001312 if (!result->tds) {
1313 debug("ehci intr queue: out of memory\n");
1314 goto fail3;
1315 }
1316 memset(result->first, 0, sizeof(struct QH) * queuesize);
1317 memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1318
Hans de Goede7f59d162015-06-18 22:34:33 +02001319 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1320
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001321 for (i = 0; i < queuesize; i++) {
1322 struct QH *qh = result->first + i;
1323 struct qTD *td = result->tds + i;
1324 void **buf = &qh->buffer;
1325
Rob Herring98ae8402015-03-17 15:46:37 -05001326 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001327 if (i == queuesize - 1)
Adrian Coxea427772014-04-10 13:29:45 +01001328 qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001329
Rob Herring98ae8402015-03-17 15:46:37 -05001330 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
Adrian Coxea427772014-04-10 13:29:45 +01001331 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1332 qh->qh_endpt1 =
1333 cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001334 (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1335 (1 << 14) |
1336 QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1337 (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
Adrian Coxea427772014-04-10 13:29:45 +01001338 (usb_pipedevice(pipe) << 0));
1339 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1340 (1 << 0)); /* S-mask: microframe 0 */
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001341 if (dev->speed == USB_SPEED_LOW ||
1342 dev->speed == USB_SPEED_FULL) {
Hans de Goede4e2c4ad2014-09-20 16:51:22 +02001343 /* C-mask: microframes 2-4 */
1344 qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001345 }
Hans de Goede4e2c4ad2014-09-20 16:51:22 +02001346 ehci_update_endpt2_dev_n_port(dev, qh);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001347
Adrian Coxea427772014-04-10 13:29:45 +01001348 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1349 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001350 debug("communication direction is '%s'\n",
1351 usb_pipein(pipe) ? "in" : "out");
Hans de Goede7f59d162015-06-18 22:34:33 +02001352 td->qt_token = cpu_to_hc32(
1353 QT_TOKEN_DT(toggle) |
1354 (elementsize << 16) |
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001355 ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
Adrian Coxea427772014-04-10 13:29:45 +01001356 0x80); /* active */
1357 td->qt_buffer[0] =
Rob Herring98ae8402015-03-17 15:46:37 -05001358 cpu_to_hc32((unsigned long)buffer + i * elementsize);
Adrian Coxea427772014-04-10 13:29:45 +01001359 td->qt_buffer[1] =
1360 cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1361 td->qt_buffer[2] =
1362 cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1363 td->qt_buffer[3] =
1364 cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1365 td->qt_buffer[4] =
1366 cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001367
1368 *buf = buffer + i * elementsize;
Hans de Goede7f59d162015-06-18 22:34:33 +02001369 toggle ^= 1;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001370 }
1371
Rob Herring98ae8402015-03-17 15:46:37 -05001372 flush_dcache_range((unsigned long)buffer,
Stephen Warrend3e07472013-05-24 15:03:17 -06001373 ALIGN_END_ADDR(char, buffer,
1374 queuesize * elementsize));
Rob Herring98ae8402015-03-17 15:46:37 -05001375 flush_dcache_range((unsigned long)result->first,
Stephen Warrend3e07472013-05-24 15:03:17 -06001376 ALIGN_END_ADDR(struct QH, result->first,
1377 queuesize));
Rob Herring98ae8402015-03-17 15:46:37 -05001378 flush_dcache_range((unsigned long)result->tds,
Stephen Warrend3e07472013-05-24 15:03:17 -06001379 ALIGN_END_ADDR(struct qTD, result->tds,
1380 queuesize));
1381
Hans de Goede32f2eac2014-09-24 14:06:03 +02001382 if (ctrl->periodic_schedules > 0) {
1383 if (disable_periodic(ctrl) < 0) {
1384 debug("FATAL: periodic should never fail, but did");
1385 goto fail3;
1386 }
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001387 }
1388
1389 /* hook up to periodic list */
1390 struct QH *list = &ctrl->periodic_queue;
1391 result->last->qh_link = list->qh_link;
Rob Herring98ae8402015-03-17 15:46:37 -05001392 list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001393
Rob Herring98ae8402015-03-17 15:46:37 -05001394 flush_dcache_range((unsigned long)result->last,
Stephen Warrend3e07472013-05-24 15:03:17 -06001395 ALIGN_END_ADDR(struct QH, result->last, 1));
Rob Herring98ae8402015-03-17 15:46:37 -05001396 flush_dcache_range((unsigned long)list,
Stephen Warrend3e07472013-05-24 15:03:17 -06001397 ALIGN_END_ADDR(struct QH, list, 1));
1398
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001399 if (enable_periodic(ctrl) < 0) {
1400 debug("FATAL: periodic should never fail, but did");
1401 goto fail3;
1402 }
Hans de Goede36b73102014-09-20 16:51:25 +02001403 ctrl->periodic_schedules++;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001404
1405 debug("Exit create_int_queue\n");
1406 return result;
1407fail3:
1408 if (result->tds)
1409 free(result->tds);
1410fail2:
1411 if (result->first)
1412 free(result->first);
1413 if (result)
1414 free(result);
1415fail1:
1416 return NULL;
1417}
1418
Hans de Goede029fd8e2015-05-11 20:43:52 +02001419static void *_ehci_poll_int_queue(struct usb_device *dev,
1420 struct int_queue *queue)
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001421{
1422 struct QH *cur = queue->current;
Hans de Goede415548d2014-09-20 16:51:24 +02001423 struct qTD *cur_td;
Hans de Goede7f59d162015-06-18 22:34:33 +02001424 uint32_t token, toggle;
1425 unsigned long pipe = queue->pipe;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001426
1427 /* depleted queue */
1428 if (cur == NULL) {
1429 debug("Exit poll_int_queue with completed queue\n");
1430 return NULL;
1431 }
1432 /* still active */
Hans de Goede415548d2014-09-20 16:51:24 +02001433 cur_td = &queue->tds[queue->current - queue->first];
Rob Herring98ae8402015-03-17 15:46:37 -05001434 invalidate_dcache_range((unsigned long)cur_td,
Hans de Goede415548d2014-09-20 16:51:24 +02001435 ALIGN_END_ADDR(struct qTD, cur_td, 1));
Hans de Goede7f59d162015-06-18 22:34:33 +02001436 token = hc32_to_cpu(cur_td->qt_token);
1437 if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1438 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001439 return NULL;
1440 }
Hans de Goede7f59d162015-06-18 22:34:33 +02001441
1442 toggle = QT_TOKEN_GET_DT(token);
1443 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1444
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001445 if (!(cur->qh_link & QH_LINK_TERMINATE))
1446 queue->current++;
1447 else
1448 queue->current = NULL;
Hans de Goede8aa26b82014-09-24 14:06:05 +02001449
Rob Herring98ae8402015-03-17 15:46:37 -05001450 invalidate_dcache_range((unsigned long)cur->buffer,
Hans de Goede8aa26b82014-09-24 14:06:05 +02001451 ALIGN_END_ADDR(char, cur->buffer,
1452 queue->elementsize));
1453
Hans de Goede415548d2014-09-20 16:51:24 +02001454 debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
Hans de Goede7f59d162015-06-18 22:34:33 +02001455 token, cur, queue->first);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001456 return cur->buffer;
1457}
1458
1459/* Do not free buffers associated with QHs, they're owned by someone else */
Hans de Goede029fd8e2015-05-11 20:43:52 +02001460static int _ehci_destroy_int_queue(struct usb_device *dev,
1461 struct int_queue *queue)
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001462{
Simon Glass24ed8942015-03-25 12:22:25 -06001463 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001464 int result = -1;
1465 unsigned long timeout;
1466
1467 if (disable_periodic(ctrl) < 0) {
1468 debug("FATAL: periodic should never fail, but did");
1469 goto out;
1470 }
Hans de Goede36b73102014-09-20 16:51:25 +02001471 ctrl->periodic_schedules--;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001472
1473 struct QH *cur = &ctrl->periodic_queue;
1474 timeout = get_timer(0) + 500; /* abort after 500ms */
Adrian Coxea427772014-04-10 13:29:45 +01001475 while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001476 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1477 if (NEXT_QH(cur) == queue->first) {
1478 debug("found candidate. removing from chain\n");
1479 cur->qh_link = queue->last->qh_link;
Rob Herring98ae8402015-03-17 15:46:37 -05001480 flush_dcache_range((unsigned long)cur,
Hans de Goedeea7b30c2014-09-20 16:51:23 +02001481 ALIGN_END_ADDR(struct QH, cur, 1));
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001482 result = 0;
1483 break;
1484 }
1485 cur = NEXT_QH(cur);
1486 if (get_timer(0) > timeout) {
1487 printf("Timeout destroying interrupt endpoint queue\n");
1488 result = -1;
1489 goto out;
1490 }
1491 }
1492
Hans de Goede36b73102014-09-20 16:51:25 +02001493 if (ctrl->periodic_schedules > 0) {
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001494 result = enable_periodic(ctrl);
1495 if (result < 0)
1496 debug("FATAL: periodic should never fail, but did");
1497 }
1498
1499out:
1500 free(queue->tds);
1501 free(queue->first);
1502 free(queue);
1503
1504 return result;
1505}
1506
Simon Glass24ed8942015-03-25 12:22:25 -06001507static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1508 void *buffer, int length, int interval)
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001509{
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001510 void *backbuffer;
1511 struct int_queue *queue;
1512 unsigned long timeout;
1513 int result = 0, ret;
1514
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001515 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1516 dev, pipe, buffer, length, interval);
Benoît Thébaudeau44ae0be2012-08-09 23:50:44 +02001517
Hans de Goede029fd8e2015-05-11 20:43:52 +02001518 queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
Hans de Goedebd818d82014-09-24 14:06:04 +02001519 if (!queue)
1520 return -1;
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001521
1522 timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
Hans de Goede029fd8e2015-05-11 20:43:52 +02001523 while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001524 if (get_timer(0) > timeout) {
1525 printf("Timeout poll on interrupt endpoint\n");
1526 result = -ETIMEDOUT;
1527 break;
1528 }
1529
1530 if (backbuffer != buffer) {
Rob Herring98ae8402015-03-17 15:46:37 -05001531 debug("got wrong buffer back (%p instead of %p)\n",
1532 backbuffer, buffer);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001533 return -EINVAL;
1534 }
1535
Hans de Goede029fd8e2015-05-11 20:43:52 +02001536 ret = _ehci_destroy_int_queue(dev, queue);
Patrick Georgi8f62ca62013-03-06 14:08:31 +00001537 if (ret < 0)
1538 return ret;
1539
1540 /* everything worked out fine */
1541 return result;
Michael Trimarchiaaf098c2008-11-28 13:20:46 +01001542}
Simon Glass24ed8942015-03-25 12:22:25 -06001543
Simon Glass46b01792015-03-25 12:22:29 -06001544#ifndef CONFIG_DM_USB
Simon Glass24ed8942015-03-25 12:22:25 -06001545int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1546 void *buffer, int length)
1547{
1548 return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1549}
1550
1551int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1552 int length, struct devrequest *setup)
1553{
1554 return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1555}
1556
1557int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1558 void *buffer, int length, int interval)
1559{
1560 return _ehci_submit_int_msg(dev, pipe, buffer, length, interval);
1561}
Hans de Goede029fd8e2015-05-11 20:43:52 +02001562
1563struct int_queue *create_int_queue(struct usb_device *dev,
1564 unsigned long pipe, int queuesize, int elementsize,
1565 void *buffer, int interval)
1566{
1567 return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1568 buffer, interval);
1569}
1570
1571void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1572{
1573 return _ehci_poll_int_queue(dev, queue);
1574}
1575
1576int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1577{
1578 return _ehci_destroy_int_queue(dev, queue);
1579}
Simon Glass46b01792015-03-25 12:22:29 -06001580#endif
1581
1582#ifdef CONFIG_DM_USB
1583static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1584 unsigned long pipe, void *buffer, int length,
1585 struct devrequest *setup)
1586{
1587 debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1588 dev->name, udev, udev->dev->name, udev->portnr);
1589
1590 return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1591}
1592
1593static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1594 unsigned long pipe, void *buffer, int length)
1595{
1596 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1597 return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1598}
1599
1600static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1601 unsigned long pipe, void *buffer, int length,
1602 int interval)
1603{
1604 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1605 return _ehci_submit_int_msg(udev, pipe, buffer, length, interval);
1606}
1607
Hans de Goede8a5f0662015-05-10 14:10:18 +02001608static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1609 struct usb_device *udev, unsigned long pipe, int queuesize,
1610 int elementsize, void *buffer, int interval)
1611{
1612 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1613 return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1614 buffer, interval);
1615}
1616
1617static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1618 struct int_queue *queue)
1619{
1620 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1621 return _ehci_poll_int_queue(udev, queue);
1622}
1623
1624static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1625 struct int_queue *queue)
1626{
1627 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1628 return _ehci_destroy_int_queue(udev, queue);
1629}
1630
Simon Glass46b01792015-03-25 12:22:29 -06001631int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1632 struct ehci_hcor *hcor, const struct ehci_ops *ops,
1633 uint tweaks, enum usb_init_type init)
1634{
Hans de Goedecb8a2c12015-05-05 11:54:35 +02001635 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
Simon Glass46b01792015-03-25 12:22:29 -06001636 struct ehci_ctrl *ctrl = dev_get_priv(dev);
1637 int ret;
1638
1639 debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1640 dev->name, ctrl, hccr, hcor, init);
1641
Hans de Goedecb8a2c12015-05-05 11:54:35 +02001642 priv->desc_before_addr = true;
1643
Simon Glass46b01792015-03-25 12:22:29 -06001644 ehci_setup_ops(ctrl, ops);
1645 ctrl->hccr = hccr;
1646 ctrl->hcor = hcor;
1647 ctrl->priv = ctrl;
1648
Stephen Warren49b4c5c2015-08-20 17:38:05 -06001649 ctrl->init = init;
1650 if (ctrl->init == USB_INIT_DEVICE)
Simon Glass46b01792015-03-25 12:22:29 -06001651 goto done;
Stephen Warren49b4c5c2015-08-20 17:38:05 -06001652
Simon Glass46b01792015-03-25 12:22:29 -06001653 ret = ehci_reset(ctrl);
1654 if (ret)
1655 goto err;
1656
1657 ret = ehci_common_init(ctrl, tweaks);
1658 if (ret)
1659 goto err;
1660done:
1661 return 0;
1662err:
1663 free(ctrl);
1664 debug("%s: failed, ret=%d\n", __func__, ret);
1665 return ret;
1666}
1667
1668int ehci_deregister(struct udevice *dev)
1669{
1670 struct ehci_ctrl *ctrl = dev_get_priv(dev);
1671
Stephen Warren49b4c5c2015-08-20 17:38:05 -06001672 if (ctrl->init == USB_INIT_DEVICE)
1673 return 0;
1674
Simon Glass46b01792015-03-25 12:22:29 -06001675 ehci_shutdown(ctrl);
1676
1677 return 0;
1678}
1679
1680struct dm_usb_ops ehci_usb_ops = {
1681 .control = ehci_submit_control_msg,
1682 .bulk = ehci_submit_bulk_msg,
1683 .interrupt = ehci_submit_int_msg,
Hans de Goede8a5f0662015-05-10 14:10:18 +02001684 .create_int_queue = ehci_create_int_queue,
1685 .poll_int_queue = ehci_poll_int_queue,
1686 .destroy_int_queue = ehci_destroy_int_queue,
Simon Glass46b01792015-03-25 12:22:29 -06001687};
1688
1689#endif