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Fabio Estevam47c3e072011-06-07 07:02:53 +00001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the MX53ARD Freescale board.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22#ifndef __CONFIG_H
23#define __CONFIG_H
24
25#define CONFIG_MX53
26
Fabio Estevam47c3e072011-06-07 07:02:53 +000027#define CONFIG_DISPLAY_CPUINFO
28#define CONFIG_DISPLAY_BOARDINFO
29
Fabio Estevam7c2eaba2011-09-22 08:07:21 +000030#define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
31
Fabio Estevam47c3e072011-06-07 07:02:53 +000032#include <asm/arch/imx-regs.h>
33
34#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Fabio Estevam47c3e072011-06-07 07:02:53 +000035#define CONFIG_SETUP_MEMORY_TAGS
36#define CONFIG_INITRD_TAG
Fabio Estevamfd622f22013-04-24 14:44:26 +000037#define CONFIG_REVISION_TAG
Fabio Estevam47c3e072011-06-07 07:02:53 +000038
39/* Size of malloc() pool */
40#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
41
42#define CONFIG_BOARD_EARLY_INIT_F
43#define CONFIG_MXC_GPIO
44
Benoît Thébaudeau68fbc0e2013-04-11 09:35:39 +000045#define CONFIG_SYS_MAX_NAND_DEVICE 1
46#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
47#define CONFIG_NAND_MXC
48#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
49#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
50#define CONFIG_SYS_NAND_LARGEPAGE
51#define CONFIG_MXC_NAND_HWECC
52#define CONFIG_SYS_NAND_USE_FLASH_BBT
53#define CONFIG_CMD_NAND
54
Fabio Estevam47c3e072011-06-07 07:02:53 +000055#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010056#define CONFIG_MXC_UART_BASE UART1_BASE
Fabio Estevam47c3e072011-06-07 07:02:53 +000057
58/* I2C Configs */
59#define CONFIG_CMD_I2C
60#define CONFIG_HARD_I2C
61#define CONFIG_I2C_MXC
Troy Kiskyde6f6042012-04-24 17:33:25 +000062#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
Fabio Estevam47c3e072011-06-07 07:02:53 +000063#define CONFIG_SYS_I2C_SPEED 100000
Fabio Estevam47c3e072011-06-07 07:02:53 +000064
65/* MMC Configs */
66#define CONFIG_FSL_ESDHC
67#define CONFIG_SYS_FSL_ESDHC_ADDR 0
68#define CONFIG_SYS_FSL_ESDHC_NUM 2
69
70#define CONFIG_MMC
71#define CONFIG_CMD_MMC
72#define CONFIG_GENERIC_MMC
73#define CONFIG_CMD_FAT
74#define CONFIG_DOS_PARTITION
75
76/* Eth Configs */
77#define CONFIG_HAS_ETH1
Fabio Estevam47c3e072011-06-07 07:02:53 +000078#define CONFIG_MII
Fabio Estevam47c3e072011-06-07 07:02:53 +000079
80#define CONFIG_CMD_PING
81#define CONFIG_CMD_DHCP
82#define CONFIG_CMD_MII
83#define CONFIG_CMD_NET
84
85/* allow to overwrite serial and ethaddr */
86#define CONFIG_ENV_OVERWRITE
87#define CONFIG_CONS_INDEX 1
88#define CONFIG_BAUDRATE 115200
Fabio Estevam47c3e072011-06-07 07:02:53 +000089
90/* Command definition */
91#include <config_cmd_default.h>
92
93#undef CONFIG_CMD_IMLS
94
95#define CONFIG_BOOTDELAY 3
96
Wolfgang Grandegger28b119e2011-10-17 08:21:56 +000097#define CONFIG_ETHPRIME "smc911x"
Fabio Estevam47c3e072011-06-07 07:02:53 +000098
99/*Support LAN9217*/
100#define CONFIG_SMC911X
101#define CONFIG_SMC911X_16_BIT
102#define CONFIG_SMC911X_BASE CS1_BASE_ADDR
103
104#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
105#define CONFIG_SYS_TEXT_BASE 0x77800000
106
107#define CONFIG_EXTRA_ENV_SETTINGS \
108 "script=boot.scr\0" \
109 "uimage=uImage\0" \
110 "mmcdev=0\0" \
111 "mmcpart=2\0" \
112 "mmcroot=/dev/mmcblk0p3 rw\0" \
113 "mmcrootfstype=ext3 rootwait\0" \
114 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
115 "root=${mmcroot} " \
116 "rootfstype=${mmcrootfstype}\0" \
117 "loadbootscript=" \
118 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
119 "bootscript=echo Running bootscript from mmc ...; " \
120 "source\0" \
121 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
122 "mmcboot=echo Booting from mmc ...; " \
123 "run mmcargs; " \
124 "bootm\0" \
125 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
126 "root=/dev/nfs " \
127 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
128 "netboot=echo Booting from net ...; " \
129 "run netargs; " \
130 "dhcp ${uimage}; bootm\0" \
131
132#define CONFIG_BOOTCOMMAND \
Andrew Bradford66968112012-10-01 05:06:52 +0000133 "mmc dev ${mmcdev}; if mmc rescan; then " \
Fabio Estevam47c3e072011-06-07 07:02:53 +0000134 "if run loadbootscript; then " \
135 "run bootscript; " \
136 "else " \
137 "if run loaduimage; then " \
138 "run mmcboot; " \
139 "else run netboot; " \
140 "fi; " \
141 "fi; " \
142 "else run netboot; fi"
143#define CONFIG_ARP_TIMEOUT 200UL
144
145/* Miscellaneous configurable options */
146#define CONFIG_SYS_LONGHELP /* undef to save memory */
147#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Fabio Estevam47c3e072011-06-07 07:02:53 +0000148#define CONFIG_SYS_PROMPT "MX53ARD U-Boot > "
149#define CONFIG_AUTO_COMPLETE
150#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
151
152/* Print Buffer Size */
153#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
154#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
155#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
156
157#define CONFIG_SYS_MEMTEST_START 0x70000000
158#define CONFIG_SYS_MEMTEST_END 0x70010000
159
160#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
161
162#define CONFIG_SYS_HZ 1000
163#define CONFIG_CMDLINE_EDITING
164
Fabio Estevam47c3e072011-06-07 07:02:53 +0000165/* Physical Memory Map */
166#define CONFIG_NR_DRAM_BANKS 2
167#define PHYS_SDRAM_1 CSD0_BASE_ADDR
168#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
169#define PHYS_SDRAM_2 CSD1_BASE_ADDR
170#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
171#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
172
173#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
174#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
175#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
176
177#define CONFIG_SYS_INIT_SP_OFFSET \
178 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
179#define CONFIG_SYS_INIT_SP_ADDR \
180 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
181
182/* FLASH and environment organization */
183#define CONFIG_SYS_NO_FLASH
184
185#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
186#define CONFIG_ENV_SIZE (8 * 1024)
187#define CONFIG_ENV_IS_IN_MMC
188#define CONFIG_SYS_MMC_ENV_DEV 0
189
190#define CONFIG_OF_LIBFDT
191
192#define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
193#define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
194#define MX53ARD_CS1RCR2 RBEN(2)
195#define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
196
197#endif /* __CONFIG_H */