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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
rev13@wp.pled09a552015-03-01 12:44:42 +01002/*
3 * (C) Copyright 2015
Kamil Lulko66562412015-12-01 09:08:19 +01004 * Kamil Lulko, <kamil.lulko@gmail.com>
rev13@wp.pled09a552015-03-01 12:44:42 +01005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
rev13@wp.pled09a552015-03-01 12:44:42 +010010#define CONFIG_SYS_FLASH_BASE 0x08000000
11
12#define CONFIG_SYS_INIT_SP_ADDR 0x10010000
rev13@wp.pled09a552015-03-01 12:44:42 +010013
rev13@wp.pled09a552015-03-01 12:44:42 +010014/*
15 * Configuration of the external SDRAM memory
16 */
Radoslaw Pietrzyk246a5e52018-05-16 17:27:11 +020017#define CONFIG_SYS_LOAD_ADDR 0x90400000
18#define CONFIG_LOADADDR 0x90400000
rev13@wp.pled09a552015-03-01 12:44:42 +010019
20#define CONFIG_SYS_MAX_FLASH_SECT 12
21#define CONFIG_SYS_MAX_FLASH_BANKS 2
22
rev13@wp.pled09a552015-03-01 12:44:42 +010023#define CONFIG_RED_LED 110
24#define CONFIG_GREEN_LED 109
25
Vikas Manocha9ecb0c42016-03-09 15:18:13 -080026#define CONFIG_STM32_FLASH
rev13@wp.pled09a552015-03-01 12:44:42 +010027
rev13@wp.pled09a552015-03-01 12:44:42 +010028#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
29
30#define CONFIG_CMDLINE_TAG
31#define CONFIG_SETUP_MEMORY_TAGS
32#define CONFIG_INITRD_TAG
33#define CONFIG_REVISION_TAG
34
35#define CONFIG_SYS_CBSIZE 1024
rev13@wp.pled09a552015-03-01 12:44:42 +010036
rev13@wp.pled09a552015-03-01 12:44:42 +010037#define CONFIG_SYS_MALLOC_LEN (2 << 20)
38
rev13@wp.pled09a552015-03-01 12:44:42 +010039#define CONFIG_BOOTCOMMAND \
40 "run bootcmd_romfs"
41
42#define CONFIG_EXTRA_ENV_SETTINGS \
43 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
44 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
45 "bootm 0x08044000 - 0x08042000\0"
46
rev13@wp.pled09a552015-03-01 12:44:42 +010047#endif /* __CONFIG_H */