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wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * (C) Copyright 2004
8 * ARM Ltd.
9 * Philippe Robin, <philippe.robin@arm.com>
10 * Configuration for Versatile PB.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#ifndef __CONFIG_H
32#define __CONFIG_H
33
34/*
35 * High Level Configuration Options
36 * (easy to change)
37 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020038#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
wdenk3d3befa2004-03-14 15:06:13 +000039#define CONFIG_VERSATILE 1 /* in Versatile Platform Board */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020040#define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */
wdenk3d3befa2004-03-14 15:06:13 +000041
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020042#define CONFIG_SYS_MEMTEST_START 0x100000
43#define CONFIG_SYS_MEMTEST_END 0x10000000
44#define CONFIG_SYS_HZ (1000000 / 256)
45#define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */
wdenk3d3befa2004-03-14 15:06:13 +000046
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020047#define CONFIG_SYS_TIMER_INTERVAL 10000
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020048#define CONFIG_SYS_TIMER_RELOAD (CONFIG_SYS_TIMER_INTERVAL >> 4)
49#define CONFIG_SYS_TIMER_CTRL 0x84 /* Enable, Clock / 16 */
wdenk3d3befa2004-03-14 15:06:13 +000050
51/*
52 * control registers
53 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020054#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
wdenk3d3befa2004-03-14 15:06:13 +000055
56/*
57 * System controller bit assignment
58 */
59#define VERSATILE_REFCLK 0
60#define VERSATILE_TIMCLK 1
61
62#define VERSATILE_TIMER1_EnSel 15
63#define VERSATILE_TIMER2_EnSel 17
64#define VERSATILE_TIMER3_EnSel 19
65#define VERSATILE_TIMER4_EnSel 21
66
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020067#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
wdenk3d3befa2004-03-14 15:06:13 +000068#define CONFIG_SETUP_MEMORY_TAGS 1
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020069#define CONFIG_MISC_INIT_R 1
wdenk3d3befa2004-03-14 15:06:13 +000070/*
71 * Size of malloc() pool
72 */
Stefano Babicd3882982011-06-24 03:04:38 +000073#define CONFIG_ENV_SIZE 8192
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020074#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
wdenk3d3befa2004-03-14 15:06:13 +000075
76/*
77 * Hardware drivers
78 */
79
Ben Warren7194ab82009-10-04 22:37:03 -070080#define CONFIG_SMC91111
wdenk3d3befa2004-03-14 15:06:13 +000081#define CONFIG_SMC_USE_32_BIT
Wolfgang Denk53677ef2008-05-20 16:00:29 +020082#define CONFIG_SMC91111_BASE 0x10010000
wdenk3d3befa2004-03-14 15:06:13 +000083#undef CONFIG_SMC91111_EXT_PHY
84
85/*
86 * NS16550 Configuration
87 */
Andreas Engel48d01922008-09-08 14:30:53 +020088#define CONFIG_PL011_SERIAL
wdenk6705d812004-08-02 23:22:59 +000089#define CONFIG_PL011_CLOCK 24000000
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020090#define CONFIG_PL01x_PORTS \
91 {(void *)CONFIG_SYS_SERIAL0, \
92 (void *)CONFIG_SYS_SERIAL1 }
wdenk3d3befa2004-03-14 15:06:13 +000093#define CONFIG_CONS_INDEX 0
wdenk6705d812004-08-02 23:22:59 +000094
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +020095#define CONFIG_BAUDRATE 38400
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020096#define CONFIG_SYS_SERIAL0 0x101F1000
97#define CONFIG_SYS_SERIAL1 0x101F2000
wdenk3d3befa2004-03-14 15:06:13 +000098
Jon Loeligerdca3b3d2007-07-04 22:33:46 -050099/*
100 * Command line configuration.
101 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200102#define CONFIG_CMD_BDI
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500103#define CONFIG_CMD_DHCP
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200104#define CONFIG_CMD_FLASH
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500105#define CONFIG_CMD_IMI
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200106#define CONFIG_CMD_MEMORY
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500107#define CONFIG_CMD_NET
108#define CONFIG_CMD_PING
Mike Frysingerbdab39d2009-01-28 19:08:14 -0500109#define CONFIG_CMD_SAVEENV
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500110
Jon Loeligerd3b8c1a2007-07-09 21:57:31 -0500111/*
112 * BOOTP options
113 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200114#define CONFIG_BOOTP_BOOTPATH
Jon Loeligerd3b8c1a2007-07-09 21:57:31 -0500115#define CONFIG_BOOTP_GATEWAY
116#define CONFIG_BOOTP_HOSTNAME
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200117#define CONFIG_BOOTP_SUBNETMASK
wdenk3d3befa2004-03-14 15:06:13 +0000118
wdenk3d3befa2004-03-14 15:06:13 +0000119#define CONFIG_BOOTDELAY 2
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200120#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\
121 "netdev=25,0,0xf1010000,0xf1010010,eth0"
wdenk3d3befa2004-03-14 15:06:13 +0000122
123/*
124 * Static configuration when assigning fixed address
125 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200126#define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */
wdenk3d3befa2004-03-14 15:06:13 +0000127
128/*
129 * Miscellaneous configurable options
130 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200131#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200132#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARDd6e8ed82009-05-02 11:53:49 +0200133/* Monitor Command Prompt */
134#ifdef CONFIG_ARCH_VERSATILE_AB
135# define CONFIG_SYS_PROMPT "VersatileAB # "
136#else
137# define CONFIG_SYS_PROMPT "VersatilePB # "
138#endif
wdenk3d3befa2004-03-14 15:06:13 +0000139/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200140#define CONFIG_SYS_PBSIZE \
141 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
142#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
143#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk3d3befa2004-03-14 15:06:13 +0000144
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
wdenk3d3befa2004-03-14 15:06:13 +0000146
147/*-----------------------------------------------------------------------
wdenk3d3befa2004-03-14 15:06:13 +0000148 * Physical Memory Map
149 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200150#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
151#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
152#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200153#define PHYS_FLASH_SIZE 0x04000000 /* 64MB */
wdenk3d3befa2004-03-14 15:06:13 +0000154
Stefano Babicd3882982011-06-24 03:04:38 +0000155#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
156#define CONFIG_SYS_INIT_RAM_ADDR 0x00800000
157#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF
158#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
159 GENERATED_GBL_DATA_SIZE)
160#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
161 CONFIG_SYS_GBL_DATA_OFFSET)
162
163#define CONFIG_BOARD_EARLY_INIT_F
164
wdenk3d3befa2004-03-14 15:06:13 +0000165/*-----------------------------------------------------------------------
166 * FLASH and environment organization
167 */
Stefano Babicd3882982011-06-24 03:04:38 +0000168#ifdef CONFIG_ARCH_VERSATILE_QEMU
169#define CONFIG_SYS_TEXT_BASE 0x10000
170#define CONFIG_SYS_NO_FLASH
171#define CONFIG_ENV_IS_NOWHERE
172#define CONFIG_SYS_MONITOR_LEN 0x80000
173#else
174#define CONFIG_SYS_TEXT_BASE 0x01000000
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200175/*
176 * Use the CFI flash driver for ease of use
177 */
178#define CONFIG_SYS_FLASH_CFI
179#define CONFIG_FLASH_CFI_DRIVER
180#define CONFIG_ENV_IS_IN_FLASH 1
181/*
182 * System control register
183 */
Jean-Christophe PLAGNIOL-VILLARD2600b852009-06-20 11:02:17 +0200184#define VERSATILE_SYS_BASE 0x10000000
185#define VERSATILE_SYS_FLASH_OFFSET 0x4C
186#define VERSATILE_FLASHCTRL \
187 (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
188/* Enable writing to flash */
189#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0)
wdenkd407bf52004-10-11 22:51:13 +0000190
wdenk3d3befa2004-03-14 15:06:13 +0000191/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200192#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
193#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
wdenk3d3befa2004-03-14 15:06:13 +0000194
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200195/*
196 * Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block
197 * i.e.
198 * the bottom "sector" (bottom boot), or top "sector"
199 * (top boot), is a seperate erase region divided into
200 * 4 (equal) smaller sectors. This, notionally, allows
201 * quicker erase/rewrire of the most frequently changed
202 * area......
203 * CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4
204 */
wdenk3d3befa2004-03-14 15:06:13 +0000205
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200206#ifdef CONFIG_ARCH_VERSATILE_AB
207#define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */
208#define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE)
209#define CONFIG_SYS_MAX_FLASH_SECT (520)
210#endif
wdenkd407bf52004-10-11 22:51:13 +0000211
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200212#ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */
213#define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */
214#define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE
215#define CONFIG_SYS_MAX_FLASH_SECT (260)
216#endif
217
218#define CONFIG_SYS_FLASH_BASE 0x34000000
219#define CONFIG_SYS_MAX_FLASH_BANKS 1
220
221#define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE)
222
223/* The ARM Boot Monitor is shipped in the lowest sector of flash */
224
225#define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE)
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200226#define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE)
227#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
228#define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN)
229
230#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
231#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
232
Stefano Babicd3882982011-06-24 03:04:38 +0000233#endif
234
Jean-Christophe PLAGNIOL-VILLARD98692272009-05-02 11:53:50 +0200235#endif /* __CONFIG_H */