Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 7906ed4fdd70bb88ea8e6f47c404949a957f0890 / drivers / ddr
  1. ac72757 Revert "drivers/ddr/fsl: Dual-license DDR driver" by Tom Rini · 7 years ago
  2. ee3556b drivers/ddr/fsl: Dual-license DDR driver by York Sun · 7 years ago
  3. 140ad2d drivers/ddr/fsl: Cleanup unused variable by York Sun · 7 years ago
  4. 944537c drivers/ddr/fsl: Modify binding registers to save time on data init by York Sun · 7 years ago
  5. 564e938 drivers/ddr/fsl: Add calculation of register control words by York Sun · 7 years ago
  6. c0c32af drivers/ddr/fsl: Add 3DS RDIMM support by York Sun · 7 years ago
  7. d46ec0b drivers/ddr/fsl: Fix workaround for A009803 by York Sun · 7 years ago
  8. 426230a drivers/ddr/fsl: Fix DDR4 RDIMM support by York Sun · 7 years ago
  9. d61639e Merge git://git.denx.de/u-boot-socfpga by Tom Rini · 7 years ago
  10. 1d12a7c Merge git://git.denx.de/u-boot-spi by Tom Rini · 7 years ago
  11. 92962b3 ddr: altera: silence PHY calibration unless in debug mode by Goldschmidt Simon · 7 years ago
  12. 4826350 wait_bit: use wait_for_bit_le32 and remove wait_for_bit by Álvaro Fernández Rojas · 7 years ago
  13. 554d33f ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs by Rajesh Bhagat · 7 years ago
  14. 672e559 ddr: marvell: update ddr controller init and freq by Chris Packham · 7 years ago
  15. 8bddf67 ddr: marvell: update additional ODT setting by Chris Packham · 7 years ago
  16. 2efd27f ddr: marvell: use correct TREFI value by Chris Packham · 7 years ago
  17. dbaf095 ddr: marvell: only assert M_ODT[0] on write for a single CS by Chris Packham · 7 years ago
  18. 6d9b82d armv8: ls1088a: Add NXP LS1088A SoC support by Ashish Kumar · 7 years ago
  19. 00caae6 env: Rename getenv/_f() to env_get() by Simon Glass · 7 years ago
  20. 1b69ce2 arm: mvebu: ddr3_debug: remove self assignments by xypron.glpk@gmx.de · 7 years ago
  21. a21d636 arm: mvebu: remove self assignment by xypron.glpk@gmx.de · 7 years ago
  22. 90bcc3d driver/ddr: Add support for setting timing in hws_topology_map by Marek Behún · 7 years ago
  23. 51855e8 treewide: remove unneeded semicolons by Masahiro Yamada · 7 years ago
  24. 7c8e0e0 driver: ddr: fsl: Fix compiling error for DDR2 by York Sun · 7 years ago
  25. 457e51c common: arm: freescale: layerscape: Move header files out of common.h by Simon Glass · 7 years ago
  26. 6e2941d common: freescale: Move arch-specific declarations by Simon Glass · 7 years ago
  27. 3c476d8 Merge git://git.denx.de/u-boot-fsl-qoriq by Tom Rini · 7 years ago
  28. 0e0de24 ddr: fsl: incorrect logical constraint in populate_memctl_options by xypron.glpk@gmx.de · 7 years ago
  29. 97fbf26 drivers: ddr: fsl: fix unused-const-variable warnings by Thomas Schaefer · 7 years ago
  30. c1a16c3 Merge branch 'master' of git://git.denx.de/u-boot-socfpga by Tom Rini · 7 years ago
  31. 707cd01 arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig by Ley Foon Tan · 7 years ago
  32. f1683aa board_f: Rename initdram() to dram_init() by Simon Glass · 7 years ago
  33. 088454c board_f: Drop return value from initdram() by Simon Glass · 7 years ago
  34. 51370d5 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS by York Sun · 8 years ago
  35. 66e399b ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig by York Sun · 8 years ago
  36. 63659ff powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig by York Sun · 8 years ago
  37. ba1b6fb arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig by York Sun · 8 years ago
  38. d26e34c fsl_ddr: Move DDR config options to driver Kconfig by York Sun · 8 years ago
  39. 02fb276 fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum by Shengzhou Liu · 8 years ago
  40. 5a17b8b fsl/ddr: Fix compiling warning by Shengzhou Liu · 8 years ago
  41. 3c3d8ab powerpc: MPC8555: Remove macro CONFIG_MPC8555 by York Sun · 8 years ago
  42. 3aff308 powerpc: mpc8541: Remove macro CONFIG_MPC8541 by York Sun · 8 years ago
  43. 89a54ab ddr: altera: Configuring SDRAM extra cycles timing parameters by Chin Liang See · 8 years ago
  44. fc0b594 Various, accumulated typos collected from around the tree. by Robert P. J. Day · 8 years ago
  45. cbe7706 Merge git://git.denx.de/u-boot-fsl-qoriq by Tom Rini · 8 years ago
  46. 1fdcc8d driver: ddr: fsl_mmdc: Pass board parameters through data structure by York Sun · 8 years ago
  47. a4ca379 drivers: squash lines for immediate return by Masahiro Yamada · 8 years ago
  48. 2f0dcf2 ddr: fsl: fix a compile issue by Shaohui Xie · 8 years ago
  49. b9e745b driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a by Shengzhou Liu · 8 years ago
  50. 4baa38c driver/ddr/fsl: Revise workaround A008511 for A009803 by York Sun · 8 years ago
  51. b406731 driver/ddr/fsl: Add more debug registers by York Sun · 8 years ago
  52. 8936691 driver/ddr/fsl: Fix timing_cfg_2 by York Sun · 8 years ago
  53. 62a3b7d Various, unrelated tree-wide typo fixes. by Robert P. J. Day · 8 years ago
  54. d367404 driver/ddr/fsl: Check condition for erratum A-009803 by Shengzhou Liu · 8 years ago
  55. b06f6f2 drivers/ddr/fsl: Disabling data init if ECC is not enabled by York Sun · 8 years ago
  56. 5605dc6 drivers/ddr/fsl: Fix timing_cfg_2 register by York Sun · 8 years ago
  57. d8e5163 drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl by Shengzhou Liu · 8 years ago
  58. fc15b9b Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq by Tom Rini · 8 years ago
  59. 29b5935 arm: mvebu: a38x: Weed out floating point use by Marek Vasut · 8 years ago
  60. 019a147 driver/ddr/fsl: Add workaround for erratum A-010165 by Shengzhou Liu · 8 years ago
  61. 5fc62fe driver/ddr/fsl: Add workaround for erratum A-009801 by Shengzhou Liu · 9 years ago
  62. 4a68489 drivers/ddr/fsl: update workaround for erratum A-008511 by Shengzhou Liu · 9 years ago
  63. eae4b2b Fix spelling of "occurred". by Vagrant Cascadian · 8 years ago
  64. e026b98 ddr: altera: Repair DQ window centering code by Marek Vasut · 8 years ago
  65. 85f7662 ddr: altera: Staticize global variables by Marek Vasut · 8 years ago
  66. ea9aa24 ddr: altera: Make DLEVEL behavior inclusive by Marek Vasut · 8 years ago
  67. 70ed80a ddr: altera: Zero DM IN delay in scc_mgr_zero_group() by Marek Vasut · 8 years ago
  68. f3f777c ddr: altera: Remove unnecessary ODT mode config by Marek Vasut · 8 years ago
  69. f5f8c41 ddr: altera: Remove unnecessary update of the SCC by Marek Vasut · 8 years ago
  70. 164eb23 ddr: altera: Fix DRAM end value in protection rule by Marek Vasut · 8 years ago
  71. 8e9e62c ddr: altera: Fix scc_mgr_set() argument order by Marek Vasut · 8 years ago
  72. bba7711 ddr: altera: Tweak DQS tracking enable handling by Marek Vasut · 8 years ago
  73. abaf836 ddr: altera: Replace ad-hoc constant with macro by Marek Vasut · 8 years ago
  74. dd8d8da Fix typo choosen in comments and printf logs by Alexander Merkle · 9 years ago
  75. 44876bf arm: mvebu: Fix ddr3_init() cpu config by Dirk Eibach · 9 years ago
  76. dd8e740 driver/ddr/fsl: Add workaround for erratum A-009803 by Shengzhou Liu · 9 years ago
  77. eb11880 driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete by Shengzhou Liu · 9 years ago
  78. a187559 Use correct spelling of "U-Boot" by Bin Meng · 9 years ago
  79. 9ffa7a3 drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32. by Purna Chandra Mandal · 9 years ago
  80. 81dfdee drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers by Ed Swarthout · 9 years ago
  81. a994b3d driver/ddr/fsl: Add workaround for A009663 by Shengzhou Liu · 9 years ago
  82. 0d3972c fsl/ddr: Add workaround for ERRATUM_A009942 by Shengzhou Liu · 9 years ago
  83. 5b8031c Add more SPDX-License-Identifier tags by Tom Rini · 9 years ago
  84. 1720fad ddr: altera: Init the rule ID in debug code by Marek Vasut · 9 years ago
  85. 4444d23 mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT by Phil Sutter · 9 years ago
  86. 7e1e59a axp: Fix debugging support in DDR3 write leveling by Phil Sutter · 9 years ago
  87. 698ffab arm: mvebu: Make ECC support configurable on Armada XP by Stefan Roese · 9 years ago
  88. cdf1d24 arm: mvebu: ddr: Fix compilation warning by Stefan Roese · 9 years ago
  89. 000f4e7 move erratum a008336 and a008514 to soc specific file by Yao Yuan · 9 years ago
  90. a46b185 fsl/ddr: updated ddr errata-A008378 for arm and power SoCs by Shengzhou Liu · 9 years ago
  91. 6c6e006 driver/ddr/fsl: Update timing config for heavy load by York Sun · 9 years ago
  92. 7cc0799 driver/ddr/fsl: Update workaround for A008511 for vref range by York Sun · 9 years ago
  93. 8a51429 driver/ddr/fsl: Update MR5 RTT park by York Sun · 9 years ago
  94. 0fb7197 driver/ddr/fsl: Update DDR4 MR6 for Vref range by York Sun · 9 years ago
  95. 19601dd driver/ddr/fsl: Update DDR4 RTT values by York Sun · 9 years ago
  96. da305b9 drivers/ddr/fsl: Fix typo in BIST test for DDR4 by York Sun · 9 years ago
  97. 61bd2f7 drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 by York Sun · 9 years ago
  98. 06b5301 armv8: ls2085a: Add support of LS2085A SoC by Prabhakar Kushwaha · 9 years ago
  99. 4493721 armv8: LS2080A: Rename LS2085A to reflect LS2080A by Prabhakar Kushwaha · 9 years ago
  100. a21b4f0 arm: mvebu: Fix SAR1_CPU_CORE_MASK by Dirk Eibach · 9 years ago