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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 870e0bda43c9ea18a5f2fae5e48905c3b44ea18b / drivers / ddr / fsl / ctrl_regs.c
  1. 349689b drivers/ddr: Fix possible out of bounds error by York Sun · 11 years ago
  2. 34e026f driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · 11 years ago
  3. 6b1e125 driver/ddr: Add 256 byte interleaving support by York Sun · 11 years ago
  4. 4e5b1bd driver/ddr: Change Freescale ARM DDR driver to support both big and little endian by York Sun · 11 years ago
  5. d4263b8 powerpc/mpc8xxx: Extend DDR registers' fields by York Sun · 11 years ago
  6. 9a17eb5 Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx by York Sun · 11 years ago
  7. 5614e71 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed (97%) from arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c]
  8. 7e157b0 mpc8xxx: set x2 DDR3 refresh rate if SPD config requires it by Valentin Longchamp · 11 years ago
  9. 0dd38a3 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  10. c45f5c0 powerpc/mpc8xxx: Fix TIMING_CFG_3[EXT_ACTTOPRE] by James Yang · 11 years ago
  11. b61e061 powerpc/mpc8xxx: Add x4 DDR device support by York Sun · 11 years ago
  12. d8556db powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff by York Sun · 11 years ago
  13. cb93071 mpc85xx: Base emulator support by York Sun · 11 years ago
  14. 1a45966 Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · 11 years ago
  15. 5b93394 mpc8xxx: fix DDR init value to use CONFIG_MEM_INIT_VALUE by Anatolij Gustschin · 12 years ago
  16. e76cd5d 8xxx: Change all 8*xx_DDR addresses to 8xxx by Andy Fleming · 12 years ago
  17. 2ed2e91 arch/powerpc/cpu/mpc8xxx/: sparse fixes by Kim Phillips · 12 years ago
  18. 123922b powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation by York Sun · 12 years ago
  19. 57495e4 powerpc/mpc8xxx: Update DDR registers by York Sun · 12 years ago
  20. 45064ad powerpc/mpc8xxx: Fix bug for extended DDR timing by York Sun · 12 years ago
  21. a4c6650 powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving by York Sun · 12 years ago
  22. fcea306 powerpc/mpc8xxx: Add support for cas latency 12 and above by York Sun · 12 years ago
  23. dea7f88 arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warning by Kumar Gala · 13 years ago
  24. d29d17d powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver by York Sun · 13 years ago
  25. cae7c1b powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en by York Sun · 13 years ago
  26. 2bba85f powerpc/mpc8xxx: Extend CWL table by York Sun · 13 years ago
  27. 23f9670 powerpc/mpc8xxx: Allow override DDR read-to-write turnaround time by York Sun · 13 years ago
  28. c2a63f4 powerpc/8xxx: Fix typo for address hashing message by Kumar Gala · 14 years ago
  29. 5df4b0a powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq() by Kumar Gala · 14 years ago
  30. 4ca3192 powerpc/mpc8xxx: disable rcw_en bit for non-DDR3 by York Sun · 14 years ago
  31. f5b6fb7 powerpc/mpc8xxx: Fix DDR3 timing_cfg_1 and sdram_mode registers by York Sun · 14 years ago
  32. 856e4b0 powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3 by York Sun · 14 years ago
  33. 9296683 powerpc/8xxx: Fix compile warning when build for a DDR1 or DDR2 board by Kumar Gala · 14 years ago
  34. e1fd16b mpc85xx: Enable unique mode registers and dynamic ODT for DDR3 by York Sun · 14 years ago
  35. fc0c2b6 8xxx/ddr: add support to only compute the ddr sdram size by Haiying Wang · 14 years ago
  36. 58edbc9 Disable unused chip-select for DDR controller interleaving by York Sun · 14 years ago
  37. 8d9207c Fix parameters to support RDIMM for P2020DS by York Sun · 14 years ago
  38. 5fb8a8a powerpc/8xxx: Improvement to DDR parameters by york · 14 years ago
  39. 9490ff4 powerpc/8xxx: Enable DDR3 RDIMM support by york · 14 years ago
  40. 7fd101c powerpc/8xxx: Enabled address hashing for 85xx by york · 14 years ago
  41. 5800e7a powerpc/8xxx: Enable quad-rank DIMMs. by york · 14 years ago
  42. 076bff8 powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 by york · 14 years ago
  43. 99bac47 fsl-ddr: Add extra cycle to turnaround times by Dave Liu · 15 years ago
  44. a47a12b Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc8xxx/ddr/ctrl_regs.c]
  45. 8d1f268 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc8xxx/ddr/ctrl_regs.c]
  46. ec145e8 fsl-ddr: Fix the turnaround timing for TIMING_CFG_4 by Dave Liu · 15 years ago
  47. 3e731aa fsl-ddr: setup ODT_RD_CFG & ODT_WR_CFG when we interleave by Dave Liu · 15 years ago
  48. 1aa3d08 fsl-ddr: add override for the Rtt_Wr by Dave Liu · 15 years ago
  49. bdc9f7b fsl-ddr: add the override for write leveling by Dave Liu · 15 years ago
  50. 0a71c92 fsl-ddr: Fix power-down timing settings by Dave Liu · 15 years ago
  51. 6d8565a ppc/8xxx: Misc DDR related fixes by Kumar Gala · 15 years ago
  52. 2abbd31 ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist by Kumar Gala · 15 years ago
  53. e7563af fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT by Kumar Gala · 15 years ago
  54. c360cea fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  55. 6a81978 fsl-ddr: Fix two bugs in the ddr infrastructure by Dave Liu · 16 years ago
  56. 22cca7e fsl-ddr: make the self refresh idle threshold configurable by Dave Liu · 16 years ago
  57. 22ff3d0 fsl-ddr: clean up the ddr code for DDR3 controller by Dave Liu · 16 years ago
  58. 80ee3ce fsl-ddr: update the bit mask for DDR3 controller by Dave Liu · 16 years ago
  59. 1f293b4 Add debug information for DDR controller registers by Haiying Wang · 16 years ago
  60. dbbbb3a Make DDR interleaving mode work correctly by Haiying Wang · 16 years ago
  61. 302e52e Fix compiler warning in mpc8xxx ddr code by Kumar Gala · 16 years ago
  62. 58e5e9a FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago