blob: c1f8851ab2f3ef84a1b9cf1680b5638e00528464 [file] [log] [blame]
Andy Fleming272cc702008-10-30 16:41:01 -05001/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andy Fleming272cc702008-10-30 16:41:01 -05008 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
Sjoerd Simons8e3332e2015-08-30 16:55:45 -060013#include <dm.h>
14#include <dm/device-internal.h>
Stephen Warrend4622df2014-05-23 12:47:06 -060015#include <errno.h>
Andy Fleming272cc702008-10-30 16:41:01 -050016#include <mmc.h>
17#include <part.h>
Peng Fan2051aef2016-10-11 15:08:43 +080018#include <power/regulator.h>
Andy Fleming272cc702008-10-30 16:41:01 -050019#include <malloc.h>
Simon Glasscf92e052015-09-02 17:24:58 -060020#include <memalign.h>
Andy Fleming272cc702008-10-30 16:41:01 -050021#include <linux/list.h>
Rabin Vincent9b1f9422009-04-05 13:30:54 +053022#include <div64.h>
Paul Burtonda61fa52013-09-09 15:30:26 +010023#include "mmc_private.h"
Andy Fleming272cc702008-10-30 16:41:01 -050024
Peng Fan3697e592016-09-01 11:13:38 +080025static const unsigned int sd_au_size[] = {
26 0, SZ_16K / 512, SZ_32K / 512,
27 SZ_64K / 512, SZ_128K / 512, SZ_256K / 512,
28 SZ_512K / 512, SZ_1M / 512, SZ_2M / 512,
29 SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512,
30 SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, SZ_64M / 512,
31};
32
Kishon Vijay Abraham Iaff5d3c2017-09-21 16:30:00 +020033static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
Kishon Vijay Abraham Ifb7c3be2017-09-21 16:30:02 +020034static int mmc_power_cycle(struct mmc *mmc);
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +020035static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps);
Kishon Vijay Abraham Iaff5d3c2017-09-21 16:30:00 +020036
Marek Vasutb5b838f2016-12-01 02:06:33 +010037#if CONFIG_IS_ENABLED(MMC_TINY)
38static struct mmc mmc_static;
39struct mmc *find_mmc_device(int dev_num)
40{
41 return &mmc_static;
42}
43
44void mmc_do_preinit(void)
45{
46 struct mmc *m = &mmc_static;
47#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
48 mmc_set_preinit(m, 1);
49#endif
50 if (m->preinit)
51 mmc_start_init(m);
52}
53
54struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
55{
56 return &mmc->block_dev;
57}
58#endif
59
Simon Glasse7881d82017-07-29 11:35:31 -060060#if !CONFIG_IS_ENABLED(DM_MMC)
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +020061
62static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout)
63{
64 return -ENOSYS;
65}
66
Jeroen Hofstee750121c2014-07-12 21:24:08 +020067__weak int board_mmc_getwp(struct mmc *mmc)
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000068{
69 return -1;
70}
71
72int mmc_getwp(struct mmc *mmc)
73{
74 int wp;
75
76 wp = board_mmc_getwp(mmc);
77
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000078 if (wp < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020079 if (mmc->cfg->ops->getwp)
80 wp = mmc->cfg->ops->getwp(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000081 else
82 wp = 0;
83 }
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000084
85 return wp;
86}
87
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +020088__weak int board_mmc_getcd(struct mmc *mmc)
89{
Stefano Babic11fdade2010-02-05 15:04:43 +010090 return -1;
91}
Simon Glass8ca51e52016-06-12 23:30:22 -060092#endif
Stefano Babic11fdade2010-02-05 15:04:43 +010093
Marek Vasut8635ff92012-03-15 18:41:35 +000094#ifdef CONFIG_MMC_TRACE
Simon Glassc0c76eb2016-06-12 23:30:20 -060095void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
96{
97 printf("CMD_SEND:%d\n", cmd->cmdidx);
98 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
99}
100
101void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
102{
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000103 int i;
104 u8 *ptr;
105
Bin Meng7863ce52016-03-17 21:53:14 -0700106 if (ret) {
107 printf("\t\tRET\t\t\t %d\n", ret);
108 } else {
109 switch (cmd->resp_type) {
110 case MMC_RSP_NONE:
111 printf("\t\tMMC_RSP_NONE\n");
112 break;
113 case MMC_RSP_R1:
114 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
115 cmd->response[0]);
116 break;
117 case MMC_RSP_R1b:
118 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
119 cmd->response[0]);
120 break;
121 case MMC_RSP_R2:
122 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
123 cmd->response[0]);
124 printf("\t\t \t\t 0x%08X \n",
125 cmd->response[1]);
126 printf("\t\t \t\t 0x%08X \n",
127 cmd->response[2]);
128 printf("\t\t \t\t 0x%08X \n",
129 cmd->response[3]);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000130 printf("\n");
Bin Meng7863ce52016-03-17 21:53:14 -0700131 printf("\t\t\t\t\tDUMPING DATA\n");
132 for (i = 0; i < 4; i++) {
133 int j;
134 printf("\t\t\t\t\t%03d - ", i*4);
135 ptr = (u8 *)&cmd->response[i];
136 ptr += 3;
137 for (j = 0; j < 4; j++)
138 printf("%02X ", *ptr--);
139 printf("\n");
140 }
141 break;
142 case MMC_RSP_R3:
143 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
144 cmd->response[0]);
145 break;
146 default:
147 printf("\t\tERROR MMC rsp not supported\n");
148 break;
Bin Meng53e8e402016-03-17 21:53:13 -0700149 }
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000150 }
Simon Glassc0c76eb2016-06-12 23:30:20 -0600151}
152
153void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
154{
155 int status;
156
157 status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
158 printf("CURR STATE:%d\n", status);
159}
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000160#endif
Simon Glassc0c76eb2016-06-12 23:30:20 -0600161
Jean-Jacques Hiblot35f9e192017-09-21 16:29:53 +0200162#if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
163const char *mmc_mode_name(enum bus_mode mode)
164{
165 static const char *const names[] = {
166 [MMC_LEGACY] = "MMC legacy",
167 [SD_LEGACY] = "SD Legacy",
168 [MMC_HS] = "MMC High Speed (26MHz)",
169 [SD_HS] = "SD High Speed (50MHz)",
170 [UHS_SDR12] = "UHS SDR12 (25MHz)",
171 [UHS_SDR25] = "UHS SDR25 (50MHz)",
172 [UHS_SDR50] = "UHS SDR50 (100MHz)",
173 [UHS_SDR104] = "UHS SDR104 (208MHz)",
174 [UHS_DDR50] = "UHS DDR50 (50MHz)",
175 [MMC_HS_52] = "MMC High Speed (52MHz)",
176 [MMC_DDR_52] = "MMC DDR52 (52MHz)",
177 [MMC_HS_200] = "HS200 (200MHz)",
178 };
179
180 if (mode >= MMC_MODES_END)
181 return "Unknown mode";
182 else
183 return names[mode];
184}
185#endif
186
Jean-Jacques Hiblot05038572017-09-21 16:29:55 +0200187static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
188{
189 static const int freqs[] = {
190 [SD_LEGACY] = 25000000,
191 [MMC_HS] = 26000000,
192 [SD_HS] = 50000000,
193 [UHS_SDR12] = 25000000,
194 [UHS_SDR25] = 50000000,
195 [UHS_SDR50] = 100000000,
196 [UHS_SDR104] = 208000000,
197 [UHS_DDR50] = 50000000,
198 [MMC_HS_52] = 52000000,
199 [MMC_DDR_52] = 52000000,
200 [MMC_HS_200] = 200000000,
201 };
202
203 if (mode == MMC_LEGACY)
204 return mmc->legacy_speed;
205 else if (mode >= MMC_MODES_END)
206 return 0;
207 else
208 return freqs[mode];
209}
210
Jean-Jacques Hiblot35f9e192017-09-21 16:29:53 +0200211static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
212{
213 mmc->selected_mode = mode;
Jean-Jacques Hiblot05038572017-09-21 16:29:55 +0200214 mmc->tran_speed = mmc_mode2freq(mmc, mode);
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +0200215 mmc->ddr_mode = mmc_is_mode_ddr(mode);
Jean-Jacques Hiblot35f9e192017-09-21 16:29:53 +0200216 debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
217 mmc->tran_speed / 1000000);
218 return 0;
219}
220
Simon Glasse7881d82017-07-29 11:35:31 -0600221#if !CONFIG_IS_ENABLED(DM_MMC)
Simon Glassc0c76eb2016-06-12 23:30:20 -0600222int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
223{
224 int ret;
225
226 mmmc_trace_before_send(mmc, cmd);
227 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
228 mmmc_trace_after_send(mmc, cmd, ret);
229
Marek Vasut8635ff92012-03-15 18:41:35 +0000230 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500231}
Simon Glass8ca51e52016-06-12 23:30:22 -0600232#endif
Andy Fleming272cc702008-10-30 16:41:01 -0500233
Paul Burtonda61fa52013-09-09 15:30:26 +0100234int mmc_send_status(struct mmc *mmc, int timeout)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000235{
236 struct mmc_cmd cmd;
Jan Kloetzked617c422012-02-05 22:29:12 +0000237 int err, retries = 5;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000238
239 cmd.cmdidx = MMC_CMD_SEND_STATUS;
240 cmd.resp_type = MMC_RSP_R1;
Marek Vasutaaf3d412011-08-10 09:24:48 +0200241 if (!mmc_host_is_spi(mmc))
242 cmd.cmdarg = mmc->rca << 16;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000243
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500244 while (1) {
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000245 err = mmc_send_cmd(mmc, &cmd, NULL);
Jan Kloetzked617c422012-02-05 22:29:12 +0000246 if (!err) {
247 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
248 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
249 MMC_STATE_PRG)
250 break;
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +0200251
252 if (cmd.response[0] & MMC_STATUS_MASK) {
Paul Burton56196822013-09-04 16:12:25 +0100253#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jan Kloetzked617c422012-02-05 22:29:12 +0000254 printf("Status Error: 0x%08X\n",
255 cmd.response[0]);
Paul Burton56196822013-09-04 16:12:25 +0100256#endif
Jaehoon Chung915ffa52016-07-19 16:33:36 +0900257 return -ECOMM;
Jan Kloetzked617c422012-02-05 22:29:12 +0000258 }
259 } else if (--retries < 0)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000260 return err;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000261
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500262 if (timeout-- <= 0)
263 break;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000264
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500265 udelay(1000);
266 }
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000267
Simon Glassc0c76eb2016-06-12 23:30:20 -0600268 mmc_trace_state(mmc, &cmd);
Jongman Heo5b0c9422012-06-03 21:32:13 +0000269 if (timeout <= 0) {
Paul Burton56196822013-09-04 16:12:25 +0100270#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000271 printf("Timeout waiting card ready\n");
Paul Burton56196822013-09-04 16:12:25 +0100272#endif
Jaehoon Chung915ffa52016-07-19 16:33:36 +0900273 return -ETIMEDOUT;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000274 }
275
276 return 0;
277}
278
Paul Burtonda61fa52013-09-09 15:30:26 +0100279int mmc_set_blocklen(struct mmc *mmc, int len)
Andy Fleming272cc702008-10-30 16:41:01 -0500280{
281 struct mmc_cmd cmd;
Kishon Vijay Abraham I83dc4222017-09-21 16:30:10 +0200282 int err;
Andy Fleming272cc702008-10-30 16:41:01 -0500283
Andrew Gabbasov786e8f82014-12-01 06:59:09 -0600284 if (mmc->ddr_mode)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900285 return 0;
286
Andy Fleming272cc702008-10-30 16:41:01 -0500287 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
288 cmd.resp_type = MMC_RSP_R1;
289 cmd.cmdarg = len;
Andy Fleming272cc702008-10-30 16:41:01 -0500290
Kishon Vijay Abraham I83dc4222017-09-21 16:30:10 +0200291 err = mmc_send_cmd(mmc, &cmd, NULL);
292
293#ifdef CONFIG_MMC_QUIRKS
294 if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) {
295 int retries = 4;
296 /*
297 * It has been seen that SET_BLOCKLEN may fail on the first
298 * attempt, let's try a few more time
299 */
300 do {
301 err = mmc_send_cmd(mmc, &cmd, NULL);
302 if (!err)
303 break;
304 } while (retries--);
305 }
306#endif
307
308 return err;
Andy Fleming272cc702008-10-30 16:41:01 -0500309}
310
Jean-Jacques Hiblot9815e3b2017-09-21 16:30:12 +0200311static const u8 tuning_blk_pattern_4bit[] = {
312 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
313 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
314 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
315 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
316 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
317 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
318 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
319 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
320};
321
322static const u8 tuning_blk_pattern_8bit[] = {
323 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
324 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
325 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
326 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
327 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
328 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
329 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
330 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
331 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
332 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
333 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
334 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
335 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
336 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
337 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
338 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
339};
340
341int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error)
342{
343 struct mmc_cmd cmd;
344 struct mmc_data data;
345 const u8 *tuning_block_pattern;
346 int size, err;
347
348 if (mmc->bus_width == 8) {
349 tuning_block_pattern = tuning_blk_pattern_8bit;
350 size = sizeof(tuning_blk_pattern_8bit);
351 } else if (mmc->bus_width == 4) {
352 tuning_block_pattern = tuning_blk_pattern_4bit;
353 size = sizeof(tuning_blk_pattern_4bit);
354 } else {
355 return -EINVAL;
356 }
357
358 ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size);
359
360 cmd.cmdidx = opcode;
361 cmd.cmdarg = 0;
362 cmd.resp_type = MMC_RSP_R1;
363
364 data.dest = (void *)data_buf;
365 data.blocks = 1;
366 data.blocksize = size;
367 data.flags = MMC_DATA_READ;
368
369 err = mmc_send_cmd(mmc, &cmd, &data);
370 if (err)
371 return err;
372
373 if (memcmp(data_buf, tuning_block_pattern, size))
374 return -EIO;
375
376 return 0;
377}
378
Sascha Silbeff8fef52013-06-14 13:07:25 +0200379static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000380 lbaint_t blkcnt)
Andy Fleming272cc702008-10-30 16:41:01 -0500381{
382 struct mmc_cmd cmd;
383 struct mmc_data data;
384
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700385 if (blkcnt > 1)
386 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
387 else
388 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
Andy Fleming272cc702008-10-30 16:41:01 -0500389
390 if (mmc->high_capacity)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700391 cmd.cmdarg = start;
Andy Fleming272cc702008-10-30 16:41:01 -0500392 else
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700393 cmd.cmdarg = start * mmc->read_bl_len;
Andy Fleming272cc702008-10-30 16:41:01 -0500394
395 cmd.resp_type = MMC_RSP_R1;
Andy Fleming272cc702008-10-30 16:41:01 -0500396
397 data.dest = dst;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700398 data.blocks = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500399 data.blocksize = mmc->read_bl_len;
400 data.flags = MMC_DATA_READ;
401
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700402 if (mmc_send_cmd(mmc, &cmd, &data))
403 return 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500404
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700405 if (blkcnt > 1) {
406 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
407 cmd.cmdarg = 0;
408 cmd.resp_type = MMC_RSP_R1b;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700409 if (mmc_send_cmd(mmc, &cmd, NULL)) {
Paul Burton56196822013-09-04 16:12:25 +0100410#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700411 printf("mmc fail to send stop cmd\n");
Paul Burton56196822013-09-04 16:12:25 +0100412#endif
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700413 return 0;
414 }
Andy Fleming272cc702008-10-30 16:41:01 -0500415 }
416
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700417 return blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500418}
419
Simon Glassc4d660d2017-07-04 13:31:19 -0600420#if CONFIG_IS_ENABLED(BLK)
Simon Glass7dba0b92016-06-12 23:30:15 -0600421ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
Simon Glass33fb2112016-05-01 13:52:41 -0600422#else
Simon Glass7dba0b92016-06-12 23:30:15 -0600423ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
424 void *dst)
Simon Glass33fb2112016-05-01 13:52:41 -0600425#endif
Andy Fleming272cc702008-10-30 16:41:01 -0500426{
Simon Glassc4d660d2017-07-04 13:31:19 -0600427#if CONFIG_IS_ENABLED(BLK)
Simon Glass33fb2112016-05-01 13:52:41 -0600428 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
429#endif
Simon Glassbcce53d2016-02-29 15:25:51 -0700430 int dev_num = block_dev->devnum;
Stephen Warren873cc1d2015-12-07 11:38:49 -0700431 int err;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700432 lbaint_t cur, blocks_todo = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500433
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700434 if (blkcnt == 0)
435 return 0;
436
437 struct mmc *mmc = find_mmc_device(dev_num);
Andy Fleming272cc702008-10-30 16:41:01 -0500438 if (!mmc)
439 return 0;
440
Marek Vasutb5b838f2016-12-01 02:06:33 +0100441 if (CONFIG_IS_ENABLED(MMC_TINY))
442 err = mmc_switch_part(mmc, block_dev->hwpart);
443 else
444 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
445
Stephen Warren873cc1d2015-12-07 11:38:49 -0700446 if (err < 0)
447 return 0;
448
Simon Glassc40fdca2016-05-01 13:52:35 -0600449 if ((start + blkcnt) > block_dev->lba) {
Paul Burton56196822013-09-04 16:12:25 +0100450#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Sascha Silbeff8fef52013-06-14 13:07:25 +0200451 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
Simon Glassc40fdca2016-05-01 13:52:35 -0600452 start + blkcnt, block_dev->lba);
Paul Burton56196822013-09-04 16:12:25 +0100453#endif
Lei Wend2bf29e2010-09-13 22:07:27 +0800454 return 0;
455 }
Andy Fleming272cc702008-10-30 16:41:01 -0500456
Simon Glass11692992015-06-23 15:38:50 -0600457 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
458 debug("%s: Failed to set blocklen\n", __func__);
Andy Fleming272cc702008-10-30 16:41:01 -0500459 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600460 }
Andy Fleming272cc702008-10-30 16:41:01 -0500461
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700462 do {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200463 cur = (blocks_todo > mmc->cfg->b_max) ?
464 mmc->cfg->b_max : blocks_todo;
Simon Glass11692992015-06-23 15:38:50 -0600465 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
466 debug("%s: Failed to read blocks\n", __func__);
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700467 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600468 }
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700469 blocks_todo -= cur;
470 start += cur;
471 dst += cur * mmc->read_bl_len;
472 } while (blocks_todo > 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500473
474 return blkcnt;
475}
476
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000477static int mmc_go_idle(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500478{
479 struct mmc_cmd cmd;
480 int err;
481
482 udelay(1000);
483
484 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
485 cmd.cmdarg = 0;
486 cmd.resp_type = MMC_RSP_NONE;
Andy Fleming272cc702008-10-30 16:41:01 -0500487
488 err = mmc_send_cmd(mmc, &cmd, NULL);
489
490 if (err)
491 return err;
492
493 udelay(2000);
494
495 return 0;
496}
497
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +0200498static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
499{
500 struct mmc_cmd cmd;
501 int err = 0;
502
503 /*
504 * Send CMD11 only if the request is to switch the card to
505 * 1.8V signalling.
506 */
507 if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
508 return mmc_set_signal_voltage(mmc, signal_voltage);
509
510 cmd.cmdidx = SD_CMD_SWITCH_UHS18V;
511 cmd.cmdarg = 0;
512 cmd.resp_type = MMC_RSP_R1;
513
514 err = mmc_send_cmd(mmc, &cmd, NULL);
515 if (err)
516 return err;
517
518 if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR))
519 return -EIO;
520
521 /*
522 * The card should drive cmd and dat[0:3] low immediately
523 * after the response of cmd11, but wait 100 us to be sure
524 */
525 err = mmc_wait_dat0(mmc, 0, 100);
526 if (err == -ENOSYS)
527 udelay(100);
528 else if (err)
529 return -ETIMEDOUT;
530
531 /*
532 * During a signal voltage level switch, the clock must be gated
533 * for 5 ms according to the SD spec
534 */
535 mmc_set_clock(mmc, mmc->clock, true);
536
537 err = mmc_set_signal_voltage(mmc, signal_voltage);
538 if (err)
539 return err;
540
541 /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
542 mdelay(10);
543 mmc_set_clock(mmc, mmc->clock, false);
544
545 /*
546 * Failure to switch is indicated by the card holding
547 * dat[0:3] low. Wait for at least 1 ms according to spec
548 */
549 err = mmc_wait_dat0(mmc, 1, 1000);
550 if (err == -ENOSYS)
551 udelay(1000);
552 else if (err)
553 return -ETIMEDOUT;
554
555 return 0;
556}
557
558static int sd_send_op_cond(struct mmc *mmc, bool uhs_en)
Andy Fleming272cc702008-10-30 16:41:01 -0500559{
560 int timeout = 1000;
561 int err;
562 struct mmc_cmd cmd;
563
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500564 while (1) {
Andy Fleming272cc702008-10-30 16:41:01 -0500565 cmd.cmdidx = MMC_CMD_APP_CMD;
566 cmd.resp_type = MMC_RSP_R1;
567 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500568
569 err = mmc_send_cmd(mmc, &cmd, NULL);
570
571 if (err)
572 return err;
573
574 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
575 cmd.resp_type = MMC_RSP_R3;
Stefano Babic250de122010-01-20 18:20:39 +0100576
577 /*
578 * Most cards do not answer if some reserved bits
579 * in the ocr are set. However, Some controller
580 * can set bit 7 (reserved for low voltages), but
581 * how to manage low voltages SD card is not yet
582 * specified.
583 */
Thomas Choud52ebf12010-12-24 13:12:21 +0000584 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200585 (mmc->cfg->voltages & 0xff8000);
Andy Fleming272cc702008-10-30 16:41:01 -0500586
587 if (mmc->version == SD_VERSION_2)
588 cmd.cmdarg |= OCR_HCS;
589
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +0200590 if (uhs_en)
591 cmd.cmdarg |= OCR_S18R;
592
Andy Fleming272cc702008-10-30 16:41:01 -0500593 err = mmc_send_cmd(mmc, &cmd, NULL);
594
595 if (err)
596 return err;
597
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500598 if (cmd.response[0] & OCR_BUSY)
599 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500600
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500601 if (timeout-- <= 0)
Jaehoon Chung915ffa52016-07-19 16:33:36 +0900602 return -EOPNOTSUPP;
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500603
604 udelay(1000);
605 }
Andy Fleming272cc702008-10-30 16:41:01 -0500606
607 if (mmc->version != SD_VERSION_2)
608 mmc->version = SD_VERSION_1_0;
609
Thomas Choud52ebf12010-12-24 13:12:21 +0000610 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
611 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
612 cmd.resp_type = MMC_RSP_R3;
613 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000614
615 err = mmc_send_cmd(mmc, &cmd, NULL);
616
617 if (err)
618 return err;
619 }
620
Rabin Vincent998be3d2009-04-05 13:30:56 +0530621 mmc->ocr = cmd.response[0];
Andy Fleming272cc702008-10-30 16:41:01 -0500622
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +0200623 if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000)
624 == 0x41000000) {
625 err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
626 if (err)
627 return err;
628 }
629
Andy Fleming272cc702008-10-30 16:41:01 -0500630 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
631 mmc->rca = 0;
632
633 return 0;
634}
635
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500636static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
Andy Fleming272cc702008-10-30 16:41:01 -0500637{
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500638 struct mmc_cmd cmd;
Andy Fleming272cc702008-10-30 16:41:01 -0500639 int err;
640
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500641 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
642 cmd.resp_type = MMC_RSP_R3;
643 cmd.cmdarg = 0;
Rob Herring5a203972015-03-23 17:56:59 -0500644 if (use_arg && !mmc_host_is_spi(mmc))
645 cmd.cmdarg = OCR_HCS |
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200646 (mmc->cfg->voltages &
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500647 (mmc->ocr & OCR_VOLTAGE_MASK)) |
648 (mmc->ocr & OCR_ACCESS_MODE);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000649
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500650 err = mmc_send_cmd(mmc, &cmd, NULL);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000651 if (err)
652 return err;
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500653 mmc->ocr = cmd.response[0];
Che-Liang Chioue9550442012-11-28 15:21:13 +0000654 return 0;
655}
656
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200657static int mmc_send_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000658{
Che-Liang Chioue9550442012-11-28 15:21:13 +0000659 int err, i;
660
Andy Fleming272cc702008-10-30 16:41:01 -0500661 /* Some cards seem to need this */
662 mmc_go_idle(mmc);
663
Raffaele Recalcati31cacba2011-03-11 02:01:13 +0000664 /* Asking to the card its capabilities */
Che-Liang Chioue9550442012-11-28 15:21:13 +0000665 for (i = 0; i < 2; i++) {
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500666 err = mmc_send_op_cond_iter(mmc, i != 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500667 if (err)
668 return err;
669
Che-Liang Chioue9550442012-11-28 15:21:13 +0000670 /* exit if not busy (flag seems to be inverted) */
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500671 if (mmc->ocr & OCR_BUSY)
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500672 break;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000673 }
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500674 mmc->op_cond_pending = 1;
675 return 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000676}
Andy Fleming272cc702008-10-30 16:41:01 -0500677
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200678static int mmc_complete_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000679{
680 struct mmc_cmd cmd;
681 int timeout = 1000;
682 uint start;
683 int err;
684
685 mmc->op_cond_pending = 0;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500686 if (!(mmc->ocr & OCR_BUSY)) {
Yangbo Lud188b112016-08-02 15:33:18 +0800687 /* Some cards seem to need this */
688 mmc_go_idle(mmc);
689
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500690 start = get_timer(0);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500691 while (1) {
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500692 err = mmc_send_op_cond_iter(mmc, 1);
693 if (err)
694 return err;
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500695 if (mmc->ocr & OCR_BUSY)
696 break;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500697 if (get_timer(start) > timeout)
Jaehoon Chung915ffa52016-07-19 16:33:36 +0900698 return -EOPNOTSUPP;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500699 udelay(100);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500700 }
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500701 }
Andy Fleming272cc702008-10-30 16:41:01 -0500702
Thomas Choud52ebf12010-12-24 13:12:21 +0000703 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
704 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
705 cmd.resp_type = MMC_RSP_R3;
706 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000707
708 err = mmc_send_cmd(mmc, &cmd, NULL);
709
710 if (err)
711 return err;
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500712
713 mmc->ocr = cmd.response[0];
Thomas Choud52ebf12010-12-24 13:12:21 +0000714 }
715
Andy Fleming272cc702008-10-30 16:41:01 -0500716 mmc->version = MMC_VERSION_UNKNOWN;
Andy Fleming272cc702008-10-30 16:41:01 -0500717
718 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
Stephen Warrendef816a2014-01-30 16:11:12 -0700719 mmc->rca = 1;
Andy Fleming272cc702008-10-30 16:41:01 -0500720
721 return 0;
722}
723
724
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000725static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
Andy Fleming272cc702008-10-30 16:41:01 -0500726{
727 struct mmc_cmd cmd;
728 struct mmc_data data;
729 int err;
730
731 /* Get the Card Status Register */
732 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
733 cmd.resp_type = MMC_RSP_R1;
734 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500735
Yoshihiro Shimodacdfd1ac2012-06-07 19:09:11 +0000736 data.dest = (char *)ext_csd;
Andy Fleming272cc702008-10-30 16:41:01 -0500737 data.blocks = 1;
Simon Glass8bfa1952013-04-03 08:54:30 +0000738 data.blocksize = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -0500739 data.flags = MMC_DATA_READ;
740
741 err = mmc_send_cmd(mmc, &cmd, &data);
742
743 return err;
744}
745
Simon Glassc40704f2016-06-12 23:30:18 -0600746int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
Andy Fleming272cc702008-10-30 16:41:01 -0500747{
748 struct mmc_cmd cmd;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000749 int timeout = 1000;
Maxime Riparda9003dc2016-11-04 16:18:08 +0100750 int retries = 3;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000751 int ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500752
753 cmd.cmdidx = MMC_CMD_SWITCH;
754 cmd.resp_type = MMC_RSP_R1b;
755 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000756 (index << 16) |
757 (value << 8);
Andy Fleming272cc702008-10-30 16:41:01 -0500758
Maxime Riparda9003dc2016-11-04 16:18:08 +0100759 while (retries > 0) {
760 ret = mmc_send_cmd(mmc, &cmd, NULL);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000761
Maxime Riparda9003dc2016-11-04 16:18:08 +0100762 /* Waiting for the ready status */
763 if (!ret) {
764 ret = mmc_send_status(mmc, timeout);
765 return ret;
766 }
767
768 retries--;
769 }
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000770
771 return ret;
772
Andy Fleming272cc702008-10-30 16:41:01 -0500773}
774
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +0200775static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode)
Andy Fleming272cc702008-10-30 16:41:01 -0500776{
Andy Fleming272cc702008-10-30 16:41:01 -0500777 int err;
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +0200778 int speed_bits;
779
780 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
781
782 switch (mode) {
783 case MMC_HS:
784 case MMC_HS_52:
785 case MMC_DDR_52:
786 speed_bits = EXT_CSD_TIMING_HS;
Kishon Vijay Abraham I634d4842017-09-21 16:30:06 +0200787 break;
788 case MMC_HS_200:
789 speed_bits = EXT_CSD_TIMING_HS200;
790 break;
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +0200791 case MMC_LEGACY:
792 speed_bits = EXT_CSD_TIMING_LEGACY;
793 break;
794 default:
795 return -EINVAL;
796 }
797 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
798 speed_bits);
799 if (err)
800 return err;
801
802 if ((mode == MMC_HS) || (mode == MMC_HS_52)) {
803 /* Now check to see that it worked */
804 err = mmc_send_ext_csd(mmc, test_csd);
805 if (err)
806 return err;
807
808 /* No high-speed support */
809 if (!test_csd[EXT_CSD_HS_TIMING])
810 return -ENOTSUPP;
811 }
812
813 return 0;
814}
815
816static int mmc_get_capabilities(struct mmc *mmc)
817{
818 u8 *ext_csd = mmc->ext_csd;
819 char cardtype;
Andy Fleming272cc702008-10-30 16:41:01 -0500820
Jean-Jacques Hiblot00e446f2017-11-30 17:43:56 +0100821 mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
Andy Fleming272cc702008-10-30 16:41:01 -0500822
Thomas Choud52ebf12010-12-24 13:12:21 +0000823 if (mmc_host_is_spi(mmc))
824 return 0;
825
Andy Fleming272cc702008-10-30 16:41:01 -0500826 /* Only version 4 supports high-speed */
827 if (mmc->version < MMC_VERSION_4)
828 return 0;
829
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +0200830 if (!ext_csd) {
831 printf("No ext_csd found!\n"); /* this should enver happen */
832 return -ENOTSUPP;
833 }
834
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600835 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
836
Kishon Vijay Abraham I634d4842017-09-21 16:30:06 +0200837 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0x3f;
Jean-Jacques Hiblotbc1e3272017-09-21 16:30:11 +0200838 mmc->cardtype = cardtype;
Andy Fleming272cc702008-10-30 16:41:01 -0500839
Kishon Vijay Abraham I634d4842017-09-21 16:30:06 +0200840 if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
841 EXT_CSD_CARD_TYPE_HS200_1_8V)) {
842 mmc->card_caps |= MMC_MODE_HS200;
843 }
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900844 if (cardtype & EXT_CSD_CARD_TYPE_52) {
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +0200845 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900846 mmc->card_caps |= MMC_MODE_DDR_52MHz;
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +0200847 mmc->card_caps |= MMC_MODE_HS_52MHz;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900848 }
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +0200849 if (cardtype & EXT_CSD_CARD_TYPE_26)
850 mmc->card_caps |= MMC_MODE_HS;
Andy Fleming272cc702008-10-30 16:41:01 -0500851
852 return 0;
853}
854
Stephen Warrenf866a462013-06-11 15:14:01 -0600855static int mmc_set_capacity(struct mmc *mmc, int part_num)
856{
857 switch (part_num) {
858 case 0:
859 mmc->capacity = mmc->capacity_user;
860 break;
861 case 1:
862 case 2:
863 mmc->capacity = mmc->capacity_boot;
864 break;
865 case 3:
866 mmc->capacity = mmc->capacity_rpmb;
867 break;
868 case 4:
869 case 5:
870 case 6:
871 case 7:
872 mmc->capacity = mmc->capacity_gp[part_num - 4];
873 break;
874 default:
875 return -1;
876 }
877
Simon Glassc40fdca2016-05-01 13:52:35 -0600878 mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Stephen Warrenf866a462013-06-11 15:14:01 -0600879
880 return 0;
881}
882
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +0200883static int mmc_boot_part_access_chk(struct mmc *mmc, unsigned int part_num)
884{
885 int forbidden = 0;
886 bool change = false;
887
888 if (part_num & PART_ACCESS_MASK)
889 forbidden = MMC_CAP(MMC_HS_200);
890
891 if (MMC_CAP(mmc->selected_mode) & forbidden) {
892 debug("selected mode (%s) is forbidden for part %d\n",
893 mmc_mode_name(mmc->selected_mode), part_num);
894 change = true;
895 } else if (mmc->selected_mode != mmc->best_mode) {
896 debug("selected mode is not optimal\n");
897 change = true;
898 }
899
900 if (change)
901 return mmc_select_mode_and_width(mmc,
902 mmc->card_caps & ~forbidden);
903
904 return 0;
905}
906
Simon Glass7dba0b92016-06-12 23:30:15 -0600907int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
Lei Wenbc897b12011-05-02 16:26:26 +0000908{
Stephen Warrenf866a462013-06-11 15:14:01 -0600909 int ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000910
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +0200911 ret = mmc_boot_part_access_chk(mmc, part_num);
912 if (ret)
913 return ret;
914
Stephen Warrenf866a462013-06-11 15:14:01 -0600915 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
916 (mmc->part_config & ~PART_ACCESS_MASK)
917 | (part_num & PART_ACCESS_MASK));
Stephen Warrenf866a462013-06-11 15:14:01 -0600918
Peter Bigot6dc93e72014-09-02 18:31:23 -0500919 /*
920 * Set the capacity if the switch succeeded or was intended
921 * to return to representing the raw device.
922 */
Stephen Warren873cc1d2015-12-07 11:38:49 -0700923 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
Peter Bigot6dc93e72014-09-02 18:31:23 -0500924 ret = mmc_set_capacity(mmc, part_num);
Simon Glassfdbb1392016-05-01 13:52:37 -0600925 mmc_get_blk_desc(mmc)->hwpart = part_num;
Stephen Warren873cc1d2015-12-07 11:38:49 -0700926 }
Peter Bigot6dc93e72014-09-02 18:31:23 -0500927
928 return ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000929}
930
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100931int mmc_hwpart_config(struct mmc *mmc,
932 const struct mmc_hwpart_conf *conf,
933 enum mmc_hwpart_conf_mode mode)
934{
935 u8 part_attrs = 0;
936 u32 enh_size_mult;
937 u32 enh_start_addr;
938 u32 gp_size_mult[4];
939 u32 max_enh_size_mult;
940 u32 tot_enh_size_mult = 0;
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100941 u8 wr_rel_set;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100942 int i, pidx, err;
943 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
944
945 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
946 return -EINVAL;
947
948 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
949 printf("eMMC >= 4.4 required for enhanced user data area\n");
950 return -EMEDIUMTYPE;
951 }
952
953 if (!(mmc->part_support & PART_SUPPORT)) {
954 printf("Card does not support partitioning\n");
955 return -EMEDIUMTYPE;
956 }
957
958 if (!mmc->hc_wp_grp_size) {
959 printf("Card does not define HC WP group size\n");
960 return -EMEDIUMTYPE;
961 }
962
963 /* check partition alignment and total enhanced size */
964 if (conf->user.enh_size) {
965 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
966 conf->user.enh_start % mmc->hc_wp_grp_size) {
967 printf("User data enhanced area not HC WP group "
968 "size aligned\n");
969 return -EINVAL;
970 }
971 part_attrs |= EXT_CSD_ENH_USR;
972 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
973 if (mmc->high_capacity) {
974 enh_start_addr = conf->user.enh_start;
975 } else {
976 enh_start_addr = (conf->user.enh_start << 9);
977 }
978 } else {
979 enh_size_mult = 0;
980 enh_start_addr = 0;
981 }
982 tot_enh_size_mult += enh_size_mult;
983
984 for (pidx = 0; pidx < 4; pidx++) {
985 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
986 printf("GP%i partition not HC WP group size "
987 "aligned\n", pidx+1);
988 return -EINVAL;
989 }
990 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
991 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
992 part_attrs |= EXT_CSD_ENH_GP(pidx);
993 tot_enh_size_mult += gp_size_mult[pidx];
994 }
995 }
996
997 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
998 printf("Card does not support enhanced attribute\n");
999 return -EMEDIUMTYPE;
1000 }
1001
1002 err = mmc_send_ext_csd(mmc, ext_csd);
1003 if (err)
1004 return err;
1005
1006 max_enh_size_mult =
1007 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
1008 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
1009 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
1010 if (tot_enh_size_mult > max_enh_size_mult) {
1011 printf("Total enhanced size exceeds maximum (%u > %u)\n",
1012 tot_enh_size_mult, max_enh_size_mult);
1013 return -EMEDIUMTYPE;
1014 }
1015
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +01001016 /* The default value of EXT_CSD_WR_REL_SET is device
1017 * dependent, the values can only be changed if the
1018 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
1019 * changed only once and before partitioning is completed. */
1020 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1021 if (conf->user.wr_rel_change) {
1022 if (conf->user.wr_rel_set)
1023 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
1024 else
1025 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
1026 }
1027 for (pidx = 0; pidx < 4; pidx++) {
1028 if (conf->gp_part[pidx].wr_rel_change) {
1029 if (conf->gp_part[pidx].wr_rel_set)
1030 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
1031 else
1032 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
1033 }
1034 }
1035
1036 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
1037 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
1038 puts("Card does not support host controlled partition write "
1039 "reliability settings\n");
1040 return -EMEDIUMTYPE;
1041 }
1042
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +01001043 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
1044 EXT_CSD_PARTITION_SETTING_COMPLETED) {
1045 printf("Card already partitioned\n");
1046 return -EPERM;
1047 }
1048
1049 if (mode == MMC_HWPART_CONF_CHECK)
1050 return 0;
1051
1052 /* Partitioning requires high-capacity size definitions */
1053 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
1054 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1055 EXT_CSD_ERASE_GROUP_DEF, 1);
1056
1057 if (err)
1058 return err;
1059
1060 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1061
1062 /* update erase group size to be high-capacity */
1063 mmc->erase_grp_size =
1064 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1065
1066 }
1067
1068 /* all OK, write the configuration */
1069 for (i = 0; i < 4; i++) {
1070 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1071 EXT_CSD_ENH_START_ADDR+i,
1072 (enh_start_addr >> (i*8)) & 0xFF);
1073 if (err)
1074 return err;
1075 }
1076 for (i = 0; i < 3; i++) {
1077 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1078 EXT_CSD_ENH_SIZE_MULT+i,
1079 (enh_size_mult >> (i*8)) & 0xFF);
1080 if (err)
1081 return err;
1082 }
1083 for (pidx = 0; pidx < 4; pidx++) {
1084 for (i = 0; i < 3; i++) {
1085 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1086 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
1087 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
1088 if (err)
1089 return err;
1090 }
1091 }
1092 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1093 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
1094 if (err)
1095 return err;
1096
1097 if (mode == MMC_HWPART_CONF_SET)
1098 return 0;
1099
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +01001100 /* The WR_REL_SET is a write-once register but shall be
1101 * written before setting PART_SETTING_COMPLETED. As it is
1102 * write-once we can only write it when completing the
1103 * partitioning. */
1104 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
1105 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1106 EXT_CSD_WR_REL_SET, wr_rel_set);
1107 if (err)
1108 return err;
1109 }
1110
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +01001111 /* Setting PART_SETTING_COMPLETED confirms the partition
1112 * configuration but it only becomes effective after power
1113 * cycle, so we do not adjust the partition related settings
1114 * in the mmc struct. */
1115
1116 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1117 EXT_CSD_PARTITION_SETTING,
1118 EXT_CSD_PARTITION_SETTING_COMPLETED);
1119 if (err)
1120 return err;
1121
1122 return 0;
1123}
1124
Simon Glasse7881d82017-07-29 11:35:31 -06001125#if !CONFIG_IS_ENABLED(DM_MMC)
Thierry Reding48972d92012-01-02 01:15:37 +00001126int mmc_getcd(struct mmc *mmc)
1127{
1128 int cd;
1129
1130 cd = board_mmc_getcd(mmc);
1131
Peter Korsgaardd4e1da42013-03-21 04:00:03 +00001132 if (cd < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001133 if (mmc->cfg->ops->getcd)
1134 cd = mmc->cfg->ops->getcd(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +00001135 else
1136 cd = 1;
1137 }
Thierry Reding48972d92012-01-02 01:15:37 +00001138
1139 return cd;
1140}
Simon Glass8ca51e52016-06-12 23:30:22 -06001141#endif
Thierry Reding48972d92012-01-02 01:15:37 +00001142
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001143static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
Andy Fleming272cc702008-10-30 16:41:01 -05001144{
1145 struct mmc_cmd cmd;
1146 struct mmc_data data;
1147
1148 /* Switch the frequency */
1149 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
1150 cmd.resp_type = MMC_RSP_R1;
1151 cmd.cmdarg = (mode << 31) | 0xffffff;
1152 cmd.cmdarg &= ~(0xf << (group * 4));
1153 cmd.cmdarg |= value << (group * 4);
Andy Fleming272cc702008-10-30 16:41:01 -05001154
1155 data.dest = (char *)resp;
1156 data.blocksize = 64;
1157 data.blocks = 1;
1158 data.flags = MMC_DATA_READ;
1159
1160 return mmc_send_cmd(mmc, &cmd, &data);
1161}
1162
1163
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001164static int sd_get_capabilities(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001165{
1166 int err;
1167 struct mmc_cmd cmd;
Suniel Mahesh18e7c8f2017-10-05 11:32:00 +05301168 ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
1169 ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
Andy Fleming272cc702008-10-30 16:41:01 -05001170 struct mmc_data data;
1171 int timeout;
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001172 u32 sd3_bus_mode;
Andy Fleming272cc702008-10-30 16:41:01 -05001173
Jean-Jacques Hiblot00e446f2017-11-30 17:43:56 +01001174 mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(SD_LEGACY);
Andy Fleming272cc702008-10-30 16:41:01 -05001175
Thomas Choud52ebf12010-12-24 13:12:21 +00001176 if (mmc_host_is_spi(mmc))
1177 return 0;
1178
Andy Fleming272cc702008-10-30 16:41:01 -05001179 /* Read the SCR to find out if this card supports higher speeds */
1180 cmd.cmdidx = MMC_CMD_APP_CMD;
1181 cmd.resp_type = MMC_RSP_R1;
1182 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001183
1184 err = mmc_send_cmd(mmc, &cmd, NULL);
1185
1186 if (err)
1187 return err;
1188
1189 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
1190 cmd.resp_type = MMC_RSP_R1;
1191 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001192
1193 timeout = 3;
1194
1195retry_scr:
Anton staaff781dd32011-10-03 13:54:59 +00001196 data.dest = (char *)scr;
Andy Fleming272cc702008-10-30 16:41:01 -05001197 data.blocksize = 8;
1198 data.blocks = 1;
1199 data.flags = MMC_DATA_READ;
1200
1201 err = mmc_send_cmd(mmc, &cmd, &data);
1202
1203 if (err) {
1204 if (timeout--)
1205 goto retry_scr;
1206
1207 return err;
1208 }
1209
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +03001210 mmc->scr[0] = __be32_to_cpu(scr[0]);
1211 mmc->scr[1] = __be32_to_cpu(scr[1]);
Andy Fleming272cc702008-10-30 16:41:01 -05001212
1213 switch ((mmc->scr[0] >> 24) & 0xf) {
Bin Meng53e8e402016-03-17 21:53:13 -07001214 case 0:
1215 mmc->version = SD_VERSION_1_0;
1216 break;
1217 case 1:
1218 mmc->version = SD_VERSION_1_10;
1219 break;
1220 case 2:
1221 mmc->version = SD_VERSION_2;
1222 if ((mmc->scr[0] >> 15) & 0x1)
1223 mmc->version = SD_VERSION_3;
1224 break;
1225 default:
1226 mmc->version = SD_VERSION_1_0;
1227 break;
Andy Fleming272cc702008-10-30 16:41:01 -05001228 }
1229
Alagu Sankarb44c7082010-05-12 15:08:24 +05301230 if (mmc->scr[0] & SD_DATA_4BIT)
1231 mmc->card_caps |= MMC_MODE_4BIT;
1232
Andy Fleming272cc702008-10-30 16:41:01 -05001233 /* Version 1.0 doesn't support switching */
1234 if (mmc->version == SD_VERSION_1_0)
1235 return 0;
1236
1237 timeout = 4;
1238 while (timeout--) {
1239 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
Anton staaff781dd32011-10-03 13:54:59 +00001240 (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -05001241
1242 if (err)
1243 return err;
1244
1245 /* The high-speed function is busy. Try again */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +03001246 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
Andy Fleming272cc702008-10-30 16:41:01 -05001247 break;
1248 }
1249
Andy Fleming272cc702008-10-30 16:41:01 -05001250 /* If high-speed isn't supported, we return */
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001251 if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)
1252 mmc->card_caps |= MMC_CAP(SD_HS);
Andy Fleming272cc702008-10-30 16:41:01 -05001253
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001254 /* Version before 3.0 don't support UHS modes */
1255 if (mmc->version < SD_VERSION_3)
1256 return 0;
1257
1258 sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f;
1259 if (sd3_bus_mode & SD_MODE_UHS_SDR104)
1260 mmc->card_caps |= MMC_CAP(UHS_SDR104);
1261 if (sd3_bus_mode & SD_MODE_UHS_SDR50)
1262 mmc->card_caps |= MMC_CAP(UHS_SDR50);
1263 if (sd3_bus_mode & SD_MODE_UHS_SDR25)
1264 mmc->card_caps |= MMC_CAP(UHS_SDR25);
1265 if (sd3_bus_mode & SD_MODE_UHS_SDR12)
1266 mmc->card_caps |= MMC_CAP(UHS_SDR12);
1267 if (sd3_bus_mode & SD_MODE_UHS_DDR50)
1268 mmc->card_caps |= MMC_CAP(UHS_DDR50);
1269
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001270 return 0;
1271}
1272
1273static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode)
1274{
1275 int err;
1276
1277 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001278 int speed;
Macpaul Lin2c3fbf42011-11-28 16:31:09 +00001279
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001280 switch (mode) {
1281 case SD_LEGACY:
1282 case UHS_SDR12:
1283 speed = UHS_SDR12_BUS_SPEED;
1284 break;
1285 case SD_HS:
1286 case UHS_SDR25:
1287 speed = UHS_SDR25_BUS_SPEED;
1288 break;
1289 case UHS_SDR50:
1290 speed = UHS_SDR50_BUS_SPEED;
1291 break;
1292 case UHS_DDR50:
1293 speed = UHS_DDR50_BUS_SPEED;
1294 break;
1295 case UHS_SDR104:
1296 speed = UHS_SDR104_BUS_SPEED;
1297 break;
1298 default:
1299 return -EINVAL;
1300 }
1301
1302 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -05001303 if (err)
1304 return err;
1305
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001306 if ((__be32_to_cpu(switch_status[4]) >> 24) != speed)
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001307 return -ENOTSUPP;
1308
1309 return 0;
1310}
1311
1312int sd_select_bus_width(struct mmc *mmc, int w)
1313{
1314 int err;
1315 struct mmc_cmd cmd;
1316
1317 if ((w != 4) && (w != 1))
1318 return -EINVAL;
1319
1320 cmd.cmdidx = MMC_CMD_APP_CMD;
1321 cmd.resp_type = MMC_RSP_R1;
1322 cmd.cmdarg = mmc->rca << 16;
1323
1324 err = mmc_send_cmd(mmc, &cmd, NULL);
1325 if (err)
1326 return err;
1327
1328 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1329 cmd.resp_type = MMC_RSP_R1;
1330 if (w == 4)
1331 cmd.cmdarg = 2;
1332 else if (w == 1)
1333 cmd.cmdarg = 0;
1334 err = mmc_send_cmd(mmc, &cmd, NULL);
1335 if (err)
1336 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001337
1338 return 0;
1339}
1340
Peng Fan3697e592016-09-01 11:13:38 +08001341static int sd_read_ssr(struct mmc *mmc)
1342{
1343 int err, i;
1344 struct mmc_cmd cmd;
1345 ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1346 struct mmc_data data;
1347 int timeout = 3;
1348 unsigned int au, eo, et, es;
1349
1350 cmd.cmdidx = MMC_CMD_APP_CMD;
1351 cmd.resp_type = MMC_RSP_R1;
1352 cmd.cmdarg = mmc->rca << 16;
1353
1354 err = mmc_send_cmd(mmc, &cmd, NULL);
1355 if (err)
1356 return err;
1357
1358 cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1359 cmd.resp_type = MMC_RSP_R1;
1360 cmd.cmdarg = 0;
1361
1362retry_ssr:
1363 data.dest = (char *)ssr;
1364 data.blocksize = 64;
1365 data.blocks = 1;
1366 data.flags = MMC_DATA_READ;
1367
1368 err = mmc_send_cmd(mmc, &cmd, &data);
1369 if (err) {
1370 if (timeout--)
1371 goto retry_ssr;
1372
1373 return err;
1374 }
1375
1376 for (i = 0; i < 16; i++)
1377 ssr[i] = be32_to_cpu(ssr[i]);
1378
1379 au = (ssr[2] >> 12) & 0xF;
1380 if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1381 mmc->ssr.au = sd_au_size[au];
1382 es = (ssr[3] >> 24) & 0xFF;
1383 es |= (ssr[2] & 0xFF) << 8;
1384 et = (ssr[3] >> 18) & 0x3F;
1385 if (es && et) {
1386 eo = (ssr[3] >> 16) & 0x3;
1387 mmc->ssr.erase_timeout = (et * 1000) / es;
1388 mmc->ssr.erase_offset = eo * 1000;
1389 }
1390 } else {
1391 debug("Invalid Allocation Unit Size.\n");
1392 }
1393
1394 return 0;
1395}
1396
Andy Fleming272cc702008-10-30 16:41:01 -05001397/* frequency bases */
1398/* divided by 10 to be nice to platforms without floating point */
Mike Frysinger5f837c22010-10-20 01:15:53 +00001399static const int fbase[] = {
Andy Fleming272cc702008-10-30 16:41:01 -05001400 10000,
1401 100000,
1402 1000000,
1403 10000000,
1404};
1405
1406/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
1407 * to platforms without floating point.
1408 */
Simon Glass61fe0762016-05-14 14:02:57 -06001409static const u8 multipliers[] = {
Andy Fleming272cc702008-10-30 16:41:01 -05001410 0, /* reserved */
1411 10,
1412 12,
1413 13,
1414 15,
1415 20,
1416 25,
1417 30,
1418 35,
1419 40,
1420 45,
1421 50,
1422 55,
1423 60,
1424 70,
1425 80,
1426};
1427
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001428static inline int bus_width(uint cap)
1429{
1430 if (cap == MMC_MODE_8BIT)
1431 return 8;
1432 if (cap == MMC_MODE_4BIT)
1433 return 4;
1434 if (cap == MMC_MODE_1BIT)
1435 return 1;
1436 printf("invalid bus witdh capability 0x%x\n", cap);
1437 return 0;
1438}
1439
Simon Glasse7881d82017-07-29 11:35:31 -06001440#if !CONFIG_IS_ENABLED(DM_MMC)
Kishon Vijay Abraham Iec841202017-09-21 16:30:05 +02001441static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
1442{
1443 return -ENOTSUPP;
1444}
1445
Jean-Jacques Hiblot318a7a52017-09-21 16:30:01 +02001446static void mmc_send_init_stream(struct mmc *mmc)
1447{
1448}
1449
Kishon Vijay Abraham I2a4d2122017-09-21 16:29:59 +02001450static int mmc_set_ios(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001451{
Kishon Vijay Abraham I2a4d2122017-09-21 16:29:59 +02001452 int ret = 0;
1453
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001454 if (mmc->cfg->ops->set_ios)
Kishon Vijay Abraham I2a4d2122017-09-21 16:29:59 +02001455 ret = mmc->cfg->ops->set_ios(mmc);
1456
1457 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -05001458}
Simon Glass8ca51e52016-06-12 23:30:22 -06001459#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001460
Kishon Vijay Abraham I35f67822017-09-21 16:30:03 +02001461int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
Andy Fleming272cc702008-10-30 16:41:01 -05001462{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001463 if (clock > mmc->cfg->f_max)
1464 clock = mmc->cfg->f_max;
Andy Fleming272cc702008-10-30 16:41:01 -05001465
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001466 if (clock < mmc->cfg->f_min)
1467 clock = mmc->cfg->f_min;
Andy Fleming272cc702008-10-30 16:41:01 -05001468
1469 mmc->clock = clock;
Kishon Vijay Abraham I35f67822017-09-21 16:30:03 +02001470 mmc->clk_disable = disable;
Andy Fleming272cc702008-10-30 16:41:01 -05001471
Kishon Vijay Abraham I2a4d2122017-09-21 16:29:59 +02001472 return mmc_set_ios(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001473}
1474
Kishon Vijay Abraham I2a4d2122017-09-21 16:29:59 +02001475static int mmc_set_bus_width(struct mmc *mmc, uint width)
Andy Fleming272cc702008-10-30 16:41:01 -05001476{
1477 mmc->bus_width = width;
1478
Kishon Vijay Abraham I2a4d2122017-09-21 16:29:59 +02001479 return mmc_set_ios(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001480}
1481
Jean-Jacques Hiblot4c9d2aa2017-09-21 16:29:54 +02001482#if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1483/*
1484 * helper function to display the capabilities in a human
1485 * friendly manner. The capabilities include bus width and
1486 * supported modes.
1487 */
1488void mmc_dump_capabilities(const char *text, uint caps)
1489{
1490 enum bus_mode mode;
1491
1492 printf("%s: widths [", text);
1493 if (caps & MMC_MODE_8BIT)
1494 printf("8, ");
1495 if (caps & MMC_MODE_4BIT)
1496 printf("4, ");
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001497 if (caps & MMC_MODE_1BIT)
1498 printf("1, ");
1499 printf("\b\b] modes [");
Jean-Jacques Hiblot4c9d2aa2017-09-21 16:29:54 +02001500 for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1501 if (MMC_CAP(mode) & caps)
1502 printf("%s, ", mmc_mode_name(mode));
1503 printf("\b\b]\n");
1504}
1505#endif
1506
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001507struct mode_width_tuning {
1508 enum bus_mode mode;
1509 uint widths;
Kishon Vijay Abraham I634d4842017-09-21 16:30:06 +02001510 uint tuning;
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001511};
1512
Jean-Jacques Hiblotbc1e3272017-09-21 16:30:11 +02001513int mmc_voltage_to_mv(enum mmc_voltage voltage)
1514{
1515 switch (voltage) {
1516 case MMC_SIGNAL_VOLTAGE_000: return 0;
1517 case MMC_SIGNAL_VOLTAGE_330: return 3300;
1518 case MMC_SIGNAL_VOLTAGE_180: return 1800;
1519 case MMC_SIGNAL_VOLTAGE_120: return 1200;
1520 }
1521 return -EINVAL;
1522}
1523
Kishon Vijay Abraham Iaff5d3c2017-09-21 16:30:00 +02001524static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1525{
Jean-Jacques Hiblotbc1e3272017-09-21 16:30:11 +02001526 int err;
1527
1528 if (mmc->signal_voltage == signal_voltage)
1529 return 0;
1530
Kishon Vijay Abraham Iaff5d3c2017-09-21 16:30:00 +02001531 mmc->signal_voltage = signal_voltage;
Jean-Jacques Hiblotbc1e3272017-09-21 16:30:11 +02001532 err = mmc_set_ios(mmc);
1533 if (err)
1534 debug("unable to set voltage (err %d)\n", err);
1535
1536 return err;
Kishon Vijay Abraham Iaff5d3c2017-09-21 16:30:00 +02001537}
1538
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001539static const struct mode_width_tuning sd_modes_by_pref[] = {
1540 {
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001541 .mode = UHS_SDR104,
1542 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1543 .tuning = MMC_CMD_SEND_TUNING_BLOCK
1544 },
1545 {
1546 .mode = UHS_SDR50,
1547 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1548 },
1549 {
1550 .mode = UHS_DDR50,
1551 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1552 },
1553 {
1554 .mode = UHS_SDR25,
1555 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1556 },
1557 {
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001558 .mode = SD_HS,
1559 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1560 },
1561 {
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001562 .mode = UHS_SDR12,
1563 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1564 },
1565 {
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001566 .mode = SD_LEGACY,
1567 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1568 }
1569};
1570
1571#define for_each_sd_mode_by_pref(caps, mwt) \
1572 for (mwt = sd_modes_by_pref;\
1573 mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\
1574 mwt++) \
1575 if (caps & MMC_CAP(mwt->mode))
1576
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +02001577static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001578{
1579 int err;
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001580 uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT};
1581 const struct mode_width_tuning *mwt;
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001582 bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false;
1583 uint caps;
1584
Jean-Jacques Hiblot52d241d2017-11-30 17:43:54 +01001585#ifdef DEBUG
1586 mmc_dump_capabilities("sd card", card_caps);
1587 mmc_dump_capabilities("host", mmc->host_caps | MMC_MODE_1BIT);
1588#endif
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001589
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001590 /* Restrict card's capabilities by what the host can do */
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +02001591 caps = card_caps & (mmc->host_caps | MMC_MODE_1BIT);
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001592
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001593 if (!uhs_en)
1594 caps &= ~UHS_CAPS;
1595
1596 for_each_sd_mode_by_pref(caps, mwt) {
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001597 uint *w;
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001598
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001599 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001600 if (*w & caps & mwt->widths) {
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001601 debug("trying mode %s width %d (at %d MHz)\n",
1602 mmc_mode_name(mwt->mode),
1603 bus_width(*w),
1604 mmc_mode2freq(mmc, mwt->mode) / 1000000);
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001605
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001606 /* configure the bus width (card + host) */
1607 err = sd_select_bus_width(mmc, bus_width(*w));
1608 if (err)
1609 goto error;
1610 mmc_set_bus_width(mmc, bus_width(*w));
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001611
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001612 /* configure the bus mode (card) */
1613 err = sd_set_card_speed(mmc, mwt->mode);
1614 if (err)
1615 goto error;
1616
1617 /* configure the bus mode (host) */
1618 mmc_select_mode(mmc, mwt->mode);
Kishon Vijay Abraham I35f67822017-09-21 16:30:03 +02001619 mmc_set_clock(mmc, mmc->tran_speed, false);
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001620
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02001621 /* execute tuning if needed */
1622 if (mwt->tuning && !mmc_host_is_spi(mmc)) {
1623 err = mmc_execute_tuning(mmc,
1624 mwt->tuning);
1625 if (err) {
1626 debug("tuning failed\n");
1627 goto error;
1628 }
1629 }
1630
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001631 err = sd_read_ssr(mmc);
1632 if (!err)
1633 return 0;
1634
1635 printf("bad ssr\n");
1636
1637error:
1638 /* revert to a safer bus speed */
1639 mmc_select_mode(mmc, SD_LEGACY);
Kishon Vijay Abraham I35f67822017-09-21 16:30:03 +02001640 mmc_set_clock(mmc, mmc->tran_speed, false);
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001641 }
1642 }
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001643 }
1644
Jean-Jacques Hiblotd0c221f2017-09-21 16:29:57 +02001645 printf("unable to select a mode\n");
1646 return -ENOTSUPP;
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001647}
1648
Jean-Jacques Hiblot7382e692017-09-21 16:29:52 +02001649/*
1650 * read the compare the part of ext csd that is constant.
1651 * This can be used to check that the transfer is working
1652 * as expected.
1653 */
1654static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
1655{
1656 int err;
1657 const u8 *ext_csd = mmc->ext_csd;
1658 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1659
1660 err = mmc_send_ext_csd(mmc, test_csd);
1661 if (err)
1662 return err;
1663
1664 /* Only compare read only fields */
1665 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1666 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1667 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1668 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1669 ext_csd[EXT_CSD_REV]
1670 == test_csd[EXT_CSD_REV] &&
1671 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1672 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1673 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1674 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1675 return 0;
1676
1677 return -EBADMSG;
1678}
1679
Jean-Jacques Hiblotbc1e3272017-09-21 16:30:11 +02001680static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1681 uint32_t allowed_mask)
1682{
1683 u32 card_mask = 0;
1684
1685 switch (mode) {
1686 case MMC_HS_200:
1687 if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_8V)
1688 card_mask |= MMC_SIGNAL_VOLTAGE_180;
1689 if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_2V)
1690 card_mask |= MMC_SIGNAL_VOLTAGE_120;
1691 break;
1692 case MMC_DDR_52:
1693 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
1694 card_mask |= MMC_SIGNAL_VOLTAGE_330 |
1695 MMC_SIGNAL_VOLTAGE_180;
1696 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V)
1697 card_mask |= MMC_SIGNAL_VOLTAGE_120;
1698 break;
1699 default:
1700 card_mask |= MMC_SIGNAL_VOLTAGE_330;
1701 break;
1702 }
1703
1704 while (card_mask & allowed_mask) {
1705 enum mmc_voltage best_match;
1706
1707 best_match = 1 << (ffs(card_mask & allowed_mask) - 1);
1708 if (!mmc_set_signal_voltage(mmc, best_match))
1709 return 0;
1710
1711 allowed_mask &= ~best_match;
1712 }
1713
1714 return -ENOTSUPP;
1715}
1716
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001717static const struct mode_width_tuning mmc_modes_by_pref[] = {
1718 {
1719 .mode = MMC_HS_200,
1720 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
Kishon Vijay Abraham I634d4842017-09-21 16:30:06 +02001721 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001722 },
1723 {
1724 .mode = MMC_DDR_52,
1725 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1726 },
1727 {
1728 .mode = MMC_HS_52,
1729 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1730 },
1731 {
1732 .mode = MMC_HS,
1733 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1734 },
1735 {
1736 .mode = MMC_LEGACY,
1737 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1738 }
1739};
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001740
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001741#define for_each_mmc_mode_by_pref(caps, mwt) \
1742 for (mwt = mmc_modes_by_pref;\
1743 mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\
1744 mwt++) \
1745 if (caps & MMC_CAP(mwt->mode))
1746
1747static const struct ext_csd_bus_width {
1748 uint cap;
1749 bool is_ddr;
1750 uint ext_csd_bits;
1751} ext_csd_bus_width[] = {
1752 {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8},
1753 {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4},
1754 {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8},
1755 {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4},
1756 {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1},
1757};
1758
1759#define for_each_supported_width(caps, ddr, ecbv) \
1760 for (ecbv = ext_csd_bus_width;\
1761 ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\
1762 ecbv++) \
1763 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap))
1764
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +02001765static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001766{
1767 int err;
1768 const struct mode_width_tuning *mwt;
1769 const struct ext_csd_bus_width *ecbw;
1770
Jean-Jacques Hiblot52d241d2017-11-30 17:43:54 +01001771#ifdef DEBUG
1772 mmc_dump_capabilities("mmc", card_caps);
1773 mmc_dump_capabilities("host", mmc->host_caps | MMC_MODE_1BIT);
1774#endif
1775
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001776 /* Restrict card's capabilities by what the host can do */
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +02001777 card_caps &= (mmc->host_caps | MMC_MODE_1BIT);
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001778
1779 /* Only version 4 of MMC supports wider bus widths */
1780 if (mmc->version < MMC_VERSION_4)
1781 return 0;
1782
Jean-Jacques Hiblotdfda9d82017-09-21 16:29:51 +02001783 if (!mmc->ext_csd) {
1784 debug("No ext_csd found!\n"); /* this should enver happen */
1785 return -ENOTSUPP;
1786 }
1787
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +02001788 mmc_set_clock(mmc, mmc->legacy_speed, false);
1789
1790 for_each_mmc_mode_by_pref(card_caps, mwt) {
1791 for_each_supported_width(card_caps & mwt->widths,
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001792 mmc_is_mode_ddr(mwt->mode), ecbw) {
Jean-Jacques Hiblotbc1e3272017-09-21 16:30:11 +02001793 enum mmc_voltage old_voltage;
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001794 debug("trying mode %s width %d (at %d MHz)\n",
1795 mmc_mode_name(mwt->mode),
1796 bus_width(ecbw->cap),
1797 mmc_mode2freq(mmc, mwt->mode) / 1000000);
Jean-Jacques Hiblotbc1e3272017-09-21 16:30:11 +02001798 old_voltage = mmc->signal_voltage;
1799 err = mmc_set_lowest_voltage(mmc, mwt->mode,
1800 MMC_ALL_SIGNAL_VOLTAGE);
1801 if (err)
1802 continue;
1803
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001804 /* configure the bus width (card + host) */
1805 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1806 EXT_CSD_BUS_WIDTH,
1807 ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG);
1808 if (err)
1809 goto error;
1810 mmc_set_bus_width(mmc, bus_width(ecbw->cap));
1811
1812 /* configure the bus speed (card) */
1813 err = mmc_set_card_speed(mmc, mwt->mode);
1814 if (err)
1815 goto error;
1816
1817 /*
1818 * configure the bus width AND the ddr mode (card)
1819 * The host side will be taken care of in the next step
1820 */
1821 if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) {
1822 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1823 EXT_CSD_BUS_WIDTH,
1824 ecbw->ext_csd_bits);
1825 if (err)
1826 goto error;
1827 }
1828
1829 /* configure the bus mode (host) */
1830 mmc_select_mode(mmc, mwt->mode);
Kishon Vijay Abraham I35f67822017-09-21 16:30:03 +02001831 mmc_set_clock(mmc, mmc->tran_speed, false);
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001832
Kishon Vijay Abraham I634d4842017-09-21 16:30:06 +02001833 /* execute tuning if needed */
1834 if (mwt->tuning) {
1835 err = mmc_execute_tuning(mmc, mwt->tuning);
1836 if (err) {
1837 debug("tuning failed\n");
1838 goto error;
1839 }
1840 }
1841
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001842 /* do a transfer to check the configuration */
1843 err = mmc_read_and_compare_ext_csd(mmc);
1844 if (!err)
1845 return 0;
1846error:
Jean-Jacques Hiblotbc1e3272017-09-21 16:30:11 +02001847 mmc_set_signal_voltage(mmc, old_voltage);
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001848 /* if an error occured, revert to a safer bus mode */
1849 mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1850 EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1);
1851 mmc_select_mode(mmc, MMC_LEGACY);
1852 mmc_set_bus_width(mmc, 1);
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001853 }
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001854 }
1855
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001856 printf("unable to select a mode\n");
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001857
Jean-Jacques Hiblot3862b852017-09-21 16:29:58 +02001858 return -ENOTSUPP;
Jean-Jacques Hiblot8ac8a262017-09-21 16:29:49 +02001859}
1860
Jean-Jacques Hiblotdfda9d82017-09-21 16:29:51 +02001861static int mmc_startup_v4(struct mmc *mmc)
Jean-Jacques Hiblotc744b6f2017-09-21 16:29:50 +02001862{
1863 int err, i;
1864 u64 capacity;
1865 bool has_parts = false;
1866 bool part_completed;
Jean-Jacques Hiblotdfda9d82017-09-21 16:29:51 +02001867 u8 *ext_csd;
Jean-Jacques Hiblotc744b6f2017-09-21 16:29:50 +02001868
1869 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
1870 return 0;
1871
Jean-Jacques Hiblotdfda9d82017-09-21 16:29:51 +02001872 ext_csd = malloc_cache_aligned(MMC_MAX_BLOCK_LEN);
1873 if (!ext_csd)
1874 return -ENOMEM;
1875
1876 mmc->ext_csd = ext_csd;
1877
Jean-Jacques Hiblotc744b6f2017-09-21 16:29:50 +02001878 /* check ext_csd version and capacity */
1879 err = mmc_send_ext_csd(mmc, ext_csd);
1880 if (err)
1881 return err;
1882 if (ext_csd[EXT_CSD_REV] >= 2) {
1883 /*
1884 * According to the JEDEC Standard, the value of
1885 * ext_csd's capacity is valid if the value is more
1886 * than 2GB
1887 */
1888 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1889 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1890 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1891 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1892 capacity *= MMC_MAX_BLOCK_LEN;
1893 if ((capacity >> 20) > 2 * 1024)
1894 mmc->capacity_user = capacity;
1895 }
1896
1897 switch (ext_csd[EXT_CSD_REV]) {
1898 case 1:
1899 mmc->version = MMC_VERSION_4_1;
1900 break;
1901 case 2:
1902 mmc->version = MMC_VERSION_4_2;
1903 break;
1904 case 3:
1905 mmc->version = MMC_VERSION_4_3;
1906 break;
1907 case 5:
1908 mmc->version = MMC_VERSION_4_41;
1909 break;
1910 case 6:
1911 mmc->version = MMC_VERSION_4_5;
1912 break;
1913 case 7:
1914 mmc->version = MMC_VERSION_5_0;
1915 break;
1916 case 8:
1917 mmc->version = MMC_VERSION_5_1;
1918 break;
1919 }
1920
1921 /* The partition data may be non-zero but it is only
1922 * effective if PARTITION_SETTING_COMPLETED is set in
1923 * EXT_CSD, so ignore any data if this bit is not set,
1924 * except for enabling the high-capacity group size
1925 * definition (see below).
1926 */
1927 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1928 EXT_CSD_PARTITION_SETTING_COMPLETED);
1929
1930 /* store the partition info of emmc */
1931 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1932 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1933 ext_csd[EXT_CSD_BOOT_MULT])
1934 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1935 if (part_completed &&
1936 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1937 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1938
1939 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1940
1941 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1942
1943 for (i = 0; i < 4; i++) {
1944 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1945 uint mult = (ext_csd[idx + 2] << 16) +
1946 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1947 if (mult)
1948 has_parts = true;
1949 if (!part_completed)
1950 continue;
1951 mmc->capacity_gp[i] = mult;
1952 mmc->capacity_gp[i] *=
1953 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1954 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1955 mmc->capacity_gp[i] <<= 19;
1956 }
1957
1958 if (part_completed) {
1959 mmc->enh_user_size =
1960 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
1961 (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
1962 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1963 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1964 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1965 mmc->enh_user_size <<= 19;
1966 mmc->enh_user_start =
1967 (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
1968 (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
1969 (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
1970 ext_csd[EXT_CSD_ENH_START_ADDR];
1971 if (mmc->high_capacity)
1972 mmc->enh_user_start <<= 9;
1973 }
1974
1975 /*
1976 * Host needs to enable ERASE_GRP_DEF bit if device is
1977 * partitioned. This bit will be lost every time after a reset
1978 * or power off. This will affect erase size.
1979 */
1980 if (part_completed)
1981 has_parts = true;
1982 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1983 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1984 has_parts = true;
1985 if (has_parts) {
1986 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1987 EXT_CSD_ERASE_GROUP_DEF, 1);
1988
1989 if (err)
1990 return err;
1991
1992 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1993 }
1994
1995 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1996 /* Read out group size from ext_csd */
1997 mmc->erase_grp_size =
1998 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1999 /*
2000 * if high capacity and partition setting completed
2001 * SEC_COUNT is valid even if it is smaller than 2 GiB
2002 * JEDEC Standard JESD84-B45, 6.2.4
2003 */
2004 if (mmc->high_capacity && part_completed) {
2005 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
2006 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
2007 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
2008 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
2009 capacity *= MMC_MAX_BLOCK_LEN;
2010 mmc->capacity_user = capacity;
2011 }
2012 } else {
2013 /* Calculate the group size from the csd value. */
2014 int erase_gsz, erase_gmul;
2015
2016 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
2017 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
2018 mmc->erase_grp_size = (erase_gsz + 1)
2019 * (erase_gmul + 1);
2020 }
2021
2022 mmc->hc_wp_grp_size = 1024
2023 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
2024 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2025
2026 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
2027
2028 return 0;
2029}
2030
Kim Phillipsfdbb8732012-10-29 13:34:43 +00002031static int mmc_startup(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05002032{
Stephen Warrenf866a462013-06-11 15:14:01 -06002033 int err, i;
Andy Fleming272cc702008-10-30 16:41:01 -05002034 uint mult, freq;
Jean-Jacques Hiblotc744b6f2017-09-21 16:29:50 +02002035 u64 cmult, csize;
Andy Fleming272cc702008-10-30 16:41:01 -05002036 struct mmc_cmd cmd;
Simon Glassc40fdca2016-05-01 13:52:35 -06002037 struct blk_desc *bdesc;
Andy Fleming272cc702008-10-30 16:41:01 -05002038
Thomas Choud52ebf12010-12-24 13:12:21 +00002039#ifdef CONFIG_MMC_SPI_CRC_ON
2040 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
2041 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
2042 cmd.resp_type = MMC_RSP_R1;
2043 cmd.cmdarg = 1;
Thomas Choud52ebf12010-12-24 13:12:21 +00002044 err = mmc_send_cmd(mmc, &cmd, NULL);
Thomas Choud52ebf12010-12-24 13:12:21 +00002045 if (err)
2046 return err;
2047 }
2048#endif
2049
Andy Fleming272cc702008-10-30 16:41:01 -05002050 /* Put the Card in Identify Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00002051 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
2052 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
Andy Fleming272cc702008-10-30 16:41:01 -05002053 cmd.resp_type = MMC_RSP_R2;
2054 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05002055
2056 err = mmc_send_cmd(mmc, &cmd, NULL);
2057
Kishon Vijay Abraham I83dc4222017-09-21 16:30:10 +02002058#ifdef CONFIG_MMC_QUIRKS
2059 if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) {
2060 int retries = 4;
2061 /*
2062 * It has been seen that SEND_CID may fail on the first
2063 * attempt, let's try a few more time
2064 */
2065 do {
2066 err = mmc_send_cmd(mmc, &cmd, NULL);
2067 if (!err)
2068 break;
2069 } while (retries--);
2070 }
2071#endif
2072
Andy Fleming272cc702008-10-30 16:41:01 -05002073 if (err)
2074 return err;
2075
2076 memcpy(mmc->cid, cmd.response, 16);
2077
2078 /*
2079 * For MMC cards, set the Relative Address.
2080 * For SD cards, get the Relatvie Address.
2081 * This also puts the cards into Standby State
2082 */
Thomas Choud52ebf12010-12-24 13:12:21 +00002083 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2084 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
2085 cmd.cmdarg = mmc->rca << 16;
2086 cmd.resp_type = MMC_RSP_R6;
Andy Fleming272cc702008-10-30 16:41:01 -05002087
Thomas Choud52ebf12010-12-24 13:12:21 +00002088 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05002089
Thomas Choud52ebf12010-12-24 13:12:21 +00002090 if (err)
2091 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05002092
Thomas Choud52ebf12010-12-24 13:12:21 +00002093 if (IS_SD(mmc))
2094 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
2095 }
Andy Fleming272cc702008-10-30 16:41:01 -05002096
2097 /* Get the Card-Specific Data */
2098 cmd.cmdidx = MMC_CMD_SEND_CSD;
2099 cmd.resp_type = MMC_RSP_R2;
2100 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05002101
2102 err = mmc_send_cmd(mmc, &cmd, NULL);
2103
2104 if (err)
2105 return err;
2106
Rabin Vincent998be3d2009-04-05 13:30:56 +05302107 mmc->csd[0] = cmd.response[0];
2108 mmc->csd[1] = cmd.response[1];
2109 mmc->csd[2] = cmd.response[2];
2110 mmc->csd[3] = cmd.response[3];
Andy Fleming272cc702008-10-30 16:41:01 -05002111
2112 if (mmc->version == MMC_VERSION_UNKNOWN) {
Rabin Vincent0b453ff2009-04-05 13:30:55 +05302113 int version = (cmd.response[0] >> 26) & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -05002114
2115 switch (version) {
Bin Meng53e8e402016-03-17 21:53:13 -07002116 case 0:
2117 mmc->version = MMC_VERSION_1_2;
2118 break;
2119 case 1:
2120 mmc->version = MMC_VERSION_1_4;
2121 break;
2122 case 2:
2123 mmc->version = MMC_VERSION_2_2;
2124 break;
2125 case 3:
2126 mmc->version = MMC_VERSION_3;
2127 break;
2128 case 4:
2129 mmc->version = MMC_VERSION_4;
2130 break;
2131 default:
2132 mmc->version = MMC_VERSION_1_2;
2133 break;
Andy Fleming272cc702008-10-30 16:41:01 -05002134 }
2135 }
2136
2137 /* divide frequency by 10, since the mults are 10x bigger */
Rabin Vincent0b453ff2009-04-05 13:30:55 +05302138 freq = fbase[(cmd.response[0] & 0x7)];
2139 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
Andy Fleming272cc702008-10-30 16:41:01 -05002140
Jean-Jacques Hiblot35f9e192017-09-21 16:29:53 +02002141 mmc->legacy_speed = freq * mult;
Jean-Jacques Hiblot35f9e192017-09-21 16:29:53 +02002142 mmc_select_mode(mmc, MMC_LEGACY);
Andy Fleming272cc702008-10-30 16:41:01 -05002143
Markus Niebelab711882013-12-16 13:40:46 +01002144 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
Rabin Vincent998be3d2009-04-05 13:30:56 +05302145 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05002146
2147 if (IS_SD(mmc))
2148 mmc->write_bl_len = mmc->read_bl_len;
2149 else
Rabin Vincent998be3d2009-04-05 13:30:56 +05302150 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05002151
2152 if (mmc->high_capacity) {
2153 csize = (mmc->csd[1] & 0x3f) << 16
2154 | (mmc->csd[2] & 0xffff0000) >> 16;
2155 cmult = 8;
2156 } else {
2157 csize = (mmc->csd[1] & 0x3ff) << 2
2158 | (mmc->csd[2] & 0xc0000000) >> 30;
2159 cmult = (mmc->csd[2] & 0x00038000) >> 15;
2160 }
2161
Stephen Warrenf866a462013-06-11 15:14:01 -06002162 mmc->capacity_user = (csize + 1) << (cmult + 2);
2163 mmc->capacity_user *= mmc->read_bl_len;
2164 mmc->capacity_boot = 0;
2165 mmc->capacity_rpmb = 0;
2166 for (i = 0; i < 4; i++)
2167 mmc->capacity_gp[i] = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05002168
Simon Glass8bfa1952013-04-03 08:54:30 +00002169 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
2170 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05002171
Simon Glass8bfa1952013-04-03 08:54:30 +00002172 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
2173 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05002174
Markus Niebelab711882013-12-16 13:40:46 +01002175 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
2176 cmd.cmdidx = MMC_CMD_SET_DSR;
2177 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
2178 cmd.resp_type = MMC_RSP_NONE;
2179 if (mmc_send_cmd(mmc, &cmd, NULL))
2180 printf("MMC: SET_DSR failed\n");
2181 }
2182
Andy Fleming272cc702008-10-30 16:41:01 -05002183 /* Select the card, and put it into Transfer Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00002184 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2185 cmd.cmdidx = MMC_CMD_SELECT_CARD;
Ajay Bhargavfe8f7062011-10-05 03:13:23 +00002186 cmd.resp_type = MMC_RSP_R1;
Thomas Choud52ebf12010-12-24 13:12:21 +00002187 cmd.cmdarg = mmc->rca << 16;
Thomas Choud52ebf12010-12-24 13:12:21 +00002188 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05002189
Thomas Choud52ebf12010-12-24 13:12:21 +00002190 if (err)
2191 return err;
2192 }
Andy Fleming272cc702008-10-30 16:41:01 -05002193
Lei Wene6f99a52011-06-22 17:03:31 +00002194 /*
2195 * For SD, its erase group is always one sector
2196 */
2197 mmc->erase_grp_size = 1;
Lei Wenbc897b12011-05-02 16:26:26 +00002198 mmc->part_config = MMCPART_NOAVAILABLE;
Lei Wenbc897b12011-05-02 16:26:26 +00002199
Jean-Jacques Hiblotdfda9d82017-09-21 16:29:51 +02002200 err = mmc_startup_v4(mmc);
Jean-Jacques Hiblotc744b6f2017-09-21 16:29:50 +02002201 if (err)
2202 return err;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05302203
Simon Glassc40fdca2016-05-01 13:52:35 -06002204 err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
Stephen Warrenf866a462013-06-11 15:14:01 -06002205 if (err)
2206 return err;
2207
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +02002208 if (IS_SD(mmc)) {
2209 err = sd_get_capabilities(mmc);
2210 if (err)
2211 return err;
2212 err = sd_select_mode_and_width(mmc, mmc->card_caps);
2213 } else {
2214 err = mmc_get_capabilities(mmc);
2215 if (err)
2216 return err;
2217 mmc_select_mode_and_width(mmc, mmc->card_caps);
2218 }
Andy Fleming272cc702008-10-30 16:41:01 -05002219
2220 if (err)
2221 return err;
2222
Jean-Jacques Hiblot01298da2017-09-21 16:30:09 +02002223 mmc->best_mode = mmc->selected_mode;
Jaehoon Chungad5fd922012-03-26 21:16:03 +00002224
Andrew Gabbasov5af8f452014-12-01 06:59:11 -06002225 /* Fix the block length for DDR mode */
2226 if (mmc->ddr_mode) {
2227 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2228 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2229 }
2230
Andy Fleming272cc702008-10-30 16:41:01 -05002231 /* fill in device description */
Simon Glassc40fdca2016-05-01 13:52:35 -06002232 bdesc = mmc_get_blk_desc(mmc);
2233 bdesc->lun = 0;
2234 bdesc->hwpart = 0;
2235 bdesc->type = 0;
2236 bdesc->blksz = mmc->read_bl_len;
2237 bdesc->log2blksz = LOG2(bdesc->blksz);
2238 bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Sjoerd Simonsfc011f62015-12-04 23:27:40 +01002239#if !defined(CONFIG_SPL_BUILD) || \
2240 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
2241 !defined(CONFIG_USE_TINY_PRINTF))
Simon Glassc40fdca2016-05-01 13:52:35 -06002242 sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
Taylor Huttbabce5f2012-10-20 17:15:59 +00002243 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
2244 (mmc->cid[3] >> 16) & 0xffff);
Simon Glassc40fdca2016-05-01 13:52:35 -06002245 sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
Taylor Huttbabce5f2012-10-20 17:15:59 +00002246 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
2247 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
2248 (mmc->cid[2] >> 24) & 0xff);
Simon Glassc40fdca2016-05-01 13:52:35 -06002249 sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
Taylor Huttbabce5f2012-10-20 17:15:59 +00002250 (mmc->cid[2] >> 16) & 0xf);
Paul Burton56196822013-09-04 16:12:25 +01002251#else
Simon Glassc40fdca2016-05-01 13:52:35 -06002252 bdesc->vendor[0] = 0;
2253 bdesc->product[0] = 0;
2254 bdesc->revision[0] = 0;
Paul Burton56196822013-09-04 16:12:25 +01002255#endif
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00002256#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
Simon Glassc40fdca2016-05-01 13:52:35 -06002257 part_init(bdesc);
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00002258#endif
Andy Fleming272cc702008-10-30 16:41:01 -05002259
2260 return 0;
2261}
2262
Kim Phillipsfdbb8732012-10-29 13:34:43 +00002263static int mmc_send_if_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05002264{
2265 struct mmc_cmd cmd;
2266 int err;
2267
2268 cmd.cmdidx = SD_CMD_SEND_IF_COND;
2269 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02002270 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
Andy Fleming272cc702008-10-30 16:41:01 -05002271 cmd.resp_type = MMC_RSP_R7;
Andy Fleming272cc702008-10-30 16:41:01 -05002272
2273 err = mmc_send_cmd(mmc, &cmd, NULL);
2274
2275 if (err)
2276 return err;
2277
Rabin Vincent998be3d2009-04-05 13:30:56 +05302278 if ((cmd.response[0] & 0xff) != 0xaa)
Jaehoon Chung915ffa52016-07-19 16:33:36 +09002279 return -EOPNOTSUPP;
Andy Fleming272cc702008-10-30 16:41:01 -05002280 else
2281 mmc->version = SD_VERSION_2;
2282
2283 return 0;
2284}
2285
Simon Glassc4d660d2017-07-04 13:31:19 -06002286#if !CONFIG_IS_ENABLED(DM_MMC)
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01002287/* board-specific MMC power initializations. */
2288__weak void board_mmc_power_init(void)
2289{
2290}
Simon Glass05cbeb72017-04-22 19:10:56 -06002291#endif
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01002292
Peng Fan2051aef2016-10-11 15:08:43 +08002293static int mmc_power_init(struct mmc *mmc)
2294{
Simon Glassc4d660d2017-07-04 13:31:19 -06002295#if CONFIG_IS_ENABLED(DM_MMC)
Jean-Jacques Hiblot06ec0452017-09-21 16:29:48 +02002296#if CONFIG_IS_ENABLED(DM_REGULATOR)
Peng Fan2051aef2016-10-11 15:08:43 +08002297 int ret;
2298
2299 ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
Jean-Jacques Hiblot06ec0452017-09-21 16:29:48 +02002300 &mmc->vmmc_supply);
2301 if (ret)
Jaehoon Chung288db7c2016-10-24 15:22:22 +09002302 debug("%s: No vmmc supply\n", mmc->dev->name);
Peng Fan2051aef2016-10-11 15:08:43 +08002303
Jean-Jacques Hiblot06ec0452017-09-21 16:29:48 +02002304 ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
2305 &mmc->vqmmc_supply);
2306 if (ret)
2307 debug("%s: No vqmmc supply\n", mmc->dev->name);
Peng Fan2051aef2016-10-11 15:08:43 +08002308#endif
Simon Glass05cbeb72017-04-22 19:10:56 -06002309#else /* !CONFIG_DM_MMC */
2310 /*
2311 * Driver model should use a regulator, as above, rather than calling
2312 * out to board code.
2313 */
2314 board_mmc_power_init();
2315#endif
Peng Fan2051aef2016-10-11 15:08:43 +08002316 return 0;
2317}
2318
Kishon Vijay Abraham Ifb7c3be2017-09-21 16:30:02 +02002319/*
2320 * put the host in the initial state:
2321 * - turn on Vdd (card power supply)
2322 * - configure the bus width and clock to minimal values
2323 */
2324static void mmc_set_initial_state(struct mmc *mmc)
2325{
2326 int err;
2327
2328 /* First try to set 3.3V. If it fails set to 1.8V */
2329 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
2330 if (err != 0)
2331 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
2332 if (err != 0)
2333 printf("mmc: failed to set signal voltage\n");
2334
2335 mmc_select_mode(mmc, MMC_LEGACY);
2336 mmc_set_bus_width(mmc, 1);
Kishon Vijay Abraham I35f67822017-09-21 16:30:03 +02002337 mmc_set_clock(mmc, 0, false);
Kishon Vijay Abraham Ifb7c3be2017-09-21 16:30:02 +02002338}
2339
2340static int mmc_power_on(struct mmc *mmc)
2341{
2342#if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2343 if (mmc->vmmc_supply) {
2344 int ret = regulator_set_enable(mmc->vmmc_supply, true);
2345
2346 if (ret) {
2347 puts("Error enabling VMMC supply\n");
2348 return ret;
2349 }
2350 }
2351#endif
2352 return 0;
2353}
2354
2355static int mmc_power_off(struct mmc *mmc)
2356{
Kishon Vijay Abraham I2e7410d2017-09-21 16:30:04 +02002357 mmc_set_clock(mmc, 1, true);
Kishon Vijay Abraham Ifb7c3be2017-09-21 16:30:02 +02002358#if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2359 if (mmc->vmmc_supply) {
2360 int ret = regulator_set_enable(mmc->vmmc_supply, false);
2361
2362 if (ret) {
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02002363 debug("Error disabling VMMC supply\n");
Kishon Vijay Abraham Ifb7c3be2017-09-21 16:30:02 +02002364 return ret;
2365 }
2366 }
2367#endif
2368 return 0;
2369}
2370
2371static int mmc_power_cycle(struct mmc *mmc)
2372{
2373 int ret;
2374
2375 ret = mmc_power_off(mmc);
2376 if (ret)
2377 return ret;
2378 /*
2379 * SD spec recommends at least 1ms of delay. Let's wait for 2ms
2380 * to be on the safer side.
2381 */
2382 udelay(2000);
2383 return mmc_power_on(mmc);
2384}
2385
Che-Liang Chioue9550442012-11-28 15:21:13 +00002386int mmc_start_init(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05002387{
Simon Glass8ca51e52016-06-12 23:30:22 -06002388 bool no_card;
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02002389 bool uhs_en = supports_uhs(mmc->cfg->host_caps);
Macpaul Linafd59322011-11-14 23:35:39 +00002390 int err;
Andy Fleming272cc702008-10-30 16:41:01 -05002391
Jean-Jacques Hiblot04a2ea22017-09-21 16:30:08 +02002392 mmc->host_caps = mmc->cfg->host_caps;
2393
Pantelis Antoniouab769f22014-02-26 19:28:45 +02002394 /* we pretend there's no card when init is NULL */
Simon Glass8ca51e52016-06-12 23:30:22 -06002395 no_card = mmc_getcd(mmc) == 0;
Simon Glasse7881d82017-07-29 11:35:31 -06002396#if !CONFIG_IS_ENABLED(DM_MMC)
Simon Glass8ca51e52016-06-12 23:30:22 -06002397 no_card = no_card || (mmc->cfg->ops->init == NULL);
2398#endif
2399 if (no_card) {
Thierry Reding48972d92012-01-02 01:15:37 +00002400 mmc->has_init = 0;
Paul Burton56196822013-09-04 16:12:25 +01002401#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Thierry Reding48972d92012-01-02 01:15:37 +00002402 printf("MMC: no card present\n");
Paul Burton56196822013-09-04 16:12:25 +01002403#endif
Jaehoon Chung915ffa52016-07-19 16:33:36 +09002404 return -ENOMEDIUM;
Thierry Reding48972d92012-01-02 01:15:37 +00002405 }
2406
Lei Wenbc897b12011-05-02 16:26:26 +00002407 if (mmc->has_init)
2408 return 0;
2409
Yangbo Lu5a8dbdc2015-04-22 13:57:00 +08002410#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
2411 mmc_adapter_card_type_ident();
2412#endif
Peng Fan2051aef2016-10-11 15:08:43 +08002413 err = mmc_power_init(mmc);
2414 if (err)
2415 return err;
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01002416
Kishon Vijay Abraham I83dc4222017-09-21 16:30:10 +02002417#ifdef CONFIG_MMC_QUIRKS
2418 mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN |
2419 MMC_QUIRK_RETRY_SEND_CID;
2420#endif
2421
Jean-Jacques Hiblot04a2ea22017-09-21 16:30:08 +02002422 err = mmc_power_cycle(mmc);
2423 if (err) {
2424 /*
2425 * if power cycling is not supported, we should not try
2426 * to use the UHS modes, because we wouldn't be able to
2427 * recover from an error during the UHS initialization.
2428 */
2429 debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
2430 uhs_en = false;
2431 mmc->host_caps &= ~UHS_CAPS;
2432 err = mmc_power_on(mmc);
2433 }
Kishon Vijay Abraham Ifb7c3be2017-09-21 16:30:02 +02002434 if (err)
2435 return err;
2436
Simon Glasse7881d82017-07-29 11:35:31 -06002437#if CONFIG_IS_ENABLED(DM_MMC)
Simon Glass8ca51e52016-06-12 23:30:22 -06002438 /* The device has already been probed ready for use */
2439#else
Pantelis Antoniouab769f22014-02-26 19:28:45 +02002440 /* made sure it's not NULL earlier */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02002441 err = mmc->cfg->ops->init(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05002442 if (err)
2443 return err;
Simon Glass8ca51e52016-06-12 23:30:22 -06002444#endif
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06002445 mmc->ddr_mode = 0;
Kishon Vijay Abraham Iaff5d3c2017-09-21 16:30:00 +02002446
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02002447retry:
Kishon Vijay Abraham Ifb7c3be2017-09-21 16:30:02 +02002448 mmc_set_initial_state(mmc);
Jean-Jacques Hiblot318a7a52017-09-21 16:30:01 +02002449 mmc_send_init_stream(mmc);
2450
Andy Fleming272cc702008-10-30 16:41:01 -05002451 /* Reset the Card */
2452 err = mmc_go_idle(mmc);
2453
2454 if (err)
2455 return err;
2456
Lei Wenbc897b12011-05-02 16:26:26 +00002457 /* The internal partition reset to user partition(0) at every CMD0*/
Simon Glassc40fdca2016-05-01 13:52:35 -06002458 mmc_get_blk_desc(mmc)->hwpart = 0;
Lei Wenbc897b12011-05-02 16:26:26 +00002459
Andy Fleming272cc702008-10-30 16:41:01 -05002460 /* Test for SD version 2 */
Macpaul Linafd59322011-11-14 23:35:39 +00002461 err = mmc_send_if_cond(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05002462
Andy Fleming272cc702008-10-30 16:41:01 -05002463 /* Now try to get the SD card's operating condition */
Jean-Jacques Hiblotc10b85d2017-09-21 16:30:07 +02002464 err = sd_send_op_cond(mmc, uhs_en);
2465 if (err && uhs_en) {
2466 uhs_en = false;
2467 mmc_power_cycle(mmc);
2468 goto retry;
2469 }
Andy Fleming272cc702008-10-30 16:41:01 -05002470
2471 /* If the command timed out, we check for an MMC card */
Jaehoon Chung915ffa52016-07-19 16:33:36 +09002472 if (err == -ETIMEDOUT) {
Andy Fleming272cc702008-10-30 16:41:01 -05002473 err = mmc_send_op_cond(mmc);
2474
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05002475 if (err) {
Paul Burton56196822013-09-04 16:12:25 +01002476#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Fleming272cc702008-10-30 16:41:01 -05002477 printf("Card did not respond to voltage select!\n");
Paul Burton56196822013-09-04 16:12:25 +01002478#endif
Jaehoon Chung915ffa52016-07-19 16:33:36 +09002479 return -EOPNOTSUPP;
Andy Fleming272cc702008-10-30 16:41:01 -05002480 }
2481 }
2482
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05002483 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00002484 mmc->init_in_progress = 1;
2485
2486 return err;
2487}
2488
2489static int mmc_complete_init(struct mmc *mmc)
2490{
2491 int err = 0;
2492
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05002493 mmc->init_in_progress = 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +00002494 if (mmc->op_cond_pending)
2495 err = mmc_complete_op_cond(mmc);
2496
2497 if (!err)
2498 err = mmc_startup(mmc);
Lei Wenbc897b12011-05-02 16:26:26 +00002499 if (err)
2500 mmc->has_init = 0;
2501 else
2502 mmc->has_init = 1;
Che-Liang Chioue9550442012-11-28 15:21:13 +00002503 return err;
2504}
2505
2506int mmc_init(struct mmc *mmc)
2507{
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05002508 int err = 0;
Marek Vasutce9eca92016-12-01 02:06:32 +01002509 __maybe_unused unsigned start;
Simon Glassc4d660d2017-07-04 13:31:19 -06002510#if CONFIG_IS_ENABLED(DM_MMC)
Simon Glass33fb2112016-05-01 13:52:41 -06002511 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
Che-Liang Chioue9550442012-11-28 15:21:13 +00002512
Simon Glass33fb2112016-05-01 13:52:41 -06002513 upriv->mmc = mmc;
2514#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00002515 if (mmc->has_init)
2516 return 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02002517
2518 start = get_timer(0);
2519
Che-Liang Chioue9550442012-11-28 15:21:13 +00002520 if (!mmc->init_in_progress)
2521 err = mmc_start_init(mmc);
2522
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05002523 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00002524 err = mmc_complete_init(mmc);
Jagan Teki919b4852017-01-10 11:18:43 +01002525 if (err)
2526 printf("%s: %d, time %lu\n", __func__, err, get_timer(start));
2527
Lei Wenbc897b12011-05-02 16:26:26 +00002528 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05002529}
2530
Markus Niebelab711882013-12-16 13:40:46 +01002531int mmc_set_dsr(struct mmc *mmc, u16 val)
2532{
2533 mmc->dsr = val;
2534 return 0;
2535}
2536
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02002537/* CPU-specific MMC initializations */
2538__weak int cpu_mmc_init(bd_t *bis)
Andy Fleming272cc702008-10-30 16:41:01 -05002539{
2540 return -1;
2541}
2542
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02002543/* board-specific MMC initializations. */
2544__weak int board_mmc_init(bd_t *bis)
2545{
2546 return -1;
2547}
Andy Fleming272cc702008-10-30 16:41:01 -05002548
Che-Liang Chioue9550442012-11-28 15:21:13 +00002549void mmc_set_preinit(struct mmc *mmc, int preinit)
2550{
2551 mmc->preinit = preinit;
2552}
2553
Simon Glassc4d660d2017-07-04 13:31:19 -06002554#if CONFIG_IS_ENABLED(DM_MMC) && defined(CONFIG_SPL_BUILD)
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06002555static int mmc_probe(bd_t *bis)
2556{
2557 return 0;
2558}
Simon Glassc4d660d2017-07-04 13:31:19 -06002559#elif CONFIG_IS_ENABLED(DM_MMC)
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06002560static int mmc_probe(bd_t *bis)
2561{
Simon Glass4a1db6d2015-12-29 05:22:49 -07002562 int ret, i;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06002563 struct uclass *uc;
Simon Glass4a1db6d2015-12-29 05:22:49 -07002564 struct udevice *dev;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06002565
2566 ret = uclass_get(UCLASS_MMC, &uc);
2567 if (ret)
2568 return ret;
2569
Simon Glass4a1db6d2015-12-29 05:22:49 -07002570 /*
2571 * Try to add them in sequence order. Really with driver model we
2572 * should allow holes, but the current MMC list does not allow that.
2573 * So if we request 0, 1, 3 we will get 0, 1, 2.
2574 */
2575 for (i = 0; ; i++) {
2576 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
2577 if (ret == -ENODEV)
2578 break;
2579 }
2580 uclass_foreach_dev(dev, uc) {
2581 ret = device_probe(dev);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06002582 if (ret)
Simon Glass4a1db6d2015-12-29 05:22:49 -07002583 printf("%s - probe failed: %d\n", dev->name, ret);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06002584 }
2585
2586 return 0;
2587}
2588#else
2589static int mmc_probe(bd_t *bis)
2590{
2591 if (board_mmc_init(bis) < 0)
2592 cpu_mmc_init(bis);
2593
2594 return 0;
2595}
2596#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00002597
Andy Fleming272cc702008-10-30 16:41:01 -05002598int mmc_initialize(bd_t *bis)
2599{
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02002600 static int initialized = 0;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06002601 int ret;
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02002602 if (initialized) /* Avoid initializing mmc multiple times */
2603 return 0;
2604 initialized = 1;
2605
Simon Glassc4d660d2017-07-04 13:31:19 -06002606#if !CONFIG_IS_ENABLED(BLK)
Marek Vasutb5b838f2016-12-01 02:06:33 +01002607#if !CONFIG_IS_ENABLED(MMC_TINY)
Simon Glassc40fdca2016-05-01 13:52:35 -06002608 mmc_list_init();
2609#endif
Marek Vasutb5b838f2016-12-01 02:06:33 +01002610#endif
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06002611 ret = mmc_probe(bis);
2612 if (ret)
2613 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -05002614
Ying Zhangbb0dc102013-08-16 15:16:11 +08002615#ifndef CONFIG_SPL_BUILD
Andy Fleming272cc702008-10-30 16:41:01 -05002616 print_mmc_devices(',');
Ying Zhangbb0dc102013-08-16 15:16:11 +08002617#endif
Andy Fleming272cc702008-10-30 16:41:01 -05002618
Simon Glassc40fdca2016-05-01 13:52:35 -06002619 mmc_do_preinit();
Andy Fleming272cc702008-10-30 16:41:01 -05002620 return 0;
2621}
Tomas Melincd3d4882016-11-25 11:01:03 +02002622
2623#ifdef CONFIG_CMD_BKOPS_ENABLE
2624int mmc_set_bkops_enable(struct mmc *mmc)
2625{
2626 int err;
2627 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2628
2629 err = mmc_send_ext_csd(mmc, ext_csd);
2630 if (err) {
2631 puts("Could not get ext_csd register values\n");
2632 return err;
2633 }
2634
2635 if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
2636 puts("Background operations not supported on device\n");
2637 return -EMEDIUMTYPE;
2638 }
2639
2640 if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
2641 puts("Background operations already enabled\n");
2642 return 0;
2643 }
2644
2645 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
2646 if (err) {
2647 puts("Failed to enable manual background operations\n");
2648 return err;
2649 }
2650
2651 puts("Enabled manual background operations\n");
2652
2653 return 0;
2654}
2655#endif