blob: 74b3d68f871ccfc24c33e2fded971e5bba5c4739 [file] [log] [blame]
Andy Fleming272cc702008-10-30 16:41:01 -05001/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andy Fleming272cc702008-10-30 16:41:01 -05008 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
Sjoerd Simons8e3332e2015-08-30 16:55:45 -060013#include <dm.h>
14#include <dm/device-internal.h>
Stephen Warrend4622df2014-05-23 12:47:06 -060015#include <errno.h>
Andy Fleming272cc702008-10-30 16:41:01 -050016#include <mmc.h>
17#include <part.h>
18#include <malloc.h>
Simon Glasscf92e052015-09-02 17:24:58 -060019#include <memalign.h>
Andy Fleming272cc702008-10-30 16:41:01 -050020#include <linux/list.h>
Rabin Vincent9b1f9422009-04-05 13:30:54 +053021#include <div64.h>
Paul Burtonda61fa52013-09-09 15:30:26 +010022#include "mmc_private.h"
Andy Fleming272cc702008-10-30 16:41:01 -050023
Jeroen Hofstee750121c2014-07-12 21:24:08 +020024__weak int board_mmc_getwp(struct mmc *mmc)
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000025{
26 return -1;
27}
28
29int mmc_getwp(struct mmc *mmc)
30{
31 int wp;
32
33 wp = board_mmc_getwp(mmc);
34
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000035 if (wp < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020036 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000038 else
39 wp = 0;
40 }
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000041
42 return wp;
43}
44
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +020045__weak int board_mmc_getcd(struct mmc *mmc)
46{
Stefano Babic11fdade2010-02-05 15:04:43 +010047 return -1;
48}
49
Paul Burtonda61fa52013-09-09 15:30:26 +010050int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
Andy Fleming272cc702008-10-30 16:41:01 -050051{
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000052 int ret;
Marek Vasut8635ff92012-03-15 18:41:35 +000053
Marek Vasut8635ff92012-03-15 18:41:35 +000054#ifdef CONFIG_MMC_TRACE
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000055 int i;
56 u8 *ptr;
57
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020060 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Bin Meng7863ce52016-03-17 21:53:14 -070061 if (ret) {
62 printf("\t\tRET\t\t\t %d\n", ret);
63 } else {
64 switch (cmd->resp_type) {
65 case MMC_RSP_NONE:
66 printf("\t\tMMC_RSP_NONE\n");
67 break;
68 case MMC_RSP_R1:
69 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
70 cmd->response[0]);
71 break;
72 case MMC_RSP_R1b:
73 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
74 cmd->response[0]);
75 break;
76 case MMC_RSP_R2:
77 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
78 cmd->response[0]);
79 printf("\t\t \t\t 0x%08X \n",
80 cmd->response[1]);
81 printf("\t\t \t\t 0x%08X \n",
82 cmd->response[2]);
83 printf("\t\t \t\t 0x%08X \n",
84 cmd->response[3]);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000085 printf("\n");
Bin Meng7863ce52016-03-17 21:53:14 -070086 printf("\t\t\t\t\tDUMPING DATA\n");
87 for (i = 0; i < 4; i++) {
88 int j;
89 printf("\t\t\t\t\t%03d - ", i*4);
90 ptr = (u8 *)&cmd->response[i];
91 ptr += 3;
92 for (j = 0; j < 4; j++)
93 printf("%02X ", *ptr--);
94 printf("\n");
95 }
96 break;
97 case MMC_RSP_R3:
98 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
99 cmd->response[0]);
100 break;
101 default:
102 printf("\t\tERROR MMC rsp not supported\n");
103 break;
Bin Meng53e8e402016-03-17 21:53:13 -0700104 }
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000105 }
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000106#else
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200107 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000108#endif
Marek Vasut8635ff92012-03-15 18:41:35 +0000109 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500110}
111
Paul Burtonda61fa52013-09-09 15:30:26 +0100112int mmc_send_status(struct mmc *mmc, int timeout)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000113{
114 struct mmc_cmd cmd;
Jan Kloetzked617c422012-02-05 22:29:12 +0000115 int err, retries = 5;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000116#ifdef CONFIG_MMC_TRACE
117 int status;
118#endif
119
120 cmd.cmdidx = MMC_CMD_SEND_STATUS;
121 cmd.resp_type = MMC_RSP_R1;
Marek Vasutaaf3d412011-08-10 09:24:48 +0200122 if (!mmc_host_is_spi(mmc))
123 cmd.cmdarg = mmc->rca << 16;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000124
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500125 while (1) {
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000126 err = mmc_send_cmd(mmc, &cmd, NULL);
Jan Kloetzked617c422012-02-05 22:29:12 +0000127 if (!err) {
128 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
129 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
130 MMC_STATE_PRG)
131 break;
132 else if (cmd.response[0] & MMC_STATUS_MASK) {
Paul Burton56196822013-09-04 16:12:25 +0100133#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jan Kloetzked617c422012-02-05 22:29:12 +0000134 printf("Status Error: 0x%08X\n",
135 cmd.response[0]);
Paul Burton56196822013-09-04 16:12:25 +0100136#endif
Jan Kloetzked617c422012-02-05 22:29:12 +0000137 return COMM_ERR;
138 }
139 } else if (--retries < 0)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000140 return err;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000141
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500142 if (timeout-- <= 0)
143 break;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000144
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500145 udelay(1000);
146 }
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000147
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000148#ifdef CONFIG_MMC_TRACE
149 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
150 printf("CURR STATE:%d\n", status);
151#endif
Jongman Heo5b0c9422012-06-03 21:32:13 +0000152 if (timeout <= 0) {
Paul Burton56196822013-09-04 16:12:25 +0100153#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000154 printf("Timeout waiting card ready\n");
Paul Burton56196822013-09-04 16:12:25 +0100155#endif
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000156 return TIMEOUT;
157 }
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500158 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
159 return SWITCH_ERR;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000160
161 return 0;
162}
163
Paul Burtonda61fa52013-09-09 15:30:26 +0100164int mmc_set_blocklen(struct mmc *mmc, int len)
Andy Fleming272cc702008-10-30 16:41:01 -0500165{
166 struct mmc_cmd cmd;
167
Andrew Gabbasov786e8f82014-12-01 06:59:09 -0600168 if (mmc->ddr_mode)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900169 return 0;
170
Andy Fleming272cc702008-10-30 16:41:01 -0500171 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
172 cmd.resp_type = MMC_RSP_R1;
173 cmd.cmdarg = len;
Andy Fleming272cc702008-10-30 16:41:01 -0500174
175 return mmc_send_cmd(mmc, &cmd, NULL);
176}
177
Sascha Silbeff8fef52013-06-14 13:07:25 +0200178static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000179 lbaint_t blkcnt)
Andy Fleming272cc702008-10-30 16:41:01 -0500180{
181 struct mmc_cmd cmd;
182 struct mmc_data data;
183
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700184 if (blkcnt > 1)
185 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
186 else
187 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
Andy Fleming272cc702008-10-30 16:41:01 -0500188
189 if (mmc->high_capacity)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700190 cmd.cmdarg = start;
Andy Fleming272cc702008-10-30 16:41:01 -0500191 else
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700192 cmd.cmdarg = start * mmc->read_bl_len;
Andy Fleming272cc702008-10-30 16:41:01 -0500193
194 cmd.resp_type = MMC_RSP_R1;
Andy Fleming272cc702008-10-30 16:41:01 -0500195
196 data.dest = dst;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700197 data.blocks = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500198 data.blocksize = mmc->read_bl_len;
199 data.flags = MMC_DATA_READ;
200
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700201 if (mmc_send_cmd(mmc, &cmd, &data))
202 return 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500203
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700204 if (blkcnt > 1) {
205 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
206 cmd.cmdarg = 0;
207 cmd.resp_type = MMC_RSP_R1b;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700208 if (mmc_send_cmd(mmc, &cmd, NULL)) {
Paul Burton56196822013-09-04 16:12:25 +0100209#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700210 printf("mmc fail to send stop cmd\n");
Paul Burton56196822013-09-04 16:12:25 +0100211#endif
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700212 return 0;
213 }
Andy Fleming272cc702008-10-30 16:41:01 -0500214 }
215
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700216 return blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500217}
218
Simon Glass33fb2112016-05-01 13:52:41 -0600219#ifdef CONFIG_BLK
220static ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt,
221 void *dst)
222#else
Simon Glass4101f682016-02-29 15:25:34 -0700223static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
Stephen Warren7c4213f2015-12-07 11:38:48 -0700224 lbaint_t blkcnt, void *dst)
Simon Glass33fb2112016-05-01 13:52:41 -0600225#endif
Andy Fleming272cc702008-10-30 16:41:01 -0500226{
Simon Glass33fb2112016-05-01 13:52:41 -0600227#ifdef CONFIG_BLK
228 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
229#endif
Simon Glassbcce53d2016-02-29 15:25:51 -0700230 int dev_num = block_dev->devnum;
Stephen Warren873cc1d2015-12-07 11:38:49 -0700231 int err;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700232 lbaint_t cur, blocks_todo = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500233
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700234 if (blkcnt == 0)
235 return 0;
236
237 struct mmc *mmc = find_mmc_device(dev_num);
Andy Fleming272cc702008-10-30 16:41:01 -0500238 if (!mmc)
239 return 0;
240
Simon Glass69f45cd2016-05-01 13:52:29 -0600241 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
Stephen Warren873cc1d2015-12-07 11:38:49 -0700242 if (err < 0)
243 return 0;
244
Simon Glassc40fdca2016-05-01 13:52:35 -0600245 if ((start + blkcnt) > block_dev->lba) {
Paul Burton56196822013-09-04 16:12:25 +0100246#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Sascha Silbeff8fef52013-06-14 13:07:25 +0200247 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
Simon Glassc40fdca2016-05-01 13:52:35 -0600248 start + blkcnt, block_dev->lba);
Paul Burton56196822013-09-04 16:12:25 +0100249#endif
Lei Wend2bf29e2010-09-13 22:07:27 +0800250 return 0;
251 }
Andy Fleming272cc702008-10-30 16:41:01 -0500252
Simon Glass11692992015-06-23 15:38:50 -0600253 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
254 debug("%s: Failed to set blocklen\n", __func__);
Andy Fleming272cc702008-10-30 16:41:01 -0500255 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600256 }
Andy Fleming272cc702008-10-30 16:41:01 -0500257
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700258 do {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200259 cur = (blocks_todo > mmc->cfg->b_max) ?
260 mmc->cfg->b_max : blocks_todo;
Simon Glass11692992015-06-23 15:38:50 -0600261 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
262 debug("%s: Failed to read blocks\n", __func__);
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700263 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600264 }
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700265 blocks_todo -= cur;
266 start += cur;
267 dst += cur * mmc->read_bl_len;
268 } while (blocks_todo > 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500269
270 return blkcnt;
271}
272
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000273static int mmc_go_idle(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500274{
275 struct mmc_cmd cmd;
276 int err;
277
278 udelay(1000);
279
280 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
281 cmd.cmdarg = 0;
282 cmd.resp_type = MMC_RSP_NONE;
Andy Fleming272cc702008-10-30 16:41:01 -0500283
284 err = mmc_send_cmd(mmc, &cmd, NULL);
285
286 if (err)
287 return err;
288
289 udelay(2000);
290
291 return 0;
292}
293
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000294static int sd_send_op_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500295{
296 int timeout = 1000;
297 int err;
298 struct mmc_cmd cmd;
299
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500300 while (1) {
Andy Fleming272cc702008-10-30 16:41:01 -0500301 cmd.cmdidx = MMC_CMD_APP_CMD;
302 cmd.resp_type = MMC_RSP_R1;
303 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500304
305 err = mmc_send_cmd(mmc, &cmd, NULL);
306
307 if (err)
308 return err;
309
310 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
311 cmd.resp_type = MMC_RSP_R3;
Stefano Babic250de122010-01-20 18:20:39 +0100312
313 /*
314 * Most cards do not answer if some reserved bits
315 * in the ocr are set. However, Some controller
316 * can set bit 7 (reserved for low voltages), but
317 * how to manage low voltages SD card is not yet
318 * specified.
319 */
Thomas Choud52ebf12010-12-24 13:12:21 +0000320 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200321 (mmc->cfg->voltages & 0xff8000);
Andy Fleming272cc702008-10-30 16:41:01 -0500322
323 if (mmc->version == SD_VERSION_2)
324 cmd.cmdarg |= OCR_HCS;
325
326 err = mmc_send_cmd(mmc, &cmd, NULL);
327
328 if (err)
329 return err;
330
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500331 if (cmd.response[0] & OCR_BUSY)
332 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500333
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500334 if (timeout-- <= 0)
335 return UNUSABLE_ERR;
336
337 udelay(1000);
338 }
Andy Fleming272cc702008-10-30 16:41:01 -0500339
340 if (mmc->version != SD_VERSION_2)
341 mmc->version = SD_VERSION_1_0;
342
Thomas Choud52ebf12010-12-24 13:12:21 +0000343 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
344 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
345 cmd.resp_type = MMC_RSP_R3;
346 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000347
348 err = mmc_send_cmd(mmc, &cmd, NULL);
349
350 if (err)
351 return err;
352 }
353
Rabin Vincent998be3d2009-04-05 13:30:56 +0530354 mmc->ocr = cmd.response[0];
Andy Fleming272cc702008-10-30 16:41:01 -0500355
356 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
357 mmc->rca = 0;
358
359 return 0;
360}
361
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500362static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
Andy Fleming272cc702008-10-30 16:41:01 -0500363{
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500364 struct mmc_cmd cmd;
Andy Fleming272cc702008-10-30 16:41:01 -0500365 int err;
366
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500367 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
368 cmd.resp_type = MMC_RSP_R3;
369 cmd.cmdarg = 0;
Rob Herring5a203972015-03-23 17:56:59 -0500370 if (use_arg && !mmc_host_is_spi(mmc))
371 cmd.cmdarg = OCR_HCS |
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200372 (mmc->cfg->voltages &
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500373 (mmc->ocr & OCR_VOLTAGE_MASK)) |
374 (mmc->ocr & OCR_ACCESS_MODE);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000375
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500376 err = mmc_send_cmd(mmc, &cmd, NULL);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000377 if (err)
378 return err;
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500379 mmc->ocr = cmd.response[0];
Che-Liang Chioue9550442012-11-28 15:21:13 +0000380 return 0;
381}
382
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200383static int mmc_send_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000384{
Che-Liang Chioue9550442012-11-28 15:21:13 +0000385 int err, i;
386
Andy Fleming272cc702008-10-30 16:41:01 -0500387 /* Some cards seem to need this */
388 mmc_go_idle(mmc);
389
Raffaele Recalcati31cacba2011-03-11 02:01:13 +0000390 /* Asking to the card its capabilities */
Che-Liang Chioue9550442012-11-28 15:21:13 +0000391 for (i = 0; i < 2; i++) {
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500392 err = mmc_send_op_cond_iter(mmc, i != 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500393 if (err)
394 return err;
395
Che-Liang Chioue9550442012-11-28 15:21:13 +0000396 /* exit if not busy (flag seems to be inverted) */
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500397 if (mmc->ocr & OCR_BUSY)
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500398 break;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000399 }
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500400 mmc->op_cond_pending = 1;
401 return 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000402}
Andy Fleming272cc702008-10-30 16:41:01 -0500403
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200404static int mmc_complete_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000405{
406 struct mmc_cmd cmd;
407 int timeout = 1000;
408 uint start;
409 int err;
410
411 mmc->op_cond_pending = 0;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500412 if (!(mmc->ocr & OCR_BUSY)) {
413 start = get_timer(0);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500414 while (1) {
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500415 err = mmc_send_op_cond_iter(mmc, 1);
416 if (err)
417 return err;
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500418 if (mmc->ocr & OCR_BUSY)
419 break;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500420 if (get_timer(start) > timeout)
421 return UNUSABLE_ERR;
422 udelay(100);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500423 }
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500424 }
Andy Fleming272cc702008-10-30 16:41:01 -0500425
Thomas Choud52ebf12010-12-24 13:12:21 +0000426 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
427 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
428 cmd.resp_type = MMC_RSP_R3;
429 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000430
431 err = mmc_send_cmd(mmc, &cmd, NULL);
432
433 if (err)
434 return err;
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500435
436 mmc->ocr = cmd.response[0];
Thomas Choud52ebf12010-12-24 13:12:21 +0000437 }
438
Andy Fleming272cc702008-10-30 16:41:01 -0500439 mmc->version = MMC_VERSION_UNKNOWN;
Andy Fleming272cc702008-10-30 16:41:01 -0500440
441 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
Stephen Warrendef816a2014-01-30 16:11:12 -0700442 mmc->rca = 1;
Andy Fleming272cc702008-10-30 16:41:01 -0500443
444 return 0;
445}
446
447
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000448static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
Andy Fleming272cc702008-10-30 16:41:01 -0500449{
450 struct mmc_cmd cmd;
451 struct mmc_data data;
452 int err;
453
454 /* Get the Card Status Register */
455 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
456 cmd.resp_type = MMC_RSP_R1;
457 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500458
Yoshihiro Shimodacdfd1ac2012-06-07 19:09:11 +0000459 data.dest = (char *)ext_csd;
Andy Fleming272cc702008-10-30 16:41:01 -0500460 data.blocks = 1;
Simon Glass8bfa1952013-04-03 08:54:30 +0000461 data.blocksize = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -0500462 data.flags = MMC_DATA_READ;
463
464 err = mmc_send_cmd(mmc, &cmd, &data);
465
466 return err;
467}
468
469
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000470static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
Andy Fleming272cc702008-10-30 16:41:01 -0500471{
472 struct mmc_cmd cmd;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000473 int timeout = 1000;
474 int ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500475
476 cmd.cmdidx = MMC_CMD_SWITCH;
477 cmd.resp_type = MMC_RSP_R1b;
478 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000479 (index << 16) |
480 (value << 8);
Andy Fleming272cc702008-10-30 16:41:01 -0500481
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000482 ret = mmc_send_cmd(mmc, &cmd, NULL);
483
484 /* Waiting for the ready status */
Jan Kloetzke93ad0d12012-02-05 22:29:11 +0000485 if (!ret)
486 ret = mmc_send_status(mmc, timeout);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000487
488 return ret;
489
Andy Fleming272cc702008-10-30 16:41:01 -0500490}
491
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000492static int mmc_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500493{
Simon Glass8bfa1952013-04-03 08:54:30 +0000494 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
Andy Fleming272cc702008-10-30 16:41:01 -0500495 char cardtype;
496 int err;
497
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600498 mmc->card_caps = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500499
Thomas Choud52ebf12010-12-24 13:12:21 +0000500 if (mmc_host_is_spi(mmc))
501 return 0;
502
Andy Fleming272cc702008-10-30 16:41:01 -0500503 /* Only version 4 supports high-speed */
504 if (mmc->version < MMC_VERSION_4)
505 return 0;
506
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600507 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
508
Andy Fleming272cc702008-10-30 16:41:01 -0500509 err = mmc_send_ext_csd(mmc, ext_csd);
510
511 if (err)
512 return err;
513
Lei Wen0560db12011-10-03 20:35:10 +0000514 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -0500515
516 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
517
518 if (err)
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500519 return err == SWITCH_ERR ? 0 : err;
Andy Fleming272cc702008-10-30 16:41:01 -0500520
521 /* Now check to see that it worked */
522 err = mmc_send_ext_csd(mmc, ext_csd);
523
524 if (err)
525 return err;
526
527 /* No high-speed support */
Lei Wen0560db12011-10-03 20:35:10 +0000528 if (!ext_csd[EXT_CSD_HS_TIMING])
Andy Fleming272cc702008-10-30 16:41:01 -0500529 return 0;
530
531 /* High Speed is set, there are two types: 52MHz and 26MHz */
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900532 if (cardtype & EXT_CSD_CARD_TYPE_52) {
Andrew Gabbasov201d5ac2014-12-01 06:59:10 -0600533 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900534 mmc->card_caps |= MMC_MODE_DDR_52MHz;
Andy Fleming272cc702008-10-30 16:41:01 -0500535 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900536 } else {
Andy Fleming272cc702008-10-30 16:41:01 -0500537 mmc->card_caps |= MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900538 }
Andy Fleming272cc702008-10-30 16:41:01 -0500539
540 return 0;
541}
542
Stephen Warrenf866a462013-06-11 15:14:01 -0600543static int mmc_set_capacity(struct mmc *mmc, int part_num)
544{
545 switch (part_num) {
546 case 0:
547 mmc->capacity = mmc->capacity_user;
548 break;
549 case 1:
550 case 2:
551 mmc->capacity = mmc->capacity_boot;
552 break;
553 case 3:
554 mmc->capacity = mmc->capacity_rpmb;
555 break;
556 case 4:
557 case 5:
558 case 6:
559 case 7:
560 mmc->capacity = mmc->capacity_gp[part_num - 4];
561 break;
562 default:
563 return -1;
564 }
565
Simon Glassc40fdca2016-05-01 13:52:35 -0600566 mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Stephen Warrenf866a462013-06-11 15:14:01 -0600567
568 return 0;
569}
570
Simon Glassfdbb1392016-05-01 13:52:37 -0600571static int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
Lei Wenbc897b12011-05-02 16:26:26 +0000572{
Stephen Warrenf866a462013-06-11 15:14:01 -0600573 int ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000574
Stephen Warrenf866a462013-06-11 15:14:01 -0600575 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
576 (mmc->part_config & ~PART_ACCESS_MASK)
577 | (part_num & PART_ACCESS_MASK));
Stephen Warrenf866a462013-06-11 15:14:01 -0600578
Peter Bigot6dc93e72014-09-02 18:31:23 -0500579 /*
580 * Set the capacity if the switch succeeded or was intended
581 * to return to representing the raw device.
582 */
Stephen Warren873cc1d2015-12-07 11:38:49 -0700583 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
Peter Bigot6dc93e72014-09-02 18:31:23 -0500584 ret = mmc_set_capacity(mmc, part_num);
Simon Glassfdbb1392016-05-01 13:52:37 -0600585 mmc_get_blk_desc(mmc)->hwpart = part_num;
Stephen Warren873cc1d2015-12-07 11:38:49 -0700586 }
Peter Bigot6dc93e72014-09-02 18:31:23 -0500587
588 return ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000589}
590
Simon Glass33fb2112016-05-01 13:52:41 -0600591#ifdef CONFIG_BLK
592static int mmc_select_hwpart(struct udevice *bdev, int hwpart)
593{
594 struct udevice *mmc_dev = dev_get_parent(bdev);
595 struct mmc *mmc = mmc_get_mmc_dev(mmc_dev);
596 struct blk_desc *desc = dev_get_uclass_platdata(bdev);
597 int ret;
598
599 if (desc->hwpart == hwpart)
600 return 0;
601
602 if (mmc->part_config == MMCPART_NOAVAILABLE)
603 return -EMEDIUMTYPE;
604
605 ret = mmc_switch_part(mmc, hwpart);
606 if (ret)
607 return ret;
608
609 return 0;
610}
611#else
Simon Glasse17d1142016-05-01 13:52:26 -0600612static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart)
613{
614 struct mmc *mmc = find_mmc_device(desc->devnum);
615 int ret;
616
617 if (!mmc)
618 return -ENODEV;
619
620 if (mmc->block_dev.hwpart == hwpart)
621 return 0;
622
623 if (mmc->part_config == MMCPART_NOAVAILABLE)
624 return -EMEDIUMTYPE;
625
Simon Glassfdbb1392016-05-01 13:52:37 -0600626 ret = mmc_switch_part(mmc, hwpart);
Simon Glasse17d1142016-05-01 13:52:26 -0600627 if (ret)
628 return ret;
629
630 return 0;
631}
Simon Glass33fb2112016-05-01 13:52:41 -0600632#endif
Simon Glassff3882a2016-05-01 13:52:25 -0600633
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100634int mmc_hwpart_config(struct mmc *mmc,
635 const struct mmc_hwpart_conf *conf,
636 enum mmc_hwpart_conf_mode mode)
637{
638 u8 part_attrs = 0;
639 u32 enh_size_mult;
640 u32 enh_start_addr;
641 u32 gp_size_mult[4];
642 u32 max_enh_size_mult;
643 u32 tot_enh_size_mult = 0;
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100644 u8 wr_rel_set;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100645 int i, pidx, err;
646 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
647
648 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
649 return -EINVAL;
650
651 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
652 printf("eMMC >= 4.4 required for enhanced user data area\n");
653 return -EMEDIUMTYPE;
654 }
655
656 if (!(mmc->part_support & PART_SUPPORT)) {
657 printf("Card does not support partitioning\n");
658 return -EMEDIUMTYPE;
659 }
660
661 if (!mmc->hc_wp_grp_size) {
662 printf("Card does not define HC WP group size\n");
663 return -EMEDIUMTYPE;
664 }
665
666 /* check partition alignment and total enhanced size */
667 if (conf->user.enh_size) {
668 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
669 conf->user.enh_start % mmc->hc_wp_grp_size) {
670 printf("User data enhanced area not HC WP group "
671 "size aligned\n");
672 return -EINVAL;
673 }
674 part_attrs |= EXT_CSD_ENH_USR;
675 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
676 if (mmc->high_capacity) {
677 enh_start_addr = conf->user.enh_start;
678 } else {
679 enh_start_addr = (conf->user.enh_start << 9);
680 }
681 } else {
682 enh_size_mult = 0;
683 enh_start_addr = 0;
684 }
685 tot_enh_size_mult += enh_size_mult;
686
687 for (pidx = 0; pidx < 4; pidx++) {
688 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
689 printf("GP%i partition not HC WP group size "
690 "aligned\n", pidx+1);
691 return -EINVAL;
692 }
693 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
694 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
695 part_attrs |= EXT_CSD_ENH_GP(pidx);
696 tot_enh_size_mult += gp_size_mult[pidx];
697 }
698 }
699
700 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
701 printf("Card does not support enhanced attribute\n");
702 return -EMEDIUMTYPE;
703 }
704
705 err = mmc_send_ext_csd(mmc, ext_csd);
706 if (err)
707 return err;
708
709 max_enh_size_mult =
710 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
711 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
712 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
713 if (tot_enh_size_mult > max_enh_size_mult) {
714 printf("Total enhanced size exceeds maximum (%u > %u)\n",
715 tot_enh_size_mult, max_enh_size_mult);
716 return -EMEDIUMTYPE;
717 }
718
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100719 /* The default value of EXT_CSD_WR_REL_SET is device
720 * dependent, the values can only be changed if the
721 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
722 * changed only once and before partitioning is completed. */
723 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
724 if (conf->user.wr_rel_change) {
725 if (conf->user.wr_rel_set)
726 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
727 else
728 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
729 }
730 for (pidx = 0; pidx < 4; pidx++) {
731 if (conf->gp_part[pidx].wr_rel_change) {
732 if (conf->gp_part[pidx].wr_rel_set)
733 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
734 else
735 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
736 }
737 }
738
739 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
740 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
741 puts("Card does not support host controlled partition write "
742 "reliability settings\n");
743 return -EMEDIUMTYPE;
744 }
745
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100746 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
747 EXT_CSD_PARTITION_SETTING_COMPLETED) {
748 printf("Card already partitioned\n");
749 return -EPERM;
750 }
751
752 if (mode == MMC_HWPART_CONF_CHECK)
753 return 0;
754
755 /* Partitioning requires high-capacity size definitions */
756 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
757 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
758 EXT_CSD_ERASE_GROUP_DEF, 1);
759
760 if (err)
761 return err;
762
763 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
764
765 /* update erase group size to be high-capacity */
766 mmc->erase_grp_size =
767 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
768
769 }
770
771 /* all OK, write the configuration */
772 for (i = 0; i < 4; i++) {
773 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
774 EXT_CSD_ENH_START_ADDR+i,
775 (enh_start_addr >> (i*8)) & 0xFF);
776 if (err)
777 return err;
778 }
779 for (i = 0; i < 3; i++) {
780 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
781 EXT_CSD_ENH_SIZE_MULT+i,
782 (enh_size_mult >> (i*8)) & 0xFF);
783 if (err)
784 return err;
785 }
786 for (pidx = 0; pidx < 4; pidx++) {
787 for (i = 0; i < 3; i++) {
788 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
789 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
790 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
791 if (err)
792 return err;
793 }
794 }
795 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
796 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
797 if (err)
798 return err;
799
800 if (mode == MMC_HWPART_CONF_SET)
801 return 0;
802
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100803 /* The WR_REL_SET is a write-once register but shall be
804 * written before setting PART_SETTING_COMPLETED. As it is
805 * write-once we can only write it when completing the
806 * partitioning. */
807 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
808 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
809 EXT_CSD_WR_REL_SET, wr_rel_set);
810 if (err)
811 return err;
812 }
813
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100814 /* Setting PART_SETTING_COMPLETED confirms the partition
815 * configuration but it only becomes effective after power
816 * cycle, so we do not adjust the partition related settings
817 * in the mmc struct. */
818
819 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
820 EXT_CSD_PARTITION_SETTING,
821 EXT_CSD_PARTITION_SETTING_COMPLETED);
822 if (err)
823 return err;
824
825 return 0;
826}
827
Thierry Reding48972d92012-01-02 01:15:37 +0000828int mmc_getcd(struct mmc *mmc)
829{
830 int cd;
831
832 cd = board_mmc_getcd(mmc);
833
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000834 if (cd < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200835 if (mmc->cfg->ops->getcd)
836 cd = mmc->cfg->ops->getcd(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000837 else
838 cd = 1;
839 }
Thierry Reding48972d92012-01-02 01:15:37 +0000840
841 return cd;
842}
843
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000844static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
Andy Fleming272cc702008-10-30 16:41:01 -0500845{
846 struct mmc_cmd cmd;
847 struct mmc_data data;
848
849 /* Switch the frequency */
850 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
851 cmd.resp_type = MMC_RSP_R1;
852 cmd.cmdarg = (mode << 31) | 0xffffff;
853 cmd.cmdarg &= ~(0xf << (group * 4));
854 cmd.cmdarg |= value << (group * 4);
Andy Fleming272cc702008-10-30 16:41:01 -0500855
856 data.dest = (char *)resp;
857 data.blocksize = 64;
858 data.blocks = 1;
859 data.flags = MMC_DATA_READ;
860
861 return mmc_send_cmd(mmc, &cmd, &data);
862}
863
864
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000865static int sd_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500866{
867 int err;
868 struct mmc_cmd cmd;
Anton staaff781dd32011-10-03 13:54:59 +0000869 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
870 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
Andy Fleming272cc702008-10-30 16:41:01 -0500871 struct mmc_data data;
872 int timeout;
873
874 mmc->card_caps = 0;
875
Thomas Choud52ebf12010-12-24 13:12:21 +0000876 if (mmc_host_is_spi(mmc))
877 return 0;
878
Andy Fleming272cc702008-10-30 16:41:01 -0500879 /* Read the SCR to find out if this card supports higher speeds */
880 cmd.cmdidx = MMC_CMD_APP_CMD;
881 cmd.resp_type = MMC_RSP_R1;
882 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -0500883
884 err = mmc_send_cmd(mmc, &cmd, NULL);
885
886 if (err)
887 return err;
888
889 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
890 cmd.resp_type = MMC_RSP_R1;
891 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500892
893 timeout = 3;
894
895retry_scr:
Anton staaff781dd32011-10-03 13:54:59 +0000896 data.dest = (char *)scr;
Andy Fleming272cc702008-10-30 16:41:01 -0500897 data.blocksize = 8;
898 data.blocks = 1;
899 data.flags = MMC_DATA_READ;
900
901 err = mmc_send_cmd(mmc, &cmd, &data);
902
903 if (err) {
904 if (timeout--)
905 goto retry_scr;
906
907 return err;
908 }
909
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300910 mmc->scr[0] = __be32_to_cpu(scr[0]);
911 mmc->scr[1] = __be32_to_cpu(scr[1]);
Andy Fleming272cc702008-10-30 16:41:01 -0500912
913 switch ((mmc->scr[0] >> 24) & 0xf) {
Bin Meng53e8e402016-03-17 21:53:13 -0700914 case 0:
915 mmc->version = SD_VERSION_1_0;
916 break;
917 case 1:
918 mmc->version = SD_VERSION_1_10;
919 break;
920 case 2:
921 mmc->version = SD_VERSION_2;
922 if ((mmc->scr[0] >> 15) & 0x1)
923 mmc->version = SD_VERSION_3;
924 break;
925 default:
926 mmc->version = SD_VERSION_1_0;
927 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500928 }
929
Alagu Sankarb44c7082010-05-12 15:08:24 +0530930 if (mmc->scr[0] & SD_DATA_4BIT)
931 mmc->card_caps |= MMC_MODE_4BIT;
932
Andy Fleming272cc702008-10-30 16:41:01 -0500933 /* Version 1.0 doesn't support switching */
934 if (mmc->version == SD_VERSION_1_0)
935 return 0;
936
937 timeout = 4;
938 while (timeout--) {
939 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
Anton staaff781dd32011-10-03 13:54:59 +0000940 (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500941
942 if (err)
943 return err;
944
945 /* The high-speed function is busy. Try again */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300946 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
Andy Fleming272cc702008-10-30 16:41:01 -0500947 break;
948 }
949
Andy Fleming272cc702008-10-30 16:41:01 -0500950 /* If high-speed isn't supported, we return */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300951 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
Andy Fleming272cc702008-10-30 16:41:01 -0500952 return 0;
953
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000954 /*
955 * If the host doesn't support SD_HIGHSPEED, do not switch card to
956 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
957 * This can avoid furthur problem when the card runs in different
958 * mode between the host.
959 */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200960 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
961 (mmc->cfg->host_caps & MMC_MODE_HS)))
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000962 return 0;
963
Anton staaff781dd32011-10-03 13:54:59 +0000964 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500965
966 if (err)
967 return err;
968
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300969 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
Andy Fleming272cc702008-10-30 16:41:01 -0500970 mmc->card_caps |= MMC_MODE_HS;
971
972 return 0;
973}
974
975/* frequency bases */
976/* divided by 10 to be nice to platforms without floating point */
Mike Frysinger5f837c22010-10-20 01:15:53 +0000977static const int fbase[] = {
Andy Fleming272cc702008-10-30 16:41:01 -0500978 10000,
979 100000,
980 1000000,
981 10000000,
982};
983
984/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
985 * to platforms without floating point.
986 */
Mike Frysinger5f837c22010-10-20 01:15:53 +0000987static const int multipliers[] = {
Andy Fleming272cc702008-10-30 16:41:01 -0500988 0, /* reserved */
989 10,
990 12,
991 13,
992 15,
993 20,
994 25,
995 30,
996 35,
997 40,
998 45,
999 50,
1000 55,
1001 60,
1002 70,
1003 80,
1004};
1005
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001006static void mmc_set_ios(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001007{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001008 if (mmc->cfg->ops->set_ios)
1009 mmc->cfg->ops->set_ios(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001010}
1011
1012void mmc_set_clock(struct mmc *mmc, uint clock)
1013{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001014 if (clock > mmc->cfg->f_max)
1015 clock = mmc->cfg->f_max;
Andy Fleming272cc702008-10-30 16:41:01 -05001016
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001017 if (clock < mmc->cfg->f_min)
1018 clock = mmc->cfg->f_min;
Andy Fleming272cc702008-10-30 16:41:01 -05001019
1020 mmc->clock = clock;
1021
1022 mmc_set_ios(mmc);
1023}
1024
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001025static void mmc_set_bus_width(struct mmc *mmc, uint width)
Andy Fleming272cc702008-10-30 16:41:01 -05001026{
1027 mmc->bus_width = width;
1028
1029 mmc_set_ios(mmc);
1030}
1031
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001032static int mmc_startup(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001033{
Stephen Warrenf866a462013-06-11 15:14:01 -06001034 int err, i;
Andy Fleming272cc702008-10-30 16:41:01 -05001035 uint mult, freq;
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001036 u64 cmult, csize, capacity;
Andy Fleming272cc702008-10-30 16:41:01 -05001037 struct mmc_cmd cmd;
Simon Glass8bfa1952013-04-03 08:54:30 +00001038 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1039 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +00001040 int timeout = 1000;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001041 bool has_parts = false;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001042 bool part_completed;
Simon Glassc40fdca2016-05-01 13:52:35 -06001043 struct blk_desc *bdesc;
Andy Fleming272cc702008-10-30 16:41:01 -05001044
Thomas Choud52ebf12010-12-24 13:12:21 +00001045#ifdef CONFIG_MMC_SPI_CRC_ON
1046 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1047 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1048 cmd.resp_type = MMC_RSP_R1;
1049 cmd.cmdarg = 1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001050 err = mmc_send_cmd(mmc, &cmd, NULL);
1051
1052 if (err)
1053 return err;
1054 }
1055#endif
1056
Andy Fleming272cc702008-10-30 16:41:01 -05001057 /* Put the Card in Identify Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001058 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1059 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
Andy Fleming272cc702008-10-30 16:41:01 -05001060 cmd.resp_type = MMC_RSP_R2;
1061 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001062
1063 err = mmc_send_cmd(mmc, &cmd, NULL);
1064
1065 if (err)
1066 return err;
1067
1068 memcpy(mmc->cid, cmd.response, 16);
1069
1070 /*
1071 * For MMC cards, set the Relative Address.
1072 * For SD cards, get the Relatvie Address.
1073 * This also puts the cards into Standby State
1074 */
Thomas Choud52ebf12010-12-24 13:12:21 +00001075 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1076 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1077 cmd.cmdarg = mmc->rca << 16;
1078 cmd.resp_type = MMC_RSP_R6;
Andy Fleming272cc702008-10-30 16:41:01 -05001079
Thomas Choud52ebf12010-12-24 13:12:21 +00001080 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001081
Thomas Choud52ebf12010-12-24 13:12:21 +00001082 if (err)
1083 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001084
Thomas Choud52ebf12010-12-24 13:12:21 +00001085 if (IS_SD(mmc))
1086 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1087 }
Andy Fleming272cc702008-10-30 16:41:01 -05001088
1089 /* Get the Card-Specific Data */
1090 cmd.cmdidx = MMC_CMD_SEND_CSD;
1091 cmd.resp_type = MMC_RSP_R2;
1092 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001093
1094 err = mmc_send_cmd(mmc, &cmd, NULL);
1095
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +00001096 /* Waiting for the ready status */
1097 mmc_send_status(mmc, timeout);
1098
Andy Fleming272cc702008-10-30 16:41:01 -05001099 if (err)
1100 return err;
1101
Rabin Vincent998be3d2009-04-05 13:30:56 +05301102 mmc->csd[0] = cmd.response[0];
1103 mmc->csd[1] = cmd.response[1];
1104 mmc->csd[2] = cmd.response[2];
1105 mmc->csd[3] = cmd.response[3];
Andy Fleming272cc702008-10-30 16:41:01 -05001106
1107 if (mmc->version == MMC_VERSION_UNKNOWN) {
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301108 int version = (cmd.response[0] >> 26) & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -05001109
1110 switch (version) {
Bin Meng53e8e402016-03-17 21:53:13 -07001111 case 0:
1112 mmc->version = MMC_VERSION_1_2;
1113 break;
1114 case 1:
1115 mmc->version = MMC_VERSION_1_4;
1116 break;
1117 case 2:
1118 mmc->version = MMC_VERSION_2_2;
1119 break;
1120 case 3:
1121 mmc->version = MMC_VERSION_3;
1122 break;
1123 case 4:
1124 mmc->version = MMC_VERSION_4;
1125 break;
1126 default:
1127 mmc->version = MMC_VERSION_1_2;
1128 break;
Andy Fleming272cc702008-10-30 16:41:01 -05001129 }
1130 }
1131
1132 /* divide frequency by 10, since the mults are 10x bigger */
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301133 freq = fbase[(cmd.response[0] & 0x7)];
1134 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
Andy Fleming272cc702008-10-30 16:41:01 -05001135
1136 mmc->tran_speed = freq * mult;
1137
Markus Niebelab711882013-12-16 13:40:46 +01001138 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
Rabin Vincent998be3d2009-04-05 13:30:56 +05301139 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001140
1141 if (IS_SD(mmc))
1142 mmc->write_bl_len = mmc->read_bl_len;
1143 else
Rabin Vincent998be3d2009-04-05 13:30:56 +05301144 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001145
1146 if (mmc->high_capacity) {
1147 csize = (mmc->csd[1] & 0x3f) << 16
1148 | (mmc->csd[2] & 0xffff0000) >> 16;
1149 cmult = 8;
1150 } else {
1151 csize = (mmc->csd[1] & 0x3ff) << 2
1152 | (mmc->csd[2] & 0xc0000000) >> 30;
1153 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1154 }
1155
Stephen Warrenf866a462013-06-11 15:14:01 -06001156 mmc->capacity_user = (csize + 1) << (cmult + 2);
1157 mmc->capacity_user *= mmc->read_bl_len;
1158 mmc->capacity_boot = 0;
1159 mmc->capacity_rpmb = 0;
1160 for (i = 0; i < 4; i++)
1161 mmc->capacity_gp[i] = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001162
Simon Glass8bfa1952013-04-03 08:54:30 +00001163 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1164 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001165
Simon Glass8bfa1952013-04-03 08:54:30 +00001166 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1167 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001168
Markus Niebelab711882013-12-16 13:40:46 +01001169 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1170 cmd.cmdidx = MMC_CMD_SET_DSR;
1171 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1172 cmd.resp_type = MMC_RSP_NONE;
1173 if (mmc_send_cmd(mmc, &cmd, NULL))
1174 printf("MMC: SET_DSR failed\n");
1175 }
1176
Andy Fleming272cc702008-10-30 16:41:01 -05001177 /* Select the card, and put it into Transfer Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001178 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1179 cmd.cmdidx = MMC_CMD_SELECT_CARD;
Ajay Bhargavfe8f7062011-10-05 03:13:23 +00001180 cmd.resp_type = MMC_RSP_R1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001181 cmd.cmdarg = mmc->rca << 16;
Thomas Choud52ebf12010-12-24 13:12:21 +00001182 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001183
Thomas Choud52ebf12010-12-24 13:12:21 +00001184 if (err)
1185 return err;
1186 }
Andy Fleming272cc702008-10-30 16:41:01 -05001187
Lei Wene6f99a52011-06-22 17:03:31 +00001188 /*
1189 * For SD, its erase group is always one sector
1190 */
1191 mmc->erase_grp_size = 1;
Lei Wenbc897b12011-05-02 16:26:26 +00001192 mmc->part_config = MMCPART_NOAVAILABLE;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301193 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1194 /* check ext_csd version and capacity */
1195 err = mmc_send_ext_csd(mmc, ext_csd);
Diego Santa Cruz9cf199e2014-12-23 10:50:28 +01001196 if (err)
1197 return err;
1198 if (ext_csd[EXT_CSD_REV] >= 2) {
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001199 /*
1200 * According to the JEDEC Standard, the value of
1201 * ext_csd's capacity is valid if the value is more
1202 * than 2GB
1203 */
Lei Wen0560db12011-10-03 20:35:10 +00001204 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1205 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1206 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1207 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
Simon Glass8bfa1952013-04-03 08:54:30 +00001208 capacity *= MMC_MAX_BLOCK_LEN;
Łukasz Majewskib1f1e8212011-07-05 02:19:44 +00001209 if ((capacity >> 20) > 2 * 1024)
Stephen Warrenf866a462013-06-11 15:14:01 -06001210 mmc->capacity_user = capacity;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301211 }
Lei Wenbc897b12011-05-02 16:26:26 +00001212
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001213 switch (ext_csd[EXT_CSD_REV]) {
1214 case 1:
1215 mmc->version = MMC_VERSION_4_1;
1216 break;
1217 case 2:
1218 mmc->version = MMC_VERSION_4_2;
1219 break;
1220 case 3:
1221 mmc->version = MMC_VERSION_4_3;
1222 break;
1223 case 5:
1224 mmc->version = MMC_VERSION_4_41;
1225 break;
1226 case 6:
1227 mmc->version = MMC_VERSION_4_5;
1228 break;
Markus Niebeledab7232014-11-18 15:13:53 +01001229 case 7:
1230 mmc->version = MMC_VERSION_5_0;
1231 break;
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001232 }
1233
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001234 /* The partition data may be non-zero but it is only
1235 * effective if PARTITION_SETTING_COMPLETED is set in
1236 * EXT_CSD, so ignore any data if this bit is not set,
1237 * except for enabling the high-capacity group size
1238 * definition (see below). */
1239 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1240 EXT_CSD_PARTITION_SETTING_COMPLETED);
1241
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001242 /* store the partition info of emmc */
1243 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1244 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1245 ext_csd[EXT_CSD_BOOT_MULT])
1246 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001247 if (part_completed &&
1248 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001249 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1250
1251 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1252
1253 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1254
1255 for (i = 0; i < 4; i++) {
1256 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001257 uint mult = (ext_csd[idx + 2] << 16) +
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001258 (ext_csd[idx + 1] << 8) + ext_csd[idx];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001259 if (mult)
1260 has_parts = true;
1261 if (!part_completed)
1262 continue;
1263 mmc->capacity_gp[i] = mult;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001264 mmc->capacity_gp[i] *=
1265 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1266 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruzf8e89d62014-12-23 10:50:21 +01001267 mmc->capacity_gp[i] <<= 19;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001268 }
1269
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001270 if (part_completed) {
1271 mmc->enh_user_size =
1272 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1273 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1274 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1275 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1276 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1277 mmc->enh_user_size <<= 19;
1278 mmc->enh_user_start =
1279 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1280 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1281 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1282 ext_csd[EXT_CSD_ENH_START_ADDR];
1283 if (mmc->high_capacity)
1284 mmc->enh_user_start <<= 9;
1285 }
Diego Santa Cruza7f852b2014-12-23 10:50:22 +01001286
Lei Wene6f99a52011-06-22 17:03:31 +00001287 /*
Oliver Metz1937e5a2013-10-01 20:32:07 +02001288 * Host needs to enable ERASE_GRP_DEF bit if device is
1289 * partitioned. This bit will be lost every time after a reset
1290 * or power off. This will affect erase size.
Lei Wene6f99a52011-06-22 17:03:31 +00001291 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001292 if (part_completed)
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001293 has_parts = true;
Oliver Metz1937e5a2013-10-01 20:32:07 +02001294 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001295 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1296 has_parts = true;
1297 if (has_parts) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001298 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1299 EXT_CSD_ERASE_GROUP_DEF, 1);
1300
1301 if (err)
1302 return err;
Hannes Petermaier021a8052014-08-08 09:47:22 +02001303 else
1304 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001305 }
Oliver Metz1937e5a2013-10-01 20:32:07 +02001306
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001307 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001308 /* Read out group size from ext_csd */
Lei Wen0560db12011-10-03 20:35:10 +00001309 mmc->erase_grp_size =
Diego Santa Cruza4ff9f82014-12-23 10:50:24 +01001310 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
Markus Niebeld7b29122014-11-18 15:11:42 +01001311 /*
1312 * if high capacity and partition setting completed
1313 * SEC_COUNT is valid even if it is smaller than 2 GiB
1314 * JEDEC Standard JESD84-B45, 6.2.4
1315 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001316 if (mmc->high_capacity && part_completed) {
Markus Niebeld7b29122014-11-18 15:11:42 +01001317 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1318 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1319 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1320 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1321 capacity *= MMC_MAX_BLOCK_LEN;
1322 mmc->capacity_user = capacity;
1323 }
Simon Glass8bfa1952013-04-03 08:54:30 +00001324 } else {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001325 /* Calculate the group size from the csd value. */
Lei Wene6f99a52011-06-22 17:03:31 +00001326 int erase_gsz, erase_gmul;
1327 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1328 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1329 mmc->erase_grp_size = (erase_gsz + 1)
1330 * (erase_gmul + 1);
1331 }
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001332
1333 mmc->hc_wp_grp_size = 1024
1334 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1335 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruz9e41a002014-12-23 10:50:33 +01001336
1337 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301338 }
1339
Simon Glassc40fdca2016-05-01 13:52:35 -06001340 err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
Stephen Warrenf866a462013-06-11 15:14:01 -06001341 if (err)
1342 return err;
1343
Andy Fleming272cc702008-10-30 16:41:01 -05001344 if (IS_SD(mmc))
1345 err = sd_change_freq(mmc);
1346 else
1347 err = mmc_change_freq(mmc);
1348
1349 if (err)
1350 return err;
1351
1352 /* Restrict card's capabilities by what the host can do */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001353 mmc->card_caps &= mmc->cfg->host_caps;
Andy Fleming272cc702008-10-30 16:41:01 -05001354
1355 if (IS_SD(mmc)) {
1356 if (mmc->card_caps & MMC_MODE_4BIT) {
1357 cmd.cmdidx = MMC_CMD_APP_CMD;
1358 cmd.resp_type = MMC_RSP_R1;
1359 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001360
1361 err = mmc_send_cmd(mmc, &cmd, NULL);
1362 if (err)
1363 return err;
1364
1365 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1366 cmd.resp_type = MMC_RSP_R1;
1367 cmd.cmdarg = 2;
Andy Fleming272cc702008-10-30 16:41:01 -05001368 err = mmc_send_cmd(mmc, &cmd, NULL);
1369 if (err)
1370 return err;
1371
1372 mmc_set_bus_width(mmc, 4);
1373 }
1374
1375 if (mmc->card_caps & MMC_MODE_HS)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001376 mmc->tran_speed = 50000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001377 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001378 mmc->tran_speed = 25000000;
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -06001379 } else if (mmc->version >= MMC_VERSION_4) {
1380 /* Only version 4 of MMC supports wider bus widths */
Andy Fleming7798f6d2012-10-31 19:02:38 +00001381 int idx;
1382
1383 /* An array of possible bus widths in order of preference */
1384 static unsigned ext_csd_bits[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001385 EXT_CSD_DDR_BUS_WIDTH_8,
1386 EXT_CSD_DDR_BUS_WIDTH_4,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001387 EXT_CSD_BUS_WIDTH_8,
1388 EXT_CSD_BUS_WIDTH_4,
1389 EXT_CSD_BUS_WIDTH_1,
1390 };
1391
1392 /* An array to map CSD bus widths to host cap bits */
1393 static unsigned ext_to_hostcaps[] = {
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001394 [EXT_CSD_DDR_BUS_WIDTH_4] =
1395 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1396 [EXT_CSD_DDR_BUS_WIDTH_8] =
1397 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001398 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1399 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1400 };
1401
1402 /* An array to map chosen bus width to an integer */
1403 static unsigned widths[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001404 8, 4, 8, 4, 1,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001405 };
1406
1407 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1408 unsigned int extw = ext_csd_bits[idx];
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001409 unsigned int caps = ext_to_hostcaps[extw];
Andy Fleming7798f6d2012-10-31 19:02:38 +00001410
1411 /*
Andrew Gabbasovbf477072014-12-25 10:22:24 -06001412 * If the bus width is still not changed,
1413 * don't try to set the default again.
1414 * Otherwise, recover from switch attempts
1415 * by switching to 1-bit bus width.
1416 */
1417 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1418 mmc->bus_width == 1) {
1419 err = 0;
1420 break;
1421 }
1422
1423 /*
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001424 * Check to make sure the card and controller support
1425 * these capabilities
Andy Fleming7798f6d2012-10-31 19:02:38 +00001426 */
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001427 if ((mmc->card_caps & caps) != caps)
Andy Fleming7798f6d2012-10-31 19:02:38 +00001428 continue;
1429
Andy Fleming272cc702008-10-30 16:41:01 -05001430 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001431 EXT_CSD_BUS_WIDTH, extw);
Andy Fleming272cc702008-10-30 16:41:01 -05001432
1433 if (err)
Lei Wen41378942011-10-03 20:35:11 +00001434 continue;
Andy Fleming272cc702008-10-30 16:41:01 -05001435
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001436 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
Andy Fleming7798f6d2012-10-31 19:02:38 +00001437 mmc_set_bus_width(mmc, widths[idx]);
Andy Fleming272cc702008-10-30 16:41:01 -05001438
Lei Wen41378942011-10-03 20:35:11 +00001439 err = mmc_send_ext_csd(mmc, test_csd);
Andy Fleming272cc702008-10-30 16:41:01 -05001440
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001441 if (err)
1442 continue;
1443
1444 /* Only compare read only fields */
1445 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1446 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1447 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1448 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1449 ext_csd[EXT_CSD_REV]
1450 == test_csd[EXT_CSD_REV] &&
1451 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1452 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1453 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1454 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
Lei Wen41378942011-10-03 20:35:11 +00001455 break;
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001456 else
1457 err = SWITCH_ERR;
Andy Fleming272cc702008-10-30 16:41:01 -05001458 }
1459
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001460 if (err)
1461 return err;
1462
Andy Fleming272cc702008-10-30 16:41:01 -05001463 if (mmc->card_caps & MMC_MODE_HS) {
1464 if (mmc->card_caps & MMC_MODE_HS_52MHz)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001465 mmc->tran_speed = 52000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001466 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001467 mmc->tran_speed = 26000000;
1468 }
Andy Fleming272cc702008-10-30 16:41:01 -05001469 }
1470
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001471 mmc_set_clock(mmc, mmc->tran_speed);
1472
Andrew Gabbasov5af8f452014-12-01 06:59:11 -06001473 /* Fix the block length for DDR mode */
1474 if (mmc->ddr_mode) {
1475 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1476 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1477 }
1478
Andy Fleming272cc702008-10-30 16:41:01 -05001479 /* fill in device description */
Simon Glassc40fdca2016-05-01 13:52:35 -06001480 bdesc = mmc_get_blk_desc(mmc);
1481 bdesc->lun = 0;
1482 bdesc->hwpart = 0;
1483 bdesc->type = 0;
1484 bdesc->blksz = mmc->read_bl_len;
1485 bdesc->log2blksz = LOG2(bdesc->blksz);
1486 bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Sjoerd Simonsfc011f62015-12-04 23:27:40 +01001487#if !defined(CONFIG_SPL_BUILD) || \
1488 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1489 !defined(CONFIG_USE_TINY_PRINTF))
Simon Glassc40fdca2016-05-01 13:52:35 -06001490 sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
Taylor Huttbabce5f2012-10-20 17:15:59 +00001491 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1492 (mmc->cid[3] >> 16) & 0xffff);
Simon Glassc40fdca2016-05-01 13:52:35 -06001493 sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
Taylor Huttbabce5f2012-10-20 17:15:59 +00001494 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1495 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1496 (mmc->cid[2] >> 24) & 0xff);
Simon Glassc40fdca2016-05-01 13:52:35 -06001497 sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
Taylor Huttbabce5f2012-10-20 17:15:59 +00001498 (mmc->cid[2] >> 16) & 0xf);
Paul Burton56196822013-09-04 16:12:25 +01001499#else
Simon Glassc40fdca2016-05-01 13:52:35 -06001500 bdesc->vendor[0] = 0;
1501 bdesc->product[0] = 0;
1502 bdesc->revision[0] = 0;
Paul Burton56196822013-09-04 16:12:25 +01001503#endif
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001504#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
Simon Glassc40fdca2016-05-01 13:52:35 -06001505 part_init(bdesc);
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001506#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001507
1508 return 0;
1509}
1510
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001511static int mmc_send_if_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001512{
1513 struct mmc_cmd cmd;
1514 int err;
1515
1516 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1517 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001518 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
Andy Fleming272cc702008-10-30 16:41:01 -05001519 cmd.resp_type = MMC_RSP_R7;
Andy Fleming272cc702008-10-30 16:41:01 -05001520
1521 err = mmc_send_cmd(mmc, &cmd, NULL);
1522
1523 if (err)
1524 return err;
1525
Rabin Vincent998be3d2009-04-05 13:30:56 +05301526 if ((cmd.response[0] & 0xff) != 0xaa)
Andy Fleming272cc702008-10-30 16:41:01 -05001527 return UNUSABLE_ERR;
1528 else
1529 mmc->version = SD_VERSION_2;
1530
1531 return 0;
1532}
1533
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001534/* not used any more */
1535int __deprecated mmc_register(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001536{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001537#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1538 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1539#endif
1540 return -1;
1541}
1542
Simon Glassad27dd52016-05-01 13:52:40 -06001543#ifdef CONFIG_BLK
1544int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg)
1545{
1546 struct blk_desc *bdesc;
1547 struct udevice *bdev;
1548 int ret;
1549
1550 ret = blk_create_devicef(dev, "mmc_blk", "blk", IF_TYPE_MMC, -1, 512,
1551 0, &bdev);
1552 if (ret) {
1553 debug("Cannot create block device\n");
1554 return ret;
1555 }
1556 bdesc = dev_get_uclass_platdata(bdev);
1557 mmc->cfg = cfg;
1558 mmc->priv = dev;
1559
1560 /* the following chunk was from mmc_register() */
1561
1562 /* Setup dsr related values */
1563 mmc->dsr_imp = 0;
1564 mmc->dsr = 0xffffffff;
1565 /* Setup the universal parts of the block interface just once */
Simon Glassad27dd52016-05-01 13:52:40 -06001566 bdesc->removable = 1;
1567
1568 /* setup initial part type */
1569 bdesc->part_type = mmc->cfg->part_type;
1570 mmc->dev = dev;
1571
1572 return 0;
1573}
1574
1575int mmc_unbind(struct udevice *dev)
1576{
1577 struct udevice *bdev;
1578
1579 device_find_first_child(dev, &bdev);
1580 if (bdev) {
1581 device_remove(bdev);
1582 device_unbind(bdev);
1583 }
1584
1585 return 0;
1586}
1587
1588#else
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001589struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1590{
Simon Glassc40fdca2016-05-01 13:52:35 -06001591 struct blk_desc *bdesc;
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001592 struct mmc *mmc;
1593
1594 /* quick validation */
1595 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1596 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1597 return NULL;
1598
1599 mmc = calloc(1, sizeof(*mmc));
1600 if (mmc == NULL)
1601 return NULL;
1602
1603 mmc->cfg = cfg;
1604 mmc->priv = priv;
1605
1606 /* the following chunk was mmc_register() */
1607
Markus Niebelab711882013-12-16 13:40:46 +01001608 /* Setup dsr related values */
1609 mmc->dsr_imp = 0;
1610 mmc->dsr = 0xffffffff;
Andy Fleming272cc702008-10-30 16:41:01 -05001611 /* Setup the universal parts of the block interface just once */
Simon Glassc40fdca2016-05-01 13:52:35 -06001612 bdesc = mmc_get_blk_desc(mmc);
1613 bdesc->if_type = IF_TYPE_MMC;
1614 bdesc->removable = 1;
1615 bdesc->devnum = mmc_get_next_devnum();
1616 bdesc->block_read = mmc_bread;
1617 bdesc->block_write = mmc_bwrite;
1618 bdesc->block_erase = mmc_berase;
Andy Fleming272cc702008-10-30 16:41:01 -05001619
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001620 /* setup initial part type */
Simon Glassc40fdca2016-05-01 13:52:35 -06001621 bdesc->part_type = mmc->cfg->part_type;
1622 mmc_list_add(mmc);
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001623
1624 return mmc;
1625}
1626
1627void mmc_destroy(struct mmc *mmc)
1628{
1629 /* only freeing memory for now */
1630 free(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001631}
Simon Glassad27dd52016-05-01 13:52:40 -06001632#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001633
Simon Glass33fb2112016-05-01 13:52:41 -06001634#ifndef CONFIG_BLK
Simon Glass3c457f42016-05-01 11:36:15 -06001635static int mmc_get_dev(int dev, struct blk_desc **descp)
Simon Glass663acab2016-05-01 11:36:07 -06001636{
1637 struct mmc *mmc = find_mmc_device(dev);
1638 int ret;
1639
1640 if (!mmc)
1641 return -ENODEV;
1642 ret = mmc_init(mmc);
1643 if (ret)
1644 return ret;
1645
1646 *descp = &mmc->block_dev;
1647
1648 return 0;
1649}
Simon Glass33fb2112016-05-01 13:52:41 -06001650#endif
Simon Glass663acab2016-05-01 11:36:07 -06001651
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001652/* board-specific MMC power initializations. */
1653__weak void board_mmc_power_init(void)
1654{
1655}
1656
Che-Liang Chioue9550442012-11-28 15:21:13 +00001657int mmc_start_init(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001658{
Macpaul Linafd59322011-11-14 23:35:39 +00001659 int err;
Andy Fleming272cc702008-10-30 16:41:01 -05001660
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001661 /* we pretend there's no card when init is NULL */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001662 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
Thierry Reding48972d92012-01-02 01:15:37 +00001663 mmc->has_init = 0;
Paul Burton56196822013-09-04 16:12:25 +01001664#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Thierry Reding48972d92012-01-02 01:15:37 +00001665 printf("MMC: no card present\n");
Paul Burton56196822013-09-04 16:12:25 +01001666#endif
Thierry Reding48972d92012-01-02 01:15:37 +00001667 return NO_CARD_ERR;
1668 }
1669
Lei Wenbc897b12011-05-02 16:26:26 +00001670 if (mmc->has_init)
1671 return 0;
1672
Yangbo Lu5a8dbdc2015-04-22 13:57:00 +08001673#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1674 mmc_adapter_card_type_ident();
1675#endif
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001676 board_mmc_power_init();
1677
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001678 /* made sure it's not NULL earlier */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001679 err = mmc->cfg->ops->init(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001680
1681 if (err)
1682 return err;
1683
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001684 mmc->ddr_mode = 0;
Ilya Yanokb86b85e2009-06-29 17:53:16 +04001685 mmc_set_bus_width(mmc, 1);
1686 mmc_set_clock(mmc, 1);
1687
Andy Fleming272cc702008-10-30 16:41:01 -05001688 /* Reset the Card */
1689 err = mmc_go_idle(mmc);
1690
1691 if (err)
1692 return err;
1693
Lei Wenbc897b12011-05-02 16:26:26 +00001694 /* The internal partition reset to user partition(0) at every CMD0*/
Simon Glassc40fdca2016-05-01 13:52:35 -06001695 mmc_get_blk_desc(mmc)->hwpart = 0;
Lei Wenbc897b12011-05-02 16:26:26 +00001696
Andy Fleming272cc702008-10-30 16:41:01 -05001697 /* Test for SD version 2 */
Macpaul Linafd59322011-11-14 23:35:39 +00001698 err = mmc_send_if_cond(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001699
Andy Fleming272cc702008-10-30 16:41:01 -05001700 /* Now try to get the SD card's operating condition */
1701 err = sd_send_op_cond(mmc);
1702
1703 /* If the command timed out, we check for an MMC card */
1704 if (err == TIMEOUT) {
1705 err = mmc_send_op_cond(mmc);
1706
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001707 if (err) {
Paul Burton56196822013-09-04 16:12:25 +01001708#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Fleming272cc702008-10-30 16:41:01 -05001709 printf("Card did not respond to voltage select!\n");
Paul Burton56196822013-09-04 16:12:25 +01001710#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001711 return UNUSABLE_ERR;
1712 }
1713 }
1714
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001715 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001716 mmc->init_in_progress = 1;
1717
1718 return err;
1719}
1720
1721static int mmc_complete_init(struct mmc *mmc)
1722{
1723 int err = 0;
1724
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001725 mmc->init_in_progress = 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001726 if (mmc->op_cond_pending)
1727 err = mmc_complete_op_cond(mmc);
1728
1729 if (!err)
1730 err = mmc_startup(mmc);
Lei Wenbc897b12011-05-02 16:26:26 +00001731 if (err)
1732 mmc->has_init = 0;
1733 else
1734 mmc->has_init = 1;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001735 return err;
1736}
1737
1738int mmc_init(struct mmc *mmc)
1739{
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001740 int err = 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02001741 unsigned start;
Simon Glass33fb2112016-05-01 13:52:41 -06001742#ifdef CONFIG_DM_MMC
1743 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
Che-Liang Chioue9550442012-11-28 15:21:13 +00001744
Simon Glass33fb2112016-05-01 13:52:41 -06001745 upriv->mmc = mmc;
1746#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00001747 if (mmc->has_init)
1748 return 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02001749
1750 start = get_timer(0);
1751
Che-Liang Chioue9550442012-11-28 15:21:13 +00001752 if (!mmc->init_in_progress)
1753 err = mmc_start_init(mmc);
1754
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001755 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001756 err = mmc_complete_init(mmc);
1757 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
Lei Wenbc897b12011-05-02 16:26:26 +00001758 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001759}
1760
Markus Niebelab711882013-12-16 13:40:46 +01001761int mmc_set_dsr(struct mmc *mmc, u16 val)
1762{
1763 mmc->dsr = val;
1764 return 0;
1765}
1766
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001767/* CPU-specific MMC initializations */
1768__weak int cpu_mmc_init(bd_t *bis)
Andy Fleming272cc702008-10-30 16:41:01 -05001769{
1770 return -1;
1771}
1772
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001773/* board-specific MMC initializations. */
1774__weak int board_mmc_init(bd_t *bis)
1775{
1776 return -1;
1777}
Andy Fleming272cc702008-10-30 16:41:01 -05001778
Che-Liang Chioue9550442012-11-28 15:21:13 +00001779void mmc_set_preinit(struct mmc *mmc, int preinit)
1780{
1781 mmc->preinit = preinit;
1782}
1783
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001784#if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1785static int mmc_probe(bd_t *bis)
1786{
1787 return 0;
1788}
1789#elif defined(CONFIG_DM_MMC)
1790static int mmc_probe(bd_t *bis)
1791{
Simon Glass4a1db6d2015-12-29 05:22:49 -07001792 int ret, i;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001793 struct uclass *uc;
Simon Glass4a1db6d2015-12-29 05:22:49 -07001794 struct udevice *dev;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001795
1796 ret = uclass_get(UCLASS_MMC, &uc);
1797 if (ret)
1798 return ret;
1799
Simon Glass4a1db6d2015-12-29 05:22:49 -07001800 /*
1801 * Try to add them in sequence order. Really with driver model we
1802 * should allow holes, but the current MMC list does not allow that.
1803 * So if we request 0, 1, 3 we will get 0, 1, 2.
1804 */
1805 for (i = 0; ; i++) {
1806 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1807 if (ret == -ENODEV)
1808 break;
1809 }
1810 uclass_foreach_dev(dev, uc) {
1811 ret = device_probe(dev);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001812 if (ret)
Simon Glass4a1db6d2015-12-29 05:22:49 -07001813 printf("%s - probe failed: %d\n", dev->name, ret);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001814 }
1815
1816 return 0;
1817}
1818#else
1819static int mmc_probe(bd_t *bis)
1820{
1821 if (board_mmc_init(bis) < 0)
1822 cpu_mmc_init(bis);
1823
1824 return 0;
1825}
1826#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00001827
Andy Fleming272cc702008-10-30 16:41:01 -05001828int mmc_initialize(bd_t *bis)
1829{
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001830 static int initialized = 0;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001831 int ret;
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001832 if (initialized) /* Avoid initializing mmc multiple times */
1833 return 0;
1834 initialized = 1;
1835
Simon Glassc40fdca2016-05-01 13:52:35 -06001836#ifndef CONFIG_BLK
1837 mmc_list_init();
1838#endif
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001839 ret = mmc_probe(bis);
1840 if (ret)
1841 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -05001842
Ying Zhangbb0dc102013-08-16 15:16:11 +08001843#ifndef CONFIG_SPL_BUILD
Andy Fleming272cc702008-10-30 16:41:01 -05001844 print_mmc_devices(',');
Ying Zhangbb0dc102013-08-16 15:16:11 +08001845#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001846
Simon Glassc40fdca2016-05-01 13:52:35 -06001847 mmc_do_preinit();
Andy Fleming272cc702008-10-30 16:41:01 -05001848 return 0;
1849}
Amar3690d6d2013-04-27 11:42:58 +05301850
1851#ifdef CONFIG_SUPPORT_EMMC_BOOT
1852/*
1853 * This function changes the size of boot partition and the size of rpmb
1854 * partition present on EMMC devices.
1855 *
1856 * Input Parameters:
1857 * struct *mmc: pointer for the mmc device strcuture
1858 * bootsize: size of boot partition
1859 * rpmbsize: size of rpmb partition
1860 *
1861 * Returns 0 on success.
1862 */
1863
1864int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1865 unsigned long rpmbsize)
1866{
1867 int err;
1868 struct mmc_cmd cmd;
1869
1870 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1871 cmd.cmdidx = MMC_CMD_RES_MAN;
1872 cmd.resp_type = MMC_RSP_R1b;
1873 cmd.cmdarg = MMC_CMD62_ARG1;
1874
1875 err = mmc_send_cmd(mmc, &cmd, NULL);
1876 if (err) {
1877 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1878 return err;
1879 }
1880
1881 /* Boot partition changing mode */
1882 cmd.cmdidx = MMC_CMD_RES_MAN;
1883 cmd.resp_type = MMC_RSP_R1b;
1884 cmd.cmdarg = MMC_CMD62_ARG2;
1885
1886 err = mmc_send_cmd(mmc, &cmd, NULL);
1887 if (err) {
1888 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1889 return err;
1890 }
1891 /* boot partition size is multiple of 128KB */
1892 bootsize = (bootsize * 1024) / 128;
1893
1894 /* Arg: boot partition size */
1895 cmd.cmdidx = MMC_CMD_RES_MAN;
1896 cmd.resp_type = MMC_RSP_R1b;
1897 cmd.cmdarg = bootsize;
1898
1899 err = mmc_send_cmd(mmc, &cmd, NULL);
1900 if (err) {
1901 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1902 return err;
1903 }
1904 /* RPMB partition size is multiple of 128KB */
1905 rpmbsize = (rpmbsize * 1024) / 128;
1906 /* Arg: RPMB partition size */
1907 cmd.cmdidx = MMC_CMD_RES_MAN;
1908 cmd.resp_type = MMC_RSP_R1b;
1909 cmd.cmdarg = rpmbsize;
1910
1911 err = mmc_send_cmd(mmc, &cmd, NULL);
1912 if (err) {
1913 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1914 return err;
1915 }
1916 return 0;
1917}
1918
1919/*
Tom Rini5a99b9d2014-02-05 10:24:22 -05001920 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1921 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1922 * and BOOT_MODE.
1923 *
1924 * Returns 0 on success.
1925 */
1926int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1927{
1928 int err;
1929
1930 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1931 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1932 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1933 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1934
1935 if (err)
1936 return err;
1937 return 0;
1938}
1939
1940/*
Tom Rini792970b2014-02-05 10:24:21 -05001941 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1942 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1943 * PARTITION_ACCESS.
1944 *
1945 * Returns 0 on success.
1946 */
1947int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1948{
1949 int err;
1950
1951 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1952 EXT_CSD_BOOT_ACK(ack) |
1953 EXT_CSD_BOOT_PART_NUM(part_num) |
1954 EXT_CSD_PARTITION_ACCESS(access));
1955
1956 if (err)
1957 return err;
1958 return 0;
1959}
Tom Rini33ace362014-02-07 14:15:20 -05001960
1961/*
1962 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1963 * for enable. Note that this is a write-once field for non-zero values.
1964 *
1965 * Returns 0 on success.
1966 */
1967int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1968{
1969 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1970 enable);
1971}
Amar3690d6d2013-04-27 11:42:58 +05301972#endif
Simon Glass663acab2016-05-01 11:36:07 -06001973
Simon Glass33fb2112016-05-01 13:52:41 -06001974#ifdef CONFIG_BLK
1975static const struct blk_ops mmc_blk_ops = {
1976 .read = mmc_bread,
1977 .write = mmc_bwrite,
1978 .select_hwpart = mmc_select_hwpart,
1979};
1980
1981U_BOOT_DRIVER(mmc_blk) = {
1982 .name = "mmc_blk",
1983 .id = UCLASS_BLK,
1984 .ops = &mmc_blk_ops,
1985};
1986#else
Simon Glass663acab2016-05-01 11:36:07 -06001987U_BOOT_LEGACY_BLK(mmc) = {
1988 .if_typename = "mmc",
1989 .if_type = IF_TYPE_MMC,
1990 .max_devs = -1,
Simon Glass3c457f42016-05-01 11:36:15 -06001991 .get_dev = mmc_get_dev,
Simon Glasse17d1142016-05-01 13:52:26 -06001992 .select_hwpart = mmc_select_hwpartp,
Simon Glass663acab2016-05-01 11:36:07 -06001993};
Simon Glass33fb2112016-05-01 13:52:41 -06001994#endif