blob: 3cdf6a4f3b1370a3a3ec43e39db7a52c3f6cab96 [file] [log] [blame]
Andy Fleming272cc702008-10-30 16:41:01 -05001/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andy Fleming272cc702008-10-30 16:41:01 -05008 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
Sjoerd Simons8e3332e2015-08-30 16:55:45 -060013#include <dm.h>
14#include <dm/device-internal.h>
Stephen Warrend4622df2014-05-23 12:47:06 -060015#include <errno.h>
Andy Fleming272cc702008-10-30 16:41:01 -050016#include <mmc.h>
17#include <part.h>
Peng Fan2051aef2016-10-11 15:08:43 +080018#include <power/regulator.h>
Andy Fleming272cc702008-10-30 16:41:01 -050019#include <malloc.h>
Simon Glasscf92e052015-09-02 17:24:58 -060020#include <memalign.h>
Andy Fleming272cc702008-10-30 16:41:01 -050021#include <linux/list.h>
Rabin Vincent9b1f9422009-04-05 13:30:54 +053022#include <div64.h>
Paul Burtonda61fa52013-09-09 15:30:26 +010023#include "mmc_private.h"
Andy Fleming272cc702008-10-30 16:41:01 -050024
Peng Fan3697e592016-09-01 11:13:38 +080025static const unsigned int sd_au_size[] = {
26 0, SZ_16K / 512, SZ_32K / 512,
27 SZ_64K / 512, SZ_128K / 512, SZ_256K / 512,
28 SZ_512K / 512, SZ_1M / 512, SZ_2M / 512,
29 SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512,
30 SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, SZ_64M / 512,
31};
32
Marek Vasutb5b838f2016-12-01 02:06:33 +010033#if CONFIG_IS_ENABLED(MMC_TINY)
34static struct mmc mmc_static;
35struct mmc *find_mmc_device(int dev_num)
36{
37 return &mmc_static;
38}
39
40void mmc_do_preinit(void)
41{
42 struct mmc *m = &mmc_static;
43#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
44 mmc_set_preinit(m, 1);
45#endif
46 if (m->preinit)
47 mmc_start_init(m);
48}
49
50struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
51{
52 return &mmc->block_dev;
53}
54#endif
55
Simon Glass8ca51e52016-06-12 23:30:22 -060056#ifndef CONFIG_DM_MMC_OPS
Jeroen Hofstee750121c2014-07-12 21:24:08 +020057__weak int board_mmc_getwp(struct mmc *mmc)
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000058{
59 return -1;
60}
61
62int mmc_getwp(struct mmc *mmc)
63{
64 int wp;
65
66 wp = board_mmc_getwp(mmc);
67
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000068 if (wp < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020069 if (mmc->cfg->ops->getwp)
70 wp = mmc->cfg->ops->getwp(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000071 else
72 wp = 0;
73 }
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000074
75 return wp;
76}
77
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +020078__weak int board_mmc_getcd(struct mmc *mmc)
79{
Stefano Babic11fdade2010-02-05 15:04:43 +010080 return -1;
81}
Simon Glass8ca51e52016-06-12 23:30:22 -060082#endif
Stefano Babic11fdade2010-02-05 15:04:43 +010083
Marek Vasut8635ff92012-03-15 18:41:35 +000084#ifdef CONFIG_MMC_TRACE
Simon Glassc0c76eb2016-06-12 23:30:20 -060085void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
86{
87 printf("CMD_SEND:%d\n", cmd->cmdidx);
88 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
89}
90
91void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
92{
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000093 int i;
94 u8 *ptr;
95
Bin Meng7863ce52016-03-17 21:53:14 -070096 if (ret) {
97 printf("\t\tRET\t\t\t %d\n", ret);
98 } else {
99 switch (cmd->resp_type) {
100 case MMC_RSP_NONE:
101 printf("\t\tMMC_RSP_NONE\n");
102 break;
103 case MMC_RSP_R1:
104 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
105 cmd->response[0]);
106 break;
107 case MMC_RSP_R1b:
108 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
109 cmd->response[0]);
110 break;
111 case MMC_RSP_R2:
112 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
113 cmd->response[0]);
114 printf("\t\t \t\t 0x%08X \n",
115 cmd->response[1]);
116 printf("\t\t \t\t 0x%08X \n",
117 cmd->response[2]);
118 printf("\t\t \t\t 0x%08X \n",
119 cmd->response[3]);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000120 printf("\n");
Bin Meng7863ce52016-03-17 21:53:14 -0700121 printf("\t\t\t\t\tDUMPING DATA\n");
122 for (i = 0; i < 4; i++) {
123 int j;
124 printf("\t\t\t\t\t%03d - ", i*4);
125 ptr = (u8 *)&cmd->response[i];
126 ptr += 3;
127 for (j = 0; j < 4; j++)
128 printf("%02X ", *ptr--);
129 printf("\n");
130 }
131 break;
132 case MMC_RSP_R3:
133 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
134 cmd->response[0]);
135 break;
136 default:
137 printf("\t\tERROR MMC rsp not supported\n");
138 break;
Bin Meng53e8e402016-03-17 21:53:13 -0700139 }
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000140 }
Simon Glassc0c76eb2016-06-12 23:30:20 -0600141}
142
143void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
144{
145 int status;
146
147 status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
148 printf("CURR STATE:%d\n", status);
149}
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000150#endif
Simon Glassc0c76eb2016-06-12 23:30:20 -0600151
Simon Glass8ca51e52016-06-12 23:30:22 -0600152#ifndef CONFIG_DM_MMC_OPS
Simon Glassc0c76eb2016-06-12 23:30:20 -0600153int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
154{
155 int ret;
156
157 mmmc_trace_before_send(mmc, cmd);
158 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
159 mmmc_trace_after_send(mmc, cmd, ret);
160
Marek Vasut8635ff92012-03-15 18:41:35 +0000161 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500162}
Simon Glass8ca51e52016-06-12 23:30:22 -0600163#endif
Andy Fleming272cc702008-10-30 16:41:01 -0500164
Paul Burtonda61fa52013-09-09 15:30:26 +0100165int mmc_send_status(struct mmc *mmc, int timeout)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000166{
167 struct mmc_cmd cmd;
Jan Kloetzked617c422012-02-05 22:29:12 +0000168 int err, retries = 5;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000169
170 cmd.cmdidx = MMC_CMD_SEND_STATUS;
171 cmd.resp_type = MMC_RSP_R1;
Marek Vasutaaf3d412011-08-10 09:24:48 +0200172 if (!mmc_host_is_spi(mmc))
173 cmd.cmdarg = mmc->rca << 16;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000174
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500175 while (1) {
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000176 err = mmc_send_cmd(mmc, &cmd, NULL);
Jan Kloetzked617c422012-02-05 22:29:12 +0000177 if (!err) {
178 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
179 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
180 MMC_STATE_PRG)
181 break;
182 else if (cmd.response[0] & MMC_STATUS_MASK) {
Paul Burton56196822013-09-04 16:12:25 +0100183#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jan Kloetzked617c422012-02-05 22:29:12 +0000184 printf("Status Error: 0x%08X\n",
185 cmd.response[0]);
Paul Burton56196822013-09-04 16:12:25 +0100186#endif
Jaehoon Chung915ffa52016-07-19 16:33:36 +0900187 return -ECOMM;
Jan Kloetzked617c422012-02-05 22:29:12 +0000188 }
189 } else if (--retries < 0)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000190 return err;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000191
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500192 if (timeout-- <= 0)
193 break;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000194
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500195 udelay(1000);
196 }
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000197
Simon Glassc0c76eb2016-06-12 23:30:20 -0600198 mmc_trace_state(mmc, &cmd);
Jongman Heo5b0c9422012-06-03 21:32:13 +0000199 if (timeout <= 0) {
Paul Burton56196822013-09-04 16:12:25 +0100200#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000201 printf("Timeout waiting card ready\n");
Paul Burton56196822013-09-04 16:12:25 +0100202#endif
Jaehoon Chung915ffa52016-07-19 16:33:36 +0900203 return -ETIMEDOUT;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000204 }
205
206 return 0;
207}
208
Paul Burtonda61fa52013-09-09 15:30:26 +0100209int mmc_set_blocklen(struct mmc *mmc, int len)
Andy Fleming272cc702008-10-30 16:41:01 -0500210{
211 struct mmc_cmd cmd;
212
Andrew Gabbasov786e8f82014-12-01 06:59:09 -0600213 if (mmc->ddr_mode)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900214 return 0;
215
Andy Fleming272cc702008-10-30 16:41:01 -0500216 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
217 cmd.resp_type = MMC_RSP_R1;
218 cmd.cmdarg = len;
Andy Fleming272cc702008-10-30 16:41:01 -0500219
220 return mmc_send_cmd(mmc, &cmd, NULL);
221}
222
Sascha Silbeff8fef52013-06-14 13:07:25 +0200223static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000224 lbaint_t blkcnt)
Andy Fleming272cc702008-10-30 16:41:01 -0500225{
226 struct mmc_cmd cmd;
227 struct mmc_data data;
228
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700229 if (blkcnt > 1)
230 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
231 else
232 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
Andy Fleming272cc702008-10-30 16:41:01 -0500233
234 if (mmc->high_capacity)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700235 cmd.cmdarg = start;
Andy Fleming272cc702008-10-30 16:41:01 -0500236 else
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700237 cmd.cmdarg = start * mmc->read_bl_len;
Andy Fleming272cc702008-10-30 16:41:01 -0500238
239 cmd.resp_type = MMC_RSP_R1;
Andy Fleming272cc702008-10-30 16:41:01 -0500240
241 data.dest = dst;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700242 data.blocks = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500243 data.blocksize = mmc->read_bl_len;
244 data.flags = MMC_DATA_READ;
245
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700246 if (mmc_send_cmd(mmc, &cmd, &data))
247 return 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500248
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700249 if (blkcnt > 1) {
250 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
251 cmd.cmdarg = 0;
252 cmd.resp_type = MMC_RSP_R1b;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700253 if (mmc_send_cmd(mmc, &cmd, NULL)) {
Paul Burton56196822013-09-04 16:12:25 +0100254#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700255 printf("mmc fail to send stop cmd\n");
Paul Burton56196822013-09-04 16:12:25 +0100256#endif
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700257 return 0;
258 }
Andy Fleming272cc702008-10-30 16:41:01 -0500259 }
260
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700261 return blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500262}
263
Simon Glass33fb2112016-05-01 13:52:41 -0600264#ifdef CONFIG_BLK
Simon Glass7dba0b92016-06-12 23:30:15 -0600265ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
Simon Glass33fb2112016-05-01 13:52:41 -0600266#else
Simon Glass7dba0b92016-06-12 23:30:15 -0600267ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
268 void *dst)
Simon Glass33fb2112016-05-01 13:52:41 -0600269#endif
Andy Fleming272cc702008-10-30 16:41:01 -0500270{
Simon Glass33fb2112016-05-01 13:52:41 -0600271#ifdef CONFIG_BLK
272 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
273#endif
Simon Glassbcce53d2016-02-29 15:25:51 -0700274 int dev_num = block_dev->devnum;
Stephen Warren873cc1d2015-12-07 11:38:49 -0700275 int err;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700276 lbaint_t cur, blocks_todo = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500277
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700278 if (blkcnt == 0)
279 return 0;
280
281 struct mmc *mmc = find_mmc_device(dev_num);
Andy Fleming272cc702008-10-30 16:41:01 -0500282 if (!mmc)
283 return 0;
284
Marek Vasutb5b838f2016-12-01 02:06:33 +0100285 if (CONFIG_IS_ENABLED(MMC_TINY))
286 err = mmc_switch_part(mmc, block_dev->hwpart);
287 else
288 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
289
Stephen Warren873cc1d2015-12-07 11:38:49 -0700290 if (err < 0)
291 return 0;
292
Simon Glassc40fdca2016-05-01 13:52:35 -0600293 if ((start + blkcnt) > block_dev->lba) {
Paul Burton56196822013-09-04 16:12:25 +0100294#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Sascha Silbeff8fef52013-06-14 13:07:25 +0200295 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
Simon Glassc40fdca2016-05-01 13:52:35 -0600296 start + blkcnt, block_dev->lba);
Paul Burton56196822013-09-04 16:12:25 +0100297#endif
Lei Wend2bf29e2010-09-13 22:07:27 +0800298 return 0;
299 }
Andy Fleming272cc702008-10-30 16:41:01 -0500300
Simon Glass11692992015-06-23 15:38:50 -0600301 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
302 debug("%s: Failed to set blocklen\n", __func__);
Andy Fleming272cc702008-10-30 16:41:01 -0500303 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600304 }
Andy Fleming272cc702008-10-30 16:41:01 -0500305
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700306 do {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200307 cur = (blocks_todo > mmc->cfg->b_max) ?
308 mmc->cfg->b_max : blocks_todo;
Simon Glass11692992015-06-23 15:38:50 -0600309 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
310 debug("%s: Failed to read blocks\n", __func__);
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700311 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600312 }
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700313 blocks_todo -= cur;
314 start += cur;
315 dst += cur * mmc->read_bl_len;
316 } while (blocks_todo > 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500317
318 return blkcnt;
319}
320
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000321static int mmc_go_idle(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500322{
323 struct mmc_cmd cmd;
324 int err;
325
326 udelay(1000);
327
328 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
329 cmd.cmdarg = 0;
330 cmd.resp_type = MMC_RSP_NONE;
Andy Fleming272cc702008-10-30 16:41:01 -0500331
332 err = mmc_send_cmd(mmc, &cmd, NULL);
333
334 if (err)
335 return err;
336
337 udelay(2000);
338
339 return 0;
340}
341
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000342static int sd_send_op_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500343{
344 int timeout = 1000;
345 int err;
346 struct mmc_cmd cmd;
347
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500348 while (1) {
Andy Fleming272cc702008-10-30 16:41:01 -0500349 cmd.cmdidx = MMC_CMD_APP_CMD;
350 cmd.resp_type = MMC_RSP_R1;
351 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500352
353 err = mmc_send_cmd(mmc, &cmd, NULL);
354
355 if (err)
356 return err;
357
358 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
359 cmd.resp_type = MMC_RSP_R3;
Stefano Babic250de122010-01-20 18:20:39 +0100360
361 /*
362 * Most cards do not answer if some reserved bits
363 * in the ocr are set. However, Some controller
364 * can set bit 7 (reserved for low voltages), but
365 * how to manage low voltages SD card is not yet
366 * specified.
367 */
Thomas Choud52ebf12010-12-24 13:12:21 +0000368 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200369 (mmc->cfg->voltages & 0xff8000);
Andy Fleming272cc702008-10-30 16:41:01 -0500370
371 if (mmc->version == SD_VERSION_2)
372 cmd.cmdarg |= OCR_HCS;
373
374 err = mmc_send_cmd(mmc, &cmd, NULL);
375
376 if (err)
377 return err;
378
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500379 if (cmd.response[0] & OCR_BUSY)
380 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500381
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500382 if (timeout-- <= 0)
Jaehoon Chung915ffa52016-07-19 16:33:36 +0900383 return -EOPNOTSUPP;
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500384
385 udelay(1000);
386 }
Andy Fleming272cc702008-10-30 16:41:01 -0500387
388 if (mmc->version != SD_VERSION_2)
389 mmc->version = SD_VERSION_1_0;
390
Thomas Choud52ebf12010-12-24 13:12:21 +0000391 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
392 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
393 cmd.resp_type = MMC_RSP_R3;
394 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000395
396 err = mmc_send_cmd(mmc, &cmd, NULL);
397
398 if (err)
399 return err;
400 }
401
Rabin Vincent998be3d2009-04-05 13:30:56 +0530402 mmc->ocr = cmd.response[0];
Andy Fleming272cc702008-10-30 16:41:01 -0500403
404 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
405 mmc->rca = 0;
406
407 return 0;
408}
409
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500410static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
Andy Fleming272cc702008-10-30 16:41:01 -0500411{
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500412 struct mmc_cmd cmd;
Andy Fleming272cc702008-10-30 16:41:01 -0500413 int err;
414
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500415 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
416 cmd.resp_type = MMC_RSP_R3;
417 cmd.cmdarg = 0;
Rob Herring5a203972015-03-23 17:56:59 -0500418 if (use_arg && !mmc_host_is_spi(mmc))
419 cmd.cmdarg = OCR_HCS |
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200420 (mmc->cfg->voltages &
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500421 (mmc->ocr & OCR_VOLTAGE_MASK)) |
422 (mmc->ocr & OCR_ACCESS_MODE);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000423
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500424 err = mmc_send_cmd(mmc, &cmd, NULL);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000425 if (err)
426 return err;
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500427 mmc->ocr = cmd.response[0];
Che-Liang Chioue9550442012-11-28 15:21:13 +0000428 return 0;
429}
430
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200431static int mmc_send_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000432{
Che-Liang Chioue9550442012-11-28 15:21:13 +0000433 int err, i;
434
Andy Fleming272cc702008-10-30 16:41:01 -0500435 /* Some cards seem to need this */
436 mmc_go_idle(mmc);
437
Raffaele Recalcati31cacba2011-03-11 02:01:13 +0000438 /* Asking to the card its capabilities */
Che-Liang Chioue9550442012-11-28 15:21:13 +0000439 for (i = 0; i < 2; i++) {
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500440 err = mmc_send_op_cond_iter(mmc, i != 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500441 if (err)
442 return err;
443
Che-Liang Chioue9550442012-11-28 15:21:13 +0000444 /* exit if not busy (flag seems to be inverted) */
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500445 if (mmc->ocr & OCR_BUSY)
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500446 break;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000447 }
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500448 mmc->op_cond_pending = 1;
449 return 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000450}
Andy Fleming272cc702008-10-30 16:41:01 -0500451
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200452static int mmc_complete_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000453{
454 struct mmc_cmd cmd;
455 int timeout = 1000;
456 uint start;
457 int err;
458
459 mmc->op_cond_pending = 0;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500460 if (!(mmc->ocr & OCR_BUSY)) {
Yangbo Lud188b112016-08-02 15:33:18 +0800461 /* Some cards seem to need this */
462 mmc_go_idle(mmc);
463
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500464 start = get_timer(0);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500465 while (1) {
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500466 err = mmc_send_op_cond_iter(mmc, 1);
467 if (err)
468 return err;
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500469 if (mmc->ocr & OCR_BUSY)
470 break;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500471 if (get_timer(start) > timeout)
Jaehoon Chung915ffa52016-07-19 16:33:36 +0900472 return -EOPNOTSUPP;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500473 udelay(100);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500474 }
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500475 }
Andy Fleming272cc702008-10-30 16:41:01 -0500476
Thomas Choud52ebf12010-12-24 13:12:21 +0000477 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
478 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
479 cmd.resp_type = MMC_RSP_R3;
480 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000481
482 err = mmc_send_cmd(mmc, &cmd, NULL);
483
484 if (err)
485 return err;
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500486
487 mmc->ocr = cmd.response[0];
Thomas Choud52ebf12010-12-24 13:12:21 +0000488 }
489
Andy Fleming272cc702008-10-30 16:41:01 -0500490 mmc->version = MMC_VERSION_UNKNOWN;
Andy Fleming272cc702008-10-30 16:41:01 -0500491
492 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
Stephen Warrendef816a2014-01-30 16:11:12 -0700493 mmc->rca = 1;
Andy Fleming272cc702008-10-30 16:41:01 -0500494
495 return 0;
496}
497
498
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000499static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
Andy Fleming272cc702008-10-30 16:41:01 -0500500{
501 struct mmc_cmd cmd;
502 struct mmc_data data;
503 int err;
504
505 /* Get the Card Status Register */
506 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
507 cmd.resp_type = MMC_RSP_R1;
508 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500509
Yoshihiro Shimodacdfd1ac2012-06-07 19:09:11 +0000510 data.dest = (char *)ext_csd;
Andy Fleming272cc702008-10-30 16:41:01 -0500511 data.blocks = 1;
Simon Glass8bfa1952013-04-03 08:54:30 +0000512 data.blocksize = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -0500513 data.flags = MMC_DATA_READ;
514
515 err = mmc_send_cmd(mmc, &cmd, &data);
516
517 return err;
518}
519
Simon Glassc40704f2016-06-12 23:30:18 -0600520int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
Andy Fleming272cc702008-10-30 16:41:01 -0500521{
522 struct mmc_cmd cmd;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000523 int timeout = 1000;
Maxime Riparda9003dc2016-11-04 16:18:08 +0100524 int retries = 3;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000525 int ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500526
527 cmd.cmdidx = MMC_CMD_SWITCH;
528 cmd.resp_type = MMC_RSP_R1b;
529 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000530 (index << 16) |
531 (value << 8);
Andy Fleming272cc702008-10-30 16:41:01 -0500532
Maxime Riparda9003dc2016-11-04 16:18:08 +0100533 while (retries > 0) {
534 ret = mmc_send_cmd(mmc, &cmd, NULL);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000535
Maxime Riparda9003dc2016-11-04 16:18:08 +0100536 /* Waiting for the ready status */
537 if (!ret) {
538 ret = mmc_send_status(mmc, timeout);
539 return ret;
540 }
541
542 retries--;
543 }
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000544
545 return ret;
546
Andy Fleming272cc702008-10-30 16:41:01 -0500547}
548
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000549static int mmc_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500550{
Simon Glass8bfa1952013-04-03 08:54:30 +0000551 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
Andy Fleming272cc702008-10-30 16:41:01 -0500552 char cardtype;
553 int err;
554
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600555 mmc->card_caps = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500556
Thomas Choud52ebf12010-12-24 13:12:21 +0000557 if (mmc_host_is_spi(mmc))
558 return 0;
559
Andy Fleming272cc702008-10-30 16:41:01 -0500560 /* Only version 4 supports high-speed */
561 if (mmc->version < MMC_VERSION_4)
562 return 0;
563
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600564 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
565
Andy Fleming272cc702008-10-30 16:41:01 -0500566 err = mmc_send_ext_csd(mmc, ext_csd);
567
568 if (err)
569 return err;
570
Lei Wen0560db12011-10-03 20:35:10 +0000571 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -0500572
573 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
574
575 if (err)
Heiko Schochera5e27b42016-06-07 08:31:21 +0200576 return err;
Andy Fleming272cc702008-10-30 16:41:01 -0500577
578 /* Now check to see that it worked */
579 err = mmc_send_ext_csd(mmc, ext_csd);
580
581 if (err)
582 return err;
583
584 /* No high-speed support */
Lei Wen0560db12011-10-03 20:35:10 +0000585 if (!ext_csd[EXT_CSD_HS_TIMING])
Andy Fleming272cc702008-10-30 16:41:01 -0500586 return 0;
587
588 /* High Speed is set, there are two types: 52MHz and 26MHz */
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900589 if (cardtype & EXT_CSD_CARD_TYPE_52) {
Andrew Gabbasov201d5ac2014-12-01 06:59:10 -0600590 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900591 mmc->card_caps |= MMC_MODE_DDR_52MHz;
Andy Fleming272cc702008-10-30 16:41:01 -0500592 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900593 } else {
Andy Fleming272cc702008-10-30 16:41:01 -0500594 mmc->card_caps |= MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900595 }
Andy Fleming272cc702008-10-30 16:41:01 -0500596
597 return 0;
598}
599
Stephen Warrenf866a462013-06-11 15:14:01 -0600600static int mmc_set_capacity(struct mmc *mmc, int part_num)
601{
602 switch (part_num) {
603 case 0:
604 mmc->capacity = mmc->capacity_user;
605 break;
606 case 1:
607 case 2:
608 mmc->capacity = mmc->capacity_boot;
609 break;
610 case 3:
611 mmc->capacity = mmc->capacity_rpmb;
612 break;
613 case 4:
614 case 5:
615 case 6:
616 case 7:
617 mmc->capacity = mmc->capacity_gp[part_num - 4];
618 break;
619 default:
620 return -1;
621 }
622
Simon Glassc40fdca2016-05-01 13:52:35 -0600623 mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Stephen Warrenf866a462013-06-11 15:14:01 -0600624
625 return 0;
626}
627
Simon Glass7dba0b92016-06-12 23:30:15 -0600628int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
Lei Wenbc897b12011-05-02 16:26:26 +0000629{
Stephen Warrenf866a462013-06-11 15:14:01 -0600630 int ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000631
Stephen Warrenf866a462013-06-11 15:14:01 -0600632 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
633 (mmc->part_config & ~PART_ACCESS_MASK)
634 | (part_num & PART_ACCESS_MASK));
Stephen Warrenf866a462013-06-11 15:14:01 -0600635
Peter Bigot6dc93e72014-09-02 18:31:23 -0500636 /*
637 * Set the capacity if the switch succeeded or was intended
638 * to return to representing the raw device.
639 */
Stephen Warren873cc1d2015-12-07 11:38:49 -0700640 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
Peter Bigot6dc93e72014-09-02 18:31:23 -0500641 ret = mmc_set_capacity(mmc, part_num);
Simon Glassfdbb1392016-05-01 13:52:37 -0600642 mmc_get_blk_desc(mmc)->hwpart = part_num;
Stephen Warren873cc1d2015-12-07 11:38:49 -0700643 }
Peter Bigot6dc93e72014-09-02 18:31:23 -0500644
645 return ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000646}
647
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100648int mmc_hwpart_config(struct mmc *mmc,
649 const struct mmc_hwpart_conf *conf,
650 enum mmc_hwpart_conf_mode mode)
651{
652 u8 part_attrs = 0;
653 u32 enh_size_mult;
654 u32 enh_start_addr;
655 u32 gp_size_mult[4];
656 u32 max_enh_size_mult;
657 u32 tot_enh_size_mult = 0;
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100658 u8 wr_rel_set;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100659 int i, pidx, err;
660 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
661
662 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
663 return -EINVAL;
664
665 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
666 printf("eMMC >= 4.4 required for enhanced user data area\n");
667 return -EMEDIUMTYPE;
668 }
669
670 if (!(mmc->part_support & PART_SUPPORT)) {
671 printf("Card does not support partitioning\n");
672 return -EMEDIUMTYPE;
673 }
674
675 if (!mmc->hc_wp_grp_size) {
676 printf("Card does not define HC WP group size\n");
677 return -EMEDIUMTYPE;
678 }
679
680 /* check partition alignment and total enhanced size */
681 if (conf->user.enh_size) {
682 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
683 conf->user.enh_start % mmc->hc_wp_grp_size) {
684 printf("User data enhanced area not HC WP group "
685 "size aligned\n");
686 return -EINVAL;
687 }
688 part_attrs |= EXT_CSD_ENH_USR;
689 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
690 if (mmc->high_capacity) {
691 enh_start_addr = conf->user.enh_start;
692 } else {
693 enh_start_addr = (conf->user.enh_start << 9);
694 }
695 } else {
696 enh_size_mult = 0;
697 enh_start_addr = 0;
698 }
699 tot_enh_size_mult += enh_size_mult;
700
701 for (pidx = 0; pidx < 4; pidx++) {
702 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
703 printf("GP%i partition not HC WP group size "
704 "aligned\n", pidx+1);
705 return -EINVAL;
706 }
707 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
708 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
709 part_attrs |= EXT_CSD_ENH_GP(pidx);
710 tot_enh_size_mult += gp_size_mult[pidx];
711 }
712 }
713
714 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
715 printf("Card does not support enhanced attribute\n");
716 return -EMEDIUMTYPE;
717 }
718
719 err = mmc_send_ext_csd(mmc, ext_csd);
720 if (err)
721 return err;
722
723 max_enh_size_mult =
724 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
725 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
726 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
727 if (tot_enh_size_mult > max_enh_size_mult) {
728 printf("Total enhanced size exceeds maximum (%u > %u)\n",
729 tot_enh_size_mult, max_enh_size_mult);
730 return -EMEDIUMTYPE;
731 }
732
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100733 /* The default value of EXT_CSD_WR_REL_SET is device
734 * dependent, the values can only be changed if the
735 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
736 * changed only once and before partitioning is completed. */
737 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
738 if (conf->user.wr_rel_change) {
739 if (conf->user.wr_rel_set)
740 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
741 else
742 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
743 }
744 for (pidx = 0; pidx < 4; pidx++) {
745 if (conf->gp_part[pidx].wr_rel_change) {
746 if (conf->gp_part[pidx].wr_rel_set)
747 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
748 else
749 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
750 }
751 }
752
753 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
754 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
755 puts("Card does not support host controlled partition write "
756 "reliability settings\n");
757 return -EMEDIUMTYPE;
758 }
759
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100760 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
761 EXT_CSD_PARTITION_SETTING_COMPLETED) {
762 printf("Card already partitioned\n");
763 return -EPERM;
764 }
765
766 if (mode == MMC_HWPART_CONF_CHECK)
767 return 0;
768
769 /* Partitioning requires high-capacity size definitions */
770 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
771 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
772 EXT_CSD_ERASE_GROUP_DEF, 1);
773
774 if (err)
775 return err;
776
777 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
778
779 /* update erase group size to be high-capacity */
780 mmc->erase_grp_size =
781 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
782
783 }
784
785 /* all OK, write the configuration */
786 for (i = 0; i < 4; i++) {
787 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
788 EXT_CSD_ENH_START_ADDR+i,
789 (enh_start_addr >> (i*8)) & 0xFF);
790 if (err)
791 return err;
792 }
793 for (i = 0; i < 3; i++) {
794 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
795 EXT_CSD_ENH_SIZE_MULT+i,
796 (enh_size_mult >> (i*8)) & 0xFF);
797 if (err)
798 return err;
799 }
800 for (pidx = 0; pidx < 4; pidx++) {
801 for (i = 0; i < 3; i++) {
802 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
803 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
804 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
805 if (err)
806 return err;
807 }
808 }
809 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
810 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
811 if (err)
812 return err;
813
814 if (mode == MMC_HWPART_CONF_SET)
815 return 0;
816
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100817 /* The WR_REL_SET is a write-once register but shall be
818 * written before setting PART_SETTING_COMPLETED. As it is
819 * write-once we can only write it when completing the
820 * partitioning. */
821 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
822 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
823 EXT_CSD_WR_REL_SET, wr_rel_set);
824 if (err)
825 return err;
826 }
827
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100828 /* Setting PART_SETTING_COMPLETED confirms the partition
829 * configuration but it only becomes effective after power
830 * cycle, so we do not adjust the partition related settings
831 * in the mmc struct. */
832
833 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
834 EXT_CSD_PARTITION_SETTING,
835 EXT_CSD_PARTITION_SETTING_COMPLETED);
836 if (err)
837 return err;
838
839 return 0;
840}
841
Simon Glass8ca51e52016-06-12 23:30:22 -0600842#ifndef CONFIG_DM_MMC_OPS
Thierry Reding48972d92012-01-02 01:15:37 +0000843int mmc_getcd(struct mmc *mmc)
844{
845 int cd;
846
847 cd = board_mmc_getcd(mmc);
848
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000849 if (cd < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200850 if (mmc->cfg->ops->getcd)
851 cd = mmc->cfg->ops->getcd(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000852 else
853 cd = 1;
854 }
Thierry Reding48972d92012-01-02 01:15:37 +0000855
856 return cd;
857}
Simon Glass8ca51e52016-06-12 23:30:22 -0600858#endif
Thierry Reding48972d92012-01-02 01:15:37 +0000859
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000860static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
Andy Fleming272cc702008-10-30 16:41:01 -0500861{
862 struct mmc_cmd cmd;
863 struct mmc_data data;
864
865 /* Switch the frequency */
866 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
867 cmd.resp_type = MMC_RSP_R1;
868 cmd.cmdarg = (mode << 31) | 0xffffff;
869 cmd.cmdarg &= ~(0xf << (group * 4));
870 cmd.cmdarg |= value << (group * 4);
Andy Fleming272cc702008-10-30 16:41:01 -0500871
872 data.dest = (char *)resp;
873 data.blocksize = 64;
874 data.blocks = 1;
875 data.flags = MMC_DATA_READ;
876
877 return mmc_send_cmd(mmc, &cmd, &data);
878}
879
880
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000881static int sd_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500882{
883 int err;
884 struct mmc_cmd cmd;
Anton staaff781dd32011-10-03 13:54:59 +0000885 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
886 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
Andy Fleming272cc702008-10-30 16:41:01 -0500887 struct mmc_data data;
888 int timeout;
889
890 mmc->card_caps = 0;
891
Thomas Choud52ebf12010-12-24 13:12:21 +0000892 if (mmc_host_is_spi(mmc))
893 return 0;
894
Andy Fleming272cc702008-10-30 16:41:01 -0500895 /* Read the SCR to find out if this card supports higher speeds */
896 cmd.cmdidx = MMC_CMD_APP_CMD;
897 cmd.resp_type = MMC_RSP_R1;
898 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -0500899
900 err = mmc_send_cmd(mmc, &cmd, NULL);
901
902 if (err)
903 return err;
904
905 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
906 cmd.resp_type = MMC_RSP_R1;
907 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500908
909 timeout = 3;
910
911retry_scr:
Anton staaff781dd32011-10-03 13:54:59 +0000912 data.dest = (char *)scr;
Andy Fleming272cc702008-10-30 16:41:01 -0500913 data.blocksize = 8;
914 data.blocks = 1;
915 data.flags = MMC_DATA_READ;
916
917 err = mmc_send_cmd(mmc, &cmd, &data);
918
919 if (err) {
920 if (timeout--)
921 goto retry_scr;
922
923 return err;
924 }
925
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300926 mmc->scr[0] = __be32_to_cpu(scr[0]);
927 mmc->scr[1] = __be32_to_cpu(scr[1]);
Andy Fleming272cc702008-10-30 16:41:01 -0500928
929 switch ((mmc->scr[0] >> 24) & 0xf) {
Bin Meng53e8e402016-03-17 21:53:13 -0700930 case 0:
931 mmc->version = SD_VERSION_1_0;
932 break;
933 case 1:
934 mmc->version = SD_VERSION_1_10;
935 break;
936 case 2:
937 mmc->version = SD_VERSION_2;
938 if ((mmc->scr[0] >> 15) & 0x1)
939 mmc->version = SD_VERSION_3;
940 break;
941 default:
942 mmc->version = SD_VERSION_1_0;
943 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500944 }
945
Alagu Sankarb44c7082010-05-12 15:08:24 +0530946 if (mmc->scr[0] & SD_DATA_4BIT)
947 mmc->card_caps |= MMC_MODE_4BIT;
948
Andy Fleming272cc702008-10-30 16:41:01 -0500949 /* Version 1.0 doesn't support switching */
950 if (mmc->version == SD_VERSION_1_0)
951 return 0;
952
953 timeout = 4;
954 while (timeout--) {
955 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
Anton staaff781dd32011-10-03 13:54:59 +0000956 (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500957
958 if (err)
959 return err;
960
961 /* The high-speed function is busy. Try again */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300962 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
Andy Fleming272cc702008-10-30 16:41:01 -0500963 break;
964 }
965
Andy Fleming272cc702008-10-30 16:41:01 -0500966 /* If high-speed isn't supported, we return */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300967 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
Andy Fleming272cc702008-10-30 16:41:01 -0500968 return 0;
969
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000970 /*
971 * If the host doesn't support SD_HIGHSPEED, do not switch card to
972 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
973 * This can avoid furthur problem when the card runs in different
974 * mode between the host.
975 */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200976 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
977 (mmc->cfg->host_caps & MMC_MODE_HS)))
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000978 return 0;
979
Anton staaff781dd32011-10-03 13:54:59 +0000980 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500981
982 if (err)
983 return err;
984
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300985 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
Andy Fleming272cc702008-10-30 16:41:01 -0500986 mmc->card_caps |= MMC_MODE_HS;
987
988 return 0;
989}
990
Peng Fan3697e592016-09-01 11:13:38 +0800991static int sd_read_ssr(struct mmc *mmc)
992{
993 int err, i;
994 struct mmc_cmd cmd;
995 ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
996 struct mmc_data data;
997 int timeout = 3;
998 unsigned int au, eo, et, es;
999
1000 cmd.cmdidx = MMC_CMD_APP_CMD;
1001 cmd.resp_type = MMC_RSP_R1;
1002 cmd.cmdarg = mmc->rca << 16;
1003
1004 err = mmc_send_cmd(mmc, &cmd, NULL);
1005 if (err)
1006 return err;
1007
1008 cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1009 cmd.resp_type = MMC_RSP_R1;
1010 cmd.cmdarg = 0;
1011
1012retry_ssr:
1013 data.dest = (char *)ssr;
1014 data.blocksize = 64;
1015 data.blocks = 1;
1016 data.flags = MMC_DATA_READ;
1017
1018 err = mmc_send_cmd(mmc, &cmd, &data);
1019 if (err) {
1020 if (timeout--)
1021 goto retry_ssr;
1022
1023 return err;
1024 }
1025
1026 for (i = 0; i < 16; i++)
1027 ssr[i] = be32_to_cpu(ssr[i]);
1028
1029 au = (ssr[2] >> 12) & 0xF;
1030 if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1031 mmc->ssr.au = sd_au_size[au];
1032 es = (ssr[3] >> 24) & 0xFF;
1033 es |= (ssr[2] & 0xFF) << 8;
1034 et = (ssr[3] >> 18) & 0x3F;
1035 if (es && et) {
1036 eo = (ssr[3] >> 16) & 0x3;
1037 mmc->ssr.erase_timeout = (et * 1000) / es;
1038 mmc->ssr.erase_offset = eo * 1000;
1039 }
1040 } else {
1041 debug("Invalid Allocation Unit Size.\n");
1042 }
1043
1044 return 0;
1045}
1046
Andy Fleming272cc702008-10-30 16:41:01 -05001047/* frequency bases */
1048/* divided by 10 to be nice to platforms without floating point */
Mike Frysinger5f837c22010-10-20 01:15:53 +00001049static const int fbase[] = {
Andy Fleming272cc702008-10-30 16:41:01 -05001050 10000,
1051 100000,
1052 1000000,
1053 10000000,
1054};
1055
1056/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
1057 * to platforms without floating point.
1058 */
Simon Glass61fe0762016-05-14 14:02:57 -06001059static const u8 multipliers[] = {
Andy Fleming272cc702008-10-30 16:41:01 -05001060 0, /* reserved */
1061 10,
1062 12,
1063 13,
1064 15,
1065 20,
1066 25,
1067 30,
1068 35,
1069 40,
1070 45,
1071 50,
1072 55,
1073 60,
1074 70,
1075 80,
1076};
1077
Simon Glass8ca51e52016-06-12 23:30:22 -06001078#ifndef CONFIG_DM_MMC_OPS
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001079static void mmc_set_ios(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001080{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001081 if (mmc->cfg->ops->set_ios)
1082 mmc->cfg->ops->set_ios(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001083}
Simon Glass8ca51e52016-06-12 23:30:22 -06001084#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001085
1086void mmc_set_clock(struct mmc *mmc, uint clock)
1087{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001088 if (clock > mmc->cfg->f_max)
1089 clock = mmc->cfg->f_max;
Andy Fleming272cc702008-10-30 16:41:01 -05001090
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001091 if (clock < mmc->cfg->f_min)
1092 clock = mmc->cfg->f_min;
Andy Fleming272cc702008-10-30 16:41:01 -05001093
1094 mmc->clock = clock;
1095
1096 mmc_set_ios(mmc);
1097}
1098
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001099static void mmc_set_bus_width(struct mmc *mmc, uint width)
Andy Fleming272cc702008-10-30 16:41:01 -05001100{
1101 mmc->bus_width = width;
1102
1103 mmc_set_ios(mmc);
1104}
1105
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001106static int mmc_startup(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001107{
Stephen Warrenf866a462013-06-11 15:14:01 -06001108 int err, i;
Andy Fleming272cc702008-10-30 16:41:01 -05001109 uint mult, freq;
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001110 u64 cmult, csize, capacity;
Andy Fleming272cc702008-10-30 16:41:01 -05001111 struct mmc_cmd cmd;
Simon Glass8bfa1952013-04-03 08:54:30 +00001112 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1113 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001114 bool has_parts = false;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001115 bool part_completed;
Simon Glassc40fdca2016-05-01 13:52:35 -06001116 struct blk_desc *bdesc;
Andy Fleming272cc702008-10-30 16:41:01 -05001117
Thomas Choud52ebf12010-12-24 13:12:21 +00001118#ifdef CONFIG_MMC_SPI_CRC_ON
1119 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1120 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1121 cmd.resp_type = MMC_RSP_R1;
1122 cmd.cmdarg = 1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001123 err = mmc_send_cmd(mmc, &cmd, NULL);
1124
1125 if (err)
1126 return err;
1127 }
1128#endif
1129
Andy Fleming272cc702008-10-30 16:41:01 -05001130 /* Put the Card in Identify Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001131 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1132 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
Andy Fleming272cc702008-10-30 16:41:01 -05001133 cmd.resp_type = MMC_RSP_R2;
1134 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001135
1136 err = mmc_send_cmd(mmc, &cmd, NULL);
1137
1138 if (err)
1139 return err;
1140
1141 memcpy(mmc->cid, cmd.response, 16);
1142
1143 /*
1144 * For MMC cards, set the Relative Address.
1145 * For SD cards, get the Relatvie Address.
1146 * This also puts the cards into Standby State
1147 */
Thomas Choud52ebf12010-12-24 13:12:21 +00001148 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1149 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1150 cmd.cmdarg = mmc->rca << 16;
1151 cmd.resp_type = MMC_RSP_R6;
Andy Fleming272cc702008-10-30 16:41:01 -05001152
Thomas Choud52ebf12010-12-24 13:12:21 +00001153 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001154
Thomas Choud52ebf12010-12-24 13:12:21 +00001155 if (err)
1156 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001157
Thomas Choud52ebf12010-12-24 13:12:21 +00001158 if (IS_SD(mmc))
1159 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1160 }
Andy Fleming272cc702008-10-30 16:41:01 -05001161
1162 /* Get the Card-Specific Data */
1163 cmd.cmdidx = MMC_CMD_SEND_CSD;
1164 cmd.resp_type = MMC_RSP_R2;
1165 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001166
1167 err = mmc_send_cmd(mmc, &cmd, NULL);
1168
1169 if (err)
1170 return err;
1171
Rabin Vincent998be3d2009-04-05 13:30:56 +05301172 mmc->csd[0] = cmd.response[0];
1173 mmc->csd[1] = cmd.response[1];
1174 mmc->csd[2] = cmd.response[2];
1175 mmc->csd[3] = cmd.response[3];
Andy Fleming272cc702008-10-30 16:41:01 -05001176
1177 if (mmc->version == MMC_VERSION_UNKNOWN) {
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301178 int version = (cmd.response[0] >> 26) & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -05001179
1180 switch (version) {
Bin Meng53e8e402016-03-17 21:53:13 -07001181 case 0:
1182 mmc->version = MMC_VERSION_1_2;
1183 break;
1184 case 1:
1185 mmc->version = MMC_VERSION_1_4;
1186 break;
1187 case 2:
1188 mmc->version = MMC_VERSION_2_2;
1189 break;
1190 case 3:
1191 mmc->version = MMC_VERSION_3;
1192 break;
1193 case 4:
1194 mmc->version = MMC_VERSION_4;
1195 break;
1196 default:
1197 mmc->version = MMC_VERSION_1_2;
1198 break;
Andy Fleming272cc702008-10-30 16:41:01 -05001199 }
1200 }
1201
1202 /* divide frequency by 10, since the mults are 10x bigger */
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301203 freq = fbase[(cmd.response[0] & 0x7)];
1204 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
Andy Fleming272cc702008-10-30 16:41:01 -05001205
1206 mmc->tran_speed = freq * mult;
1207
Markus Niebelab711882013-12-16 13:40:46 +01001208 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
Rabin Vincent998be3d2009-04-05 13:30:56 +05301209 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001210
1211 if (IS_SD(mmc))
1212 mmc->write_bl_len = mmc->read_bl_len;
1213 else
Rabin Vincent998be3d2009-04-05 13:30:56 +05301214 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001215
1216 if (mmc->high_capacity) {
1217 csize = (mmc->csd[1] & 0x3f) << 16
1218 | (mmc->csd[2] & 0xffff0000) >> 16;
1219 cmult = 8;
1220 } else {
1221 csize = (mmc->csd[1] & 0x3ff) << 2
1222 | (mmc->csd[2] & 0xc0000000) >> 30;
1223 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1224 }
1225
Stephen Warrenf866a462013-06-11 15:14:01 -06001226 mmc->capacity_user = (csize + 1) << (cmult + 2);
1227 mmc->capacity_user *= mmc->read_bl_len;
1228 mmc->capacity_boot = 0;
1229 mmc->capacity_rpmb = 0;
1230 for (i = 0; i < 4; i++)
1231 mmc->capacity_gp[i] = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001232
Simon Glass8bfa1952013-04-03 08:54:30 +00001233 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1234 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001235
Simon Glass8bfa1952013-04-03 08:54:30 +00001236 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1237 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001238
Markus Niebelab711882013-12-16 13:40:46 +01001239 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1240 cmd.cmdidx = MMC_CMD_SET_DSR;
1241 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1242 cmd.resp_type = MMC_RSP_NONE;
1243 if (mmc_send_cmd(mmc, &cmd, NULL))
1244 printf("MMC: SET_DSR failed\n");
1245 }
1246
Andy Fleming272cc702008-10-30 16:41:01 -05001247 /* Select the card, and put it into Transfer Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001248 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1249 cmd.cmdidx = MMC_CMD_SELECT_CARD;
Ajay Bhargavfe8f7062011-10-05 03:13:23 +00001250 cmd.resp_type = MMC_RSP_R1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001251 cmd.cmdarg = mmc->rca << 16;
Thomas Choud52ebf12010-12-24 13:12:21 +00001252 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001253
Thomas Choud52ebf12010-12-24 13:12:21 +00001254 if (err)
1255 return err;
1256 }
Andy Fleming272cc702008-10-30 16:41:01 -05001257
Lei Wene6f99a52011-06-22 17:03:31 +00001258 /*
1259 * For SD, its erase group is always one sector
1260 */
1261 mmc->erase_grp_size = 1;
Lei Wenbc897b12011-05-02 16:26:26 +00001262 mmc->part_config = MMCPART_NOAVAILABLE;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301263 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1264 /* check ext_csd version and capacity */
1265 err = mmc_send_ext_csd(mmc, ext_csd);
Diego Santa Cruz9cf199e2014-12-23 10:50:28 +01001266 if (err)
1267 return err;
1268 if (ext_csd[EXT_CSD_REV] >= 2) {
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001269 /*
1270 * According to the JEDEC Standard, the value of
1271 * ext_csd's capacity is valid if the value is more
1272 * than 2GB
1273 */
Lei Wen0560db12011-10-03 20:35:10 +00001274 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1275 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1276 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1277 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
Simon Glass8bfa1952013-04-03 08:54:30 +00001278 capacity *= MMC_MAX_BLOCK_LEN;
Łukasz Majewskib1f1e8212011-07-05 02:19:44 +00001279 if ((capacity >> 20) > 2 * 1024)
Stephen Warrenf866a462013-06-11 15:14:01 -06001280 mmc->capacity_user = capacity;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301281 }
Lei Wenbc897b12011-05-02 16:26:26 +00001282
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001283 switch (ext_csd[EXT_CSD_REV]) {
1284 case 1:
1285 mmc->version = MMC_VERSION_4_1;
1286 break;
1287 case 2:
1288 mmc->version = MMC_VERSION_4_2;
1289 break;
1290 case 3:
1291 mmc->version = MMC_VERSION_4_3;
1292 break;
1293 case 5:
1294 mmc->version = MMC_VERSION_4_41;
1295 break;
1296 case 6:
1297 mmc->version = MMC_VERSION_4_5;
1298 break;
Markus Niebeledab7232014-11-18 15:13:53 +01001299 case 7:
1300 mmc->version = MMC_VERSION_5_0;
1301 break;
Stefan Wahren1a3619c2016-06-16 17:54:06 +00001302 case 8:
1303 mmc->version = MMC_VERSION_5_1;
1304 break;
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001305 }
1306
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001307 /* The partition data may be non-zero but it is only
1308 * effective if PARTITION_SETTING_COMPLETED is set in
1309 * EXT_CSD, so ignore any data if this bit is not set,
1310 * except for enabling the high-capacity group size
1311 * definition (see below). */
1312 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1313 EXT_CSD_PARTITION_SETTING_COMPLETED);
1314
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001315 /* store the partition info of emmc */
1316 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1317 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1318 ext_csd[EXT_CSD_BOOT_MULT])
1319 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001320 if (part_completed &&
1321 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001322 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1323
1324 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1325
1326 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1327
1328 for (i = 0; i < 4; i++) {
1329 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001330 uint mult = (ext_csd[idx + 2] << 16) +
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001331 (ext_csd[idx + 1] << 8) + ext_csd[idx];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001332 if (mult)
1333 has_parts = true;
1334 if (!part_completed)
1335 continue;
1336 mmc->capacity_gp[i] = mult;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001337 mmc->capacity_gp[i] *=
1338 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1339 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruzf8e89d62014-12-23 10:50:21 +01001340 mmc->capacity_gp[i] <<= 19;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001341 }
1342
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001343 if (part_completed) {
1344 mmc->enh_user_size =
1345 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1346 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1347 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1348 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1349 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1350 mmc->enh_user_size <<= 19;
1351 mmc->enh_user_start =
1352 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1353 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1354 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1355 ext_csd[EXT_CSD_ENH_START_ADDR];
1356 if (mmc->high_capacity)
1357 mmc->enh_user_start <<= 9;
1358 }
Diego Santa Cruza7f852b2014-12-23 10:50:22 +01001359
Lei Wene6f99a52011-06-22 17:03:31 +00001360 /*
Oliver Metz1937e5a2013-10-01 20:32:07 +02001361 * Host needs to enable ERASE_GRP_DEF bit if device is
1362 * partitioned. This bit will be lost every time after a reset
1363 * or power off. This will affect erase size.
Lei Wene6f99a52011-06-22 17:03:31 +00001364 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001365 if (part_completed)
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001366 has_parts = true;
Oliver Metz1937e5a2013-10-01 20:32:07 +02001367 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001368 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1369 has_parts = true;
1370 if (has_parts) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001371 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1372 EXT_CSD_ERASE_GROUP_DEF, 1);
1373
1374 if (err)
1375 return err;
Hannes Petermaier021a8052014-08-08 09:47:22 +02001376 else
1377 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001378 }
Oliver Metz1937e5a2013-10-01 20:32:07 +02001379
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001380 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001381 /* Read out group size from ext_csd */
Lei Wen0560db12011-10-03 20:35:10 +00001382 mmc->erase_grp_size =
Diego Santa Cruza4ff9f82014-12-23 10:50:24 +01001383 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
Markus Niebeld7b29122014-11-18 15:11:42 +01001384 /*
1385 * if high capacity and partition setting completed
1386 * SEC_COUNT is valid even if it is smaller than 2 GiB
1387 * JEDEC Standard JESD84-B45, 6.2.4
1388 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001389 if (mmc->high_capacity && part_completed) {
Markus Niebeld7b29122014-11-18 15:11:42 +01001390 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1391 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1392 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1393 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1394 capacity *= MMC_MAX_BLOCK_LEN;
1395 mmc->capacity_user = capacity;
1396 }
Simon Glass8bfa1952013-04-03 08:54:30 +00001397 } else {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001398 /* Calculate the group size from the csd value. */
Lei Wene6f99a52011-06-22 17:03:31 +00001399 int erase_gsz, erase_gmul;
1400 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1401 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1402 mmc->erase_grp_size = (erase_gsz + 1)
1403 * (erase_gmul + 1);
1404 }
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001405
1406 mmc->hc_wp_grp_size = 1024
1407 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1408 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruz9e41a002014-12-23 10:50:33 +01001409
1410 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301411 }
1412
Simon Glassc40fdca2016-05-01 13:52:35 -06001413 err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
Stephen Warrenf866a462013-06-11 15:14:01 -06001414 if (err)
1415 return err;
1416
Andy Fleming272cc702008-10-30 16:41:01 -05001417 if (IS_SD(mmc))
1418 err = sd_change_freq(mmc);
1419 else
1420 err = mmc_change_freq(mmc);
1421
1422 if (err)
1423 return err;
1424
1425 /* Restrict card's capabilities by what the host can do */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001426 mmc->card_caps &= mmc->cfg->host_caps;
Andy Fleming272cc702008-10-30 16:41:01 -05001427
1428 if (IS_SD(mmc)) {
1429 if (mmc->card_caps & MMC_MODE_4BIT) {
1430 cmd.cmdidx = MMC_CMD_APP_CMD;
1431 cmd.resp_type = MMC_RSP_R1;
1432 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001433
1434 err = mmc_send_cmd(mmc, &cmd, NULL);
1435 if (err)
1436 return err;
1437
1438 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1439 cmd.resp_type = MMC_RSP_R1;
1440 cmd.cmdarg = 2;
Andy Fleming272cc702008-10-30 16:41:01 -05001441 err = mmc_send_cmd(mmc, &cmd, NULL);
1442 if (err)
1443 return err;
1444
1445 mmc_set_bus_width(mmc, 4);
1446 }
1447
Peng Fan3697e592016-09-01 11:13:38 +08001448 err = sd_read_ssr(mmc);
1449 if (err)
1450 return err;
1451
Andy Fleming272cc702008-10-30 16:41:01 -05001452 if (mmc->card_caps & MMC_MODE_HS)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001453 mmc->tran_speed = 50000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001454 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001455 mmc->tran_speed = 25000000;
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -06001456 } else if (mmc->version >= MMC_VERSION_4) {
1457 /* Only version 4 of MMC supports wider bus widths */
Andy Fleming7798f6d2012-10-31 19:02:38 +00001458 int idx;
1459
1460 /* An array of possible bus widths in order of preference */
1461 static unsigned ext_csd_bits[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001462 EXT_CSD_DDR_BUS_WIDTH_8,
1463 EXT_CSD_DDR_BUS_WIDTH_4,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001464 EXT_CSD_BUS_WIDTH_8,
1465 EXT_CSD_BUS_WIDTH_4,
1466 EXT_CSD_BUS_WIDTH_1,
1467 };
1468
1469 /* An array to map CSD bus widths to host cap bits */
1470 static unsigned ext_to_hostcaps[] = {
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001471 [EXT_CSD_DDR_BUS_WIDTH_4] =
1472 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1473 [EXT_CSD_DDR_BUS_WIDTH_8] =
1474 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001475 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1476 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1477 };
1478
1479 /* An array to map chosen bus width to an integer */
1480 static unsigned widths[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001481 8, 4, 8, 4, 1,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001482 };
1483
1484 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1485 unsigned int extw = ext_csd_bits[idx];
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001486 unsigned int caps = ext_to_hostcaps[extw];
Andy Fleming7798f6d2012-10-31 19:02:38 +00001487
1488 /*
Andrew Gabbasovbf477072014-12-25 10:22:24 -06001489 * If the bus width is still not changed,
1490 * don't try to set the default again.
1491 * Otherwise, recover from switch attempts
1492 * by switching to 1-bit bus width.
1493 */
1494 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1495 mmc->bus_width == 1) {
1496 err = 0;
1497 break;
1498 }
1499
1500 /*
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001501 * Check to make sure the card and controller support
1502 * these capabilities
Andy Fleming7798f6d2012-10-31 19:02:38 +00001503 */
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001504 if ((mmc->card_caps & caps) != caps)
Andy Fleming7798f6d2012-10-31 19:02:38 +00001505 continue;
1506
Andy Fleming272cc702008-10-30 16:41:01 -05001507 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001508 EXT_CSD_BUS_WIDTH, extw);
Andy Fleming272cc702008-10-30 16:41:01 -05001509
1510 if (err)
Lei Wen41378942011-10-03 20:35:11 +00001511 continue;
Andy Fleming272cc702008-10-30 16:41:01 -05001512
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001513 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
Andy Fleming7798f6d2012-10-31 19:02:38 +00001514 mmc_set_bus_width(mmc, widths[idx]);
Andy Fleming272cc702008-10-30 16:41:01 -05001515
Lei Wen41378942011-10-03 20:35:11 +00001516 err = mmc_send_ext_csd(mmc, test_csd);
Andy Fleming272cc702008-10-30 16:41:01 -05001517
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001518 if (err)
1519 continue;
1520
1521 /* Only compare read only fields */
1522 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1523 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1524 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1525 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1526 ext_csd[EXT_CSD_REV]
1527 == test_csd[EXT_CSD_REV] &&
1528 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1529 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1530 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1531 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
Lei Wen41378942011-10-03 20:35:11 +00001532 break;
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001533 else
Jaehoon Chung915ffa52016-07-19 16:33:36 +09001534 err = -EBADMSG;
Andy Fleming272cc702008-10-30 16:41:01 -05001535 }
1536
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001537 if (err)
1538 return err;
1539
Andy Fleming272cc702008-10-30 16:41:01 -05001540 if (mmc->card_caps & MMC_MODE_HS) {
1541 if (mmc->card_caps & MMC_MODE_HS_52MHz)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001542 mmc->tran_speed = 52000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001543 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001544 mmc->tran_speed = 26000000;
1545 }
Andy Fleming272cc702008-10-30 16:41:01 -05001546 }
1547
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001548 mmc_set_clock(mmc, mmc->tran_speed);
1549
Andrew Gabbasov5af8f452014-12-01 06:59:11 -06001550 /* Fix the block length for DDR mode */
1551 if (mmc->ddr_mode) {
1552 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1553 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1554 }
1555
Andy Fleming272cc702008-10-30 16:41:01 -05001556 /* fill in device description */
Simon Glassc40fdca2016-05-01 13:52:35 -06001557 bdesc = mmc_get_blk_desc(mmc);
1558 bdesc->lun = 0;
1559 bdesc->hwpart = 0;
1560 bdesc->type = 0;
1561 bdesc->blksz = mmc->read_bl_len;
1562 bdesc->log2blksz = LOG2(bdesc->blksz);
1563 bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Sjoerd Simonsfc011f62015-12-04 23:27:40 +01001564#if !defined(CONFIG_SPL_BUILD) || \
1565 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1566 !defined(CONFIG_USE_TINY_PRINTF))
Simon Glassc40fdca2016-05-01 13:52:35 -06001567 sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
Taylor Huttbabce5f2012-10-20 17:15:59 +00001568 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1569 (mmc->cid[3] >> 16) & 0xffff);
Simon Glassc40fdca2016-05-01 13:52:35 -06001570 sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
Taylor Huttbabce5f2012-10-20 17:15:59 +00001571 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1572 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1573 (mmc->cid[2] >> 24) & 0xff);
Simon Glassc40fdca2016-05-01 13:52:35 -06001574 sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
Taylor Huttbabce5f2012-10-20 17:15:59 +00001575 (mmc->cid[2] >> 16) & 0xf);
Paul Burton56196822013-09-04 16:12:25 +01001576#else
Simon Glassc40fdca2016-05-01 13:52:35 -06001577 bdesc->vendor[0] = 0;
1578 bdesc->product[0] = 0;
1579 bdesc->revision[0] = 0;
Paul Burton56196822013-09-04 16:12:25 +01001580#endif
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001581#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
Simon Glassc40fdca2016-05-01 13:52:35 -06001582 part_init(bdesc);
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001583#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001584
1585 return 0;
1586}
1587
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001588static int mmc_send_if_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001589{
1590 struct mmc_cmd cmd;
1591 int err;
1592
1593 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1594 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001595 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
Andy Fleming272cc702008-10-30 16:41:01 -05001596 cmd.resp_type = MMC_RSP_R7;
Andy Fleming272cc702008-10-30 16:41:01 -05001597
1598 err = mmc_send_cmd(mmc, &cmd, NULL);
1599
1600 if (err)
1601 return err;
1602
Rabin Vincent998be3d2009-04-05 13:30:56 +05301603 if ((cmd.response[0] & 0xff) != 0xaa)
Jaehoon Chung915ffa52016-07-19 16:33:36 +09001604 return -EOPNOTSUPP;
Andy Fleming272cc702008-10-30 16:41:01 -05001605 else
1606 mmc->version = SD_VERSION_2;
1607
1608 return 0;
1609}
1610
Simon Glass05cbeb72017-04-22 19:10:56 -06001611#ifndef CONFIG_DM_MMC
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001612/* board-specific MMC power initializations. */
1613__weak void board_mmc_power_init(void)
1614{
1615}
Simon Glass05cbeb72017-04-22 19:10:56 -06001616#endif
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001617
Peng Fan2051aef2016-10-11 15:08:43 +08001618static int mmc_power_init(struct mmc *mmc)
1619{
Simon Glass05cbeb72017-04-22 19:10:56 -06001620#if defined(CONFIG_DM_MMC)
1621#if defined(CONFIG_DM_REGULATOR) && !defined(CONFIG_SPL_BUILD)
Peng Fan2051aef2016-10-11 15:08:43 +08001622 struct udevice *vmmc_supply;
1623 int ret;
1624
1625 ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
1626 &vmmc_supply);
1627 if (ret) {
Jaehoon Chung288db7c2016-10-24 15:22:22 +09001628 debug("%s: No vmmc supply\n", mmc->dev->name);
Peng Fan2051aef2016-10-11 15:08:43 +08001629 return 0;
1630 }
1631
1632 ret = regulator_set_enable(vmmc_supply, true);
1633 if (ret) {
1634 puts("Error enabling VMMC supply\n");
1635 return ret;
1636 }
1637#endif
Simon Glass05cbeb72017-04-22 19:10:56 -06001638#else /* !CONFIG_DM_MMC */
1639 /*
1640 * Driver model should use a regulator, as above, rather than calling
1641 * out to board code.
1642 */
1643 board_mmc_power_init();
1644#endif
Peng Fan2051aef2016-10-11 15:08:43 +08001645 return 0;
1646}
1647
Che-Liang Chioue9550442012-11-28 15:21:13 +00001648int mmc_start_init(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001649{
Simon Glass8ca51e52016-06-12 23:30:22 -06001650 bool no_card;
Macpaul Linafd59322011-11-14 23:35:39 +00001651 int err;
Andy Fleming272cc702008-10-30 16:41:01 -05001652
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001653 /* we pretend there's no card when init is NULL */
Simon Glass8ca51e52016-06-12 23:30:22 -06001654 no_card = mmc_getcd(mmc) == 0;
1655#ifndef CONFIG_DM_MMC_OPS
1656 no_card = no_card || (mmc->cfg->ops->init == NULL);
1657#endif
1658 if (no_card) {
Thierry Reding48972d92012-01-02 01:15:37 +00001659 mmc->has_init = 0;
Paul Burton56196822013-09-04 16:12:25 +01001660#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Thierry Reding48972d92012-01-02 01:15:37 +00001661 printf("MMC: no card present\n");
Paul Burton56196822013-09-04 16:12:25 +01001662#endif
Jaehoon Chung915ffa52016-07-19 16:33:36 +09001663 return -ENOMEDIUM;
Thierry Reding48972d92012-01-02 01:15:37 +00001664 }
1665
Lei Wenbc897b12011-05-02 16:26:26 +00001666 if (mmc->has_init)
1667 return 0;
1668
Yangbo Lu5a8dbdc2015-04-22 13:57:00 +08001669#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1670 mmc_adapter_card_type_ident();
1671#endif
Peng Fan2051aef2016-10-11 15:08:43 +08001672 err = mmc_power_init(mmc);
1673 if (err)
1674 return err;
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001675
Simon Glass8ca51e52016-06-12 23:30:22 -06001676#ifdef CONFIG_DM_MMC_OPS
1677 /* The device has already been probed ready for use */
1678#else
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001679 /* made sure it's not NULL earlier */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001680 err = mmc->cfg->ops->init(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001681 if (err)
1682 return err;
Simon Glass8ca51e52016-06-12 23:30:22 -06001683#endif
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001684 mmc->ddr_mode = 0;
Ilya Yanokb86b85e2009-06-29 17:53:16 +04001685 mmc_set_bus_width(mmc, 1);
1686 mmc_set_clock(mmc, 1);
1687
Andy Fleming272cc702008-10-30 16:41:01 -05001688 /* Reset the Card */
1689 err = mmc_go_idle(mmc);
1690
1691 if (err)
1692 return err;
1693
Lei Wenbc897b12011-05-02 16:26:26 +00001694 /* The internal partition reset to user partition(0) at every CMD0*/
Simon Glassc40fdca2016-05-01 13:52:35 -06001695 mmc_get_blk_desc(mmc)->hwpart = 0;
Lei Wenbc897b12011-05-02 16:26:26 +00001696
Andy Fleming272cc702008-10-30 16:41:01 -05001697 /* Test for SD version 2 */
Macpaul Linafd59322011-11-14 23:35:39 +00001698 err = mmc_send_if_cond(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001699
Andy Fleming272cc702008-10-30 16:41:01 -05001700 /* Now try to get the SD card's operating condition */
1701 err = sd_send_op_cond(mmc);
1702
1703 /* If the command timed out, we check for an MMC card */
Jaehoon Chung915ffa52016-07-19 16:33:36 +09001704 if (err == -ETIMEDOUT) {
Andy Fleming272cc702008-10-30 16:41:01 -05001705 err = mmc_send_op_cond(mmc);
1706
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001707 if (err) {
Paul Burton56196822013-09-04 16:12:25 +01001708#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Fleming272cc702008-10-30 16:41:01 -05001709 printf("Card did not respond to voltage select!\n");
Paul Burton56196822013-09-04 16:12:25 +01001710#endif
Jaehoon Chung915ffa52016-07-19 16:33:36 +09001711 return -EOPNOTSUPP;
Andy Fleming272cc702008-10-30 16:41:01 -05001712 }
1713 }
1714
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001715 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001716 mmc->init_in_progress = 1;
1717
1718 return err;
1719}
1720
1721static int mmc_complete_init(struct mmc *mmc)
1722{
1723 int err = 0;
1724
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001725 mmc->init_in_progress = 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001726 if (mmc->op_cond_pending)
1727 err = mmc_complete_op_cond(mmc);
1728
1729 if (!err)
1730 err = mmc_startup(mmc);
Lei Wenbc897b12011-05-02 16:26:26 +00001731 if (err)
1732 mmc->has_init = 0;
1733 else
1734 mmc->has_init = 1;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001735 return err;
1736}
1737
1738int mmc_init(struct mmc *mmc)
1739{
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001740 int err = 0;
Marek Vasutce9eca92016-12-01 02:06:32 +01001741 __maybe_unused unsigned start;
Simon Glass33fb2112016-05-01 13:52:41 -06001742#ifdef CONFIG_DM_MMC
1743 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
Che-Liang Chioue9550442012-11-28 15:21:13 +00001744
Simon Glass33fb2112016-05-01 13:52:41 -06001745 upriv->mmc = mmc;
1746#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00001747 if (mmc->has_init)
1748 return 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02001749
1750 start = get_timer(0);
1751
Che-Liang Chioue9550442012-11-28 15:21:13 +00001752 if (!mmc->init_in_progress)
1753 err = mmc_start_init(mmc);
1754
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001755 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001756 err = mmc_complete_init(mmc);
Jagan Teki919b4852017-01-10 11:18:43 +01001757 if (err)
1758 printf("%s: %d, time %lu\n", __func__, err, get_timer(start));
1759
Lei Wenbc897b12011-05-02 16:26:26 +00001760 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001761}
1762
Markus Niebelab711882013-12-16 13:40:46 +01001763int mmc_set_dsr(struct mmc *mmc, u16 val)
1764{
1765 mmc->dsr = val;
1766 return 0;
1767}
1768
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001769/* CPU-specific MMC initializations */
1770__weak int cpu_mmc_init(bd_t *bis)
Andy Fleming272cc702008-10-30 16:41:01 -05001771{
1772 return -1;
1773}
1774
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001775/* board-specific MMC initializations. */
1776__weak int board_mmc_init(bd_t *bis)
1777{
1778 return -1;
1779}
Andy Fleming272cc702008-10-30 16:41:01 -05001780
Che-Liang Chioue9550442012-11-28 15:21:13 +00001781void mmc_set_preinit(struct mmc *mmc, int preinit)
1782{
1783 mmc->preinit = preinit;
1784}
1785
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001786#if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1787static int mmc_probe(bd_t *bis)
1788{
1789 return 0;
1790}
1791#elif defined(CONFIG_DM_MMC)
1792static int mmc_probe(bd_t *bis)
1793{
Simon Glass4a1db6d2015-12-29 05:22:49 -07001794 int ret, i;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001795 struct uclass *uc;
Simon Glass4a1db6d2015-12-29 05:22:49 -07001796 struct udevice *dev;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001797
1798 ret = uclass_get(UCLASS_MMC, &uc);
1799 if (ret)
1800 return ret;
1801
Simon Glass4a1db6d2015-12-29 05:22:49 -07001802 /*
1803 * Try to add them in sequence order. Really with driver model we
1804 * should allow holes, but the current MMC list does not allow that.
1805 * So if we request 0, 1, 3 we will get 0, 1, 2.
1806 */
1807 for (i = 0; ; i++) {
1808 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1809 if (ret == -ENODEV)
1810 break;
1811 }
1812 uclass_foreach_dev(dev, uc) {
1813 ret = device_probe(dev);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001814 if (ret)
Simon Glass4a1db6d2015-12-29 05:22:49 -07001815 printf("%s - probe failed: %d\n", dev->name, ret);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001816 }
1817
1818 return 0;
1819}
1820#else
1821static int mmc_probe(bd_t *bis)
1822{
1823 if (board_mmc_init(bis) < 0)
1824 cpu_mmc_init(bis);
1825
1826 return 0;
1827}
1828#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00001829
Andy Fleming272cc702008-10-30 16:41:01 -05001830int mmc_initialize(bd_t *bis)
1831{
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001832 static int initialized = 0;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001833 int ret;
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001834 if (initialized) /* Avoid initializing mmc multiple times */
1835 return 0;
1836 initialized = 1;
1837
Simon Glassc40fdca2016-05-01 13:52:35 -06001838#ifndef CONFIG_BLK
Marek Vasutb5b838f2016-12-01 02:06:33 +01001839#if !CONFIG_IS_ENABLED(MMC_TINY)
Simon Glassc40fdca2016-05-01 13:52:35 -06001840 mmc_list_init();
1841#endif
Marek Vasutb5b838f2016-12-01 02:06:33 +01001842#endif
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001843 ret = mmc_probe(bis);
1844 if (ret)
1845 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -05001846
Ying Zhangbb0dc102013-08-16 15:16:11 +08001847#ifndef CONFIG_SPL_BUILD
Andy Fleming272cc702008-10-30 16:41:01 -05001848 print_mmc_devices(',');
Ying Zhangbb0dc102013-08-16 15:16:11 +08001849#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001850
Simon Glassc40fdca2016-05-01 13:52:35 -06001851 mmc_do_preinit();
Andy Fleming272cc702008-10-30 16:41:01 -05001852 return 0;
1853}
Tomas Melincd3d4882016-11-25 11:01:03 +02001854
1855#ifdef CONFIG_CMD_BKOPS_ENABLE
1856int mmc_set_bkops_enable(struct mmc *mmc)
1857{
1858 int err;
1859 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1860
1861 err = mmc_send_ext_csd(mmc, ext_csd);
1862 if (err) {
1863 puts("Could not get ext_csd register values\n");
1864 return err;
1865 }
1866
1867 if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
1868 puts("Background operations not supported on device\n");
1869 return -EMEDIUMTYPE;
1870 }
1871
1872 if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
1873 puts("Background operations already enabled\n");
1874 return 0;
1875 }
1876
1877 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
1878 if (err) {
1879 puts("Failed to enable manual background operations\n");
1880 return err;
1881 }
1882
1883 puts("Enabled manual background operations\n");
1884
1885 return 0;
1886}
1887#endif