Adam Ford | 5bbc265 | 2017-08-07 17:37:18 -0400 | [diff] [blame] | 1 | |
| 2 | menuconfig NAND |
| 3 | bool "NAND Device Support" |
| 4 | if NAND |
Masahiro Yamada | 4b0abf9 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 5 | |
Masahiro Yamada | 65e4145 | 2014-11-13 20:31:50 +0900 | [diff] [blame] | 6 | config SYS_NAND_SELF_INIT |
| 7 | bool |
| 8 | help |
| 9 | This option, if enabled, provides more flexible and linux-like |
| 10 | NAND initialization process. |
| 11 | |
Masahiro Yamada | 4b0abf9 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 12 | config NAND_DENALI |
| 13 | bool "Support Denali NAND controller" |
Masahiro Yamada | 65e4145 | 2014-11-13 20:31:50 +0900 | [diff] [blame] | 14 | select SYS_NAND_SELF_INIT |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 15 | imply CMD_NAND |
Masahiro Yamada | 4b0abf9 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 16 | help |
| 17 | Enable support for the Denali NAND controller. |
| 18 | |
Masahiro Yamada | 1d9654d | 2017-08-26 01:12:31 +0900 | [diff] [blame] | 19 | config NAND_DENALI_DT |
| 20 | bool "Support Denali NAND controller as a DT device" |
| 21 | depends on NAND_DENALI && OF_CONTROL && DM |
| 22 | help |
| 23 | Enable the driver for NAND flash on platforms using a Denali NAND |
| 24 | controller as a DT device. |
| 25 | |
Masahiro Yamada | 4b0abf9 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 26 | config SYS_NAND_DENALI_64BIT |
| 27 | bool "Use 64-bit variant of Denali NAND controller" |
| 28 | depends on NAND_DENALI |
| 29 | help |
| 30 | The Denali NAND controller IP has some variations in terms of |
| 31 | the bus interface. The DMA setup sequence is completely differenct |
| 32 | between 32bit / 64bit AXI bus variants. |
| 33 | |
| 34 | If your Denali NAND controller is the 64-bit variant, say Y. |
| 35 | Otherwise (32 bit), say N. |
| 36 | |
| 37 | config NAND_DENALI_SPARE_AREA_SKIP_BYTES |
| 38 | int "Number of bytes skipped in OOB area" |
| 39 | depends on NAND_DENALI |
| 40 | range 0 63 |
| 41 | help |
| 42 | This option specifies the number of bytes to skip from the beginning |
| 43 | of OOB area before last ECC sector data starts. This is potentially |
| 44 | used to preserve the bad block marker in the OOB area. |
| 45 | |
Adam Ford | 0a9ef45 | 2017-10-16 14:08:26 -0500 | [diff] [blame] | 46 | config NAND_OMAP_GPMC |
| 47 | bool "Support OMAP GPMC NAND controller" |
| 48 | depends on ARCH_OMAP2PLUS |
| 49 | help |
| 50 | Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. |
| 51 | GPMC controller is used for parallel NAND flash devices, and can |
| 52 | do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8 |
| 53 | and BCH16 ECC algorithms. |
| 54 | |
| 55 | config NAND_OMAP_GPMC_PREFETCH |
| 56 | bool "Enable GPMC Prefetch" |
| 57 | depends on NAND_OMAP_GPMC |
Tom Rini | 39e7096 | 2017-10-20 16:55:51 -0400 | [diff] [blame] | 58 | default y |
Adam Ford | 0a9ef45 | 2017-10-16 14:08:26 -0500 | [diff] [blame] | 59 | help |
| 60 | On OMAP platforms that use the GPMC controller |
| 61 | (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that |
| 62 | uses the prefetch mode to speed up read operations. |
| 63 | |
| 64 | config NAND_OMAP_ELM |
| 65 | bool "Enable ELM driver for OMAPxx and AMxx platforms." |
| 66 | depends on NAND_OMAP_GPMC && !OMAP34XX |
| 67 | help |
| 68 | ELM controller is used for ECC error detection (not ECC calculation) |
| 69 | of BCH4, BCH8 and BCH16 ECC algorithms. |
| 70 | Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, |
| 71 | thus such SoC platforms need to depend on software library for ECC error |
| 72 | detection. However ECC calculation on such plaforms would still be |
| 73 | done by GPMC controller. |
| 74 | |
Stefan Agner | 5519194 | 2015-05-08 19:07:11 +0200 | [diff] [blame] | 75 | config NAND_VF610_NFC |
Heiko Schocher | 064b55c | 2017-06-14 05:49:40 +0200 | [diff] [blame] | 76 | bool "Support for Freescale NFC for VF610" |
Stefan Agner | 5519194 | 2015-05-08 19:07:11 +0200 | [diff] [blame] | 77 | select SYS_NAND_SELF_INIT |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 78 | imply CMD_NAND |
Stefan Agner | 5519194 | 2015-05-08 19:07:11 +0200 | [diff] [blame] | 79 | help |
| 80 | Enables support for NAND Flash Controller on some Freescale |
Heiko Schocher | 064b55c | 2017-06-14 05:49:40 +0200 | [diff] [blame] | 81 | processors like the VF610, MCF54418 or Kinetis K70. |
Stefan Agner | 5519194 | 2015-05-08 19:07:11 +0200 | [diff] [blame] | 82 | The driver supports a maximum 2k page size. The driver |
| 83 | currently does not support hardware ECC. |
| 84 | |
Stefan Agner | 080a71e | 2015-05-08 19:07:12 +0200 | [diff] [blame] | 85 | choice |
| 86 | prompt "Hardware ECC strength" |
| 87 | depends on NAND_VF610_NFC |
| 88 | default SYS_NAND_VF610_NFC_45_ECC_BYTES |
| 89 | help |
| 90 | Select the ECC strength used in the hardware BCH ECC block. |
| 91 | |
| 92 | config SYS_NAND_VF610_NFC_45_ECC_BYTES |
| 93 | bool "24-error correction (45 ECC bytes)" |
| 94 | |
| 95 | config SYS_NAND_VF610_NFC_60_ECC_BYTES |
| 96 | bool "32-error correction (60 ECC bytes)" |
| 97 | |
| 98 | endchoice |
| 99 | |
Stefan Roese | 873960c | 2015-07-23 10:26:16 +0200 | [diff] [blame] | 100 | config NAND_PXA3XX |
| 101 | bool "Support for NAND on PXA3xx and Armada 370/XP/38x" |
| 102 | select SYS_NAND_SELF_INIT |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 103 | imply CMD_NAND |
Stefan Roese | 873960c | 2015-07-23 10:26:16 +0200 | [diff] [blame] | 104 | help |
| 105 | This enables the driver for the NAND flash device found on |
| 106 | PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). |
| 107 | |
Hans de Goede | e526861 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 108 | config NAND_SUNXI |
Boris Brezillon | 4ccae81 | 2016-06-15 21:09:23 +0200 | [diff] [blame] | 109 | bool "Support for NAND on Allwinner SoCs" |
Hans de Goede | e526861 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 110 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
| 111 | select SYS_NAND_SELF_INIT |
Maxime Ripard | 5fe4c9f | 2017-02-27 18:22:08 +0100 | [diff] [blame] | 112 | select SYS_NAND_U_BOOT_LOCATIONS |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 113 | imply CMD_NAND |
Hans de Goede | e526861 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 114 | ---help--- |
Boris Brezillon | 4ccae81 | 2016-06-15 21:09:23 +0200 | [diff] [blame] | 115 | Enable support for NAND. This option enables the standard and |
| 116 | SPL drivers. |
| 117 | The SPL driver only supports reading from the NAND using DMA |
| 118 | transfers. |
Hans de Goede | e526861 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 119 | |
Maxime Ripard | ff93c28 | 2017-02-27 18:22:12 +0100 | [diff] [blame] | 120 | if NAND_SUNXI |
| 121 | |
| 122 | config NAND_SUNXI_SPL_ECC_STRENGTH |
| 123 | int "Allwinner NAND SPL ECC Strength" |
| 124 | default 64 |
| 125 | |
| 126 | config NAND_SUNXI_SPL_ECC_SIZE |
| 127 | int "Allwinner NAND SPL ECC Step Size" |
| 128 | default 1024 |
| 129 | |
| 130 | config NAND_SUNXI_SPL_USABLE_PAGE_SIZE |
| 131 | int "Allwinner NAND SPL Usable Page Size" |
| 132 | default 1024 |
| 133 | |
| 134 | endif |
| 135 | |
Siva Durga Prasad Paladugu | 78cb965 | 2015-11-17 14:30:09 +0530 | [diff] [blame] | 136 | config NAND_ARASAN |
| 137 | bool "Configure Arasan Nand" |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 138 | imply CMD_NAND |
Siva Durga Prasad Paladugu | 78cb965 | 2015-11-17 14:30:09 +0530 | [diff] [blame] | 139 | help |
| 140 | This enables Nand driver support for Arasan nand flash |
| 141 | controller. This uses the hardware ECC for read and |
| 142 | write operations. |
| 143 | |
Adam Ford | 0a9ef45 | 2017-10-16 14:08:26 -0500 | [diff] [blame] | 144 | config NAND_MXC |
| 145 | bool "MXC NAND support" |
| 146 | depends on CPU_ARM926EJS || CPU_ARM1136 || MX5 |
| 147 | imply CMD_NAND |
| 148 | help |
| 149 | This enables the NAND driver for the NAND flash controller on the |
| 150 | i.MX27 / i.MX31 / i.MX5 rocessors. |
| 151 | |
Jagan Teki | df10a85 | 2016-10-08 18:00:25 +0530 | [diff] [blame] | 152 | config NAND_MXS |
| 153 | bool "MXS NAND support" |
Andrey Yurovsky | f78038d | 2017-02-10 10:33:34 -0800 | [diff] [blame] | 154 | depends on MX6 || MX7 |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 155 | imply CMD_NAND |
Jagan Teki | df10a85 | 2016-10-08 18:00:25 +0530 | [diff] [blame] | 156 | help |
| 157 | This enables NAND driver for the NAND flash controller on the |
| 158 | MXS processors. |
| 159 | |
Siva Durga Prasad Paladugu | ae798d2 | 2016-09-27 10:55:46 +0530 | [diff] [blame] | 160 | config NAND_ZYNQ |
| 161 | bool "Support for Zynq Nand controller" |
| 162 | select SYS_NAND_SELF_INIT |
Tom Rini | 8f1a80e | 2017-07-28 21:31:42 -0400 | [diff] [blame] | 163 | imply CMD_NAND |
Siva Durga Prasad Paladugu | ae798d2 | 2016-09-27 10:55:46 +0530 | [diff] [blame] | 164 | help |
| 165 | This enables Nand driver support for Nand flash controller |
| 166 | found on Zynq SoC. |
| 167 | |
Jeff Westfahl | 8000d6e | 2017-11-06 00:34:46 -0800 | [diff] [blame] | 168 | config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS |
| 169 | bool "Enable use of 1st stage bootloader timing for NAND" |
| 170 | depends on NAND_ZYNQ |
| 171 | help |
| 172 | This flag prevent U-boot reconfigure NAND flash controller and reuse |
| 173 | the NAND timing from 1st stage bootloader. |
| 174 | |
Stefan Agner | 5519194 | 2015-05-08 19:07:11 +0200 | [diff] [blame] | 175 | comment "Generic NAND options" |
| 176 | |
| 177 | # Enhance depends when converting drivers to Kconfig which use this config |
| 178 | # option (mxc_nand, ndfc, omap_gpmc). |
| 179 | config SYS_NAND_BUSWIDTH_16BIT |
| 180 | bool "Use 16-bit NAND interface" |
Adam Ford | 0a9ef45 | 2017-10-16 14:08:26 -0500 | [diff] [blame] | 181 | depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI |
Stefan Agner | 5519194 | 2015-05-08 19:07:11 +0200 | [diff] [blame] | 182 | help |
| 183 | Indicates that NAND device has 16-bit wide data-bus. In absence of this |
| 184 | config, bus-width of NAND device is assumed to be either 8-bit and later |
| 185 | determined by reading ONFI params. |
| 186 | Above config is useful when NAND device's bus-width information cannot |
| 187 | be determined from on-chip ONFI params, like in following scenarios: |
| 188 | - SPL boot does not support reading of ONFI parameters. This is done to |
| 189 | keep SPL code foot-print small. |
| 190 | - In current U-Boot flow using nand_init(), driver initialization |
| 191 | happens in board_nand_init() which is called before any device probe |
| 192 | (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are |
| 193 | not available while configuring controller. So a static CONFIG_NAND_xx |
| 194 | is needed to know the device's bus-width in advance. |
| 195 | |
Boris Brezillon | 494e108 | 2016-06-06 10:16:57 +0200 | [diff] [blame] | 196 | if SPL |
| 197 | |
| 198 | config SYS_NAND_U_BOOT_LOCATIONS |
| 199 | bool "Define U-boot binaries locations in NAND" |
| 200 | help |
| 201 | Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. |
| 202 | This option should not be enabled when compiling U-boot for boards |
| 203 | defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h |
| 204 | file. |
| 205 | |
Hans de Goede | d90ba79 | 2015-08-21 21:49:51 +0200 | [diff] [blame] | 206 | config SYS_NAND_U_BOOT_OFFS |
| 207 | hex "Location in NAND to read U-Boot from" |
Maxime Ripard | adc706b | 2017-02-27 18:22:09 +0100 | [diff] [blame] | 208 | default 0x800000 if NAND_SUNXI |
Boris Brezillon | 494e108 | 2016-06-06 10:16:57 +0200 | [diff] [blame] | 209 | depends on SYS_NAND_U_BOOT_LOCATIONS |
Hans de Goede | d90ba79 | 2015-08-21 21:49:51 +0200 | [diff] [blame] | 210 | help |
| 211 | Set the offset from the start of the nand where u-boot should be |
| 212 | loaded from. |
| 213 | |
Boris Brezillon | 80ef700 | 2016-06-06 10:16:58 +0200 | [diff] [blame] | 214 | config SYS_NAND_U_BOOT_OFFS_REDUND |
| 215 | hex "Location in NAND to read U-Boot from" |
| 216 | default SYS_NAND_U_BOOT_OFFS |
| 217 | depends on SYS_NAND_U_BOOT_LOCATIONS |
| 218 | help |
| 219 | Set the offset from the start of the nand where the redundant u-boot |
| 220 | should be loaded from. |
| 221 | |
Adam Ford | 0a9ef45 | 2017-10-16 14:08:26 -0500 | [diff] [blame] | 222 | config SPL_NAND_AM33XX_BCH |
| 223 | bool "Enables SPL-NAND driver which supports ELM based" |
| 224 | depends on NAND_OMAP_GPMC && !OMAP34XX |
| 225 | default y |
| 226 | help |
| 227 | Hardware ECC correction. This is useful for platforms which have ELM |
| 228 | hardware engine and use NAND boot mode. |
| 229 | Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine, |
| 230 | so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling |
| 231 | SPL-NAND driver with software ECC correction support. |
| 232 | |
Masahiro Yamada | 845034e | 2014-10-03 19:21:04 +0900 | [diff] [blame] | 233 | config SPL_NAND_DENALI |
| 234 | bool "Support Denali NAND controller for SPL" |
| 235 | help |
| 236 | This is a small implementation of the Denali NAND controller |
| 237 | for use on SPL. |
| 238 | |
Adam Ford | 0a9ef45 | 2017-10-16 14:08:26 -0500 | [diff] [blame] | 239 | config SPL_NAND_SIMPLE |
| 240 | bool "Use simple SPL NAND driver" |
| 241 | depends on !SPL_NAND_AM33XX_BCH |
| 242 | help |
| 243 | Support for NAND boot using simple NAND drivers that |
| 244 | expose the cmd_ctrl() interface. |
Masahiro Yamada | 845034e | 2014-10-03 19:21:04 +0900 | [diff] [blame] | 245 | endif |
| 246 | |
Adam Ford | 5bbc265 | 2017-08-07 17:37:18 -0400 | [diff] [blame] | 247 | endif # if NAND |