Masahiro Yamada | 4b0abf9 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 1 | menu "NAND Device Support" |
| 2 | |
Masahiro Yamada | 65e4145 | 2014-11-13 20:31:50 +0900 | [diff] [blame] | 3 | config SYS_NAND_SELF_INIT |
| 4 | bool |
| 5 | help |
| 6 | This option, if enabled, provides more flexible and linux-like |
| 7 | NAND initialization process. |
| 8 | |
Masahiro Yamada | 4b0abf9 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 9 | config NAND_DENALI |
| 10 | bool "Support Denali NAND controller" |
Masahiro Yamada | 65e4145 | 2014-11-13 20:31:50 +0900 | [diff] [blame] | 11 | select SYS_NAND_SELF_INIT |
Masahiro Yamada | 4b0abf9 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 12 | help |
| 13 | Enable support for the Denali NAND controller. |
| 14 | |
| 15 | config SYS_NAND_DENALI_64BIT |
| 16 | bool "Use 64-bit variant of Denali NAND controller" |
| 17 | depends on NAND_DENALI |
| 18 | help |
| 19 | The Denali NAND controller IP has some variations in terms of |
| 20 | the bus interface. The DMA setup sequence is completely differenct |
| 21 | between 32bit / 64bit AXI bus variants. |
| 22 | |
| 23 | If your Denali NAND controller is the 64-bit variant, say Y. |
| 24 | Otherwise (32 bit), say N. |
| 25 | |
| 26 | config NAND_DENALI_SPARE_AREA_SKIP_BYTES |
| 27 | int "Number of bytes skipped in OOB area" |
| 28 | depends on NAND_DENALI |
| 29 | range 0 63 |
| 30 | help |
| 31 | This option specifies the number of bytes to skip from the beginning |
| 32 | of OOB area before last ECC sector data starts. This is potentially |
| 33 | used to preserve the bad block marker in the OOB area. |
| 34 | |
Stefan Agner | 5519194 | 2015-05-08 19:07:11 +0200 | [diff] [blame] | 35 | config NAND_VF610_NFC |
| 36 | bool "Support for Freescale NFC for VF610/MPC5125" |
| 37 | select SYS_NAND_SELF_INIT |
| 38 | help |
| 39 | Enables support for NAND Flash Controller on some Freescale |
| 40 | processors like the VF610, MPC5125, MCF54418 or Kinetis K70. |
| 41 | The driver supports a maximum 2k page size. The driver |
| 42 | currently does not support hardware ECC. |
| 43 | |
Stefan Agner | 080a71e | 2015-05-08 19:07:12 +0200 | [diff] [blame] | 44 | choice |
| 45 | prompt "Hardware ECC strength" |
| 46 | depends on NAND_VF610_NFC |
| 47 | default SYS_NAND_VF610_NFC_45_ECC_BYTES |
| 48 | help |
| 49 | Select the ECC strength used in the hardware BCH ECC block. |
| 50 | |
| 51 | config SYS_NAND_VF610_NFC_45_ECC_BYTES |
| 52 | bool "24-error correction (45 ECC bytes)" |
| 53 | |
| 54 | config SYS_NAND_VF610_NFC_60_ECC_BYTES |
| 55 | bool "32-error correction (60 ECC bytes)" |
| 56 | |
| 57 | endchoice |
| 58 | |
Stefan Roese | 873960c | 2015-07-23 10:26:16 +0200 | [diff] [blame] | 59 | config NAND_PXA3XX |
| 60 | bool "Support for NAND on PXA3xx and Armada 370/XP/38x" |
| 61 | select SYS_NAND_SELF_INIT |
| 62 | help |
| 63 | This enables the driver for the NAND flash device found on |
| 64 | PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2). |
| 65 | |
Hans de Goede | e526861 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 66 | config NAND_SUNXI |
Boris Brezillon | 4ccae81 | 2016-06-15 21:09:23 +0200 | [diff] [blame] | 67 | bool "Support for NAND on Allwinner SoCs" |
Hans de Goede | e526861 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 68 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
| 69 | select SYS_NAND_SELF_INIT |
Maxime Ripard | 5fe4c9f | 2017-02-27 18:22:08 +0100 | [diff] [blame^] | 70 | select SYS_NAND_U_BOOT_LOCATIONS |
Hans de Goede | e526861 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 71 | ---help--- |
Boris Brezillon | 4ccae81 | 2016-06-15 21:09:23 +0200 | [diff] [blame] | 72 | Enable support for NAND. This option enables the standard and |
| 73 | SPL drivers. |
| 74 | The SPL driver only supports reading from the NAND using DMA |
| 75 | transfers. |
Hans de Goede | e526861 | 2015-08-16 14:48:22 +0200 | [diff] [blame] | 76 | |
Siva Durga Prasad Paladugu | 78cb965 | 2015-11-17 14:30:09 +0530 | [diff] [blame] | 77 | config NAND_ARASAN |
| 78 | bool "Configure Arasan Nand" |
| 79 | help |
| 80 | This enables Nand driver support for Arasan nand flash |
| 81 | controller. This uses the hardware ECC for read and |
| 82 | write operations. |
| 83 | |
Jagan Teki | df10a85 | 2016-10-08 18:00:25 +0530 | [diff] [blame] | 84 | config NAND_MXS |
| 85 | bool "MXS NAND support" |
Andrey Yurovsky | f78038d | 2017-02-10 10:33:34 -0800 | [diff] [blame] | 86 | depends on MX6 || MX7 |
Jagan Teki | df10a85 | 2016-10-08 18:00:25 +0530 | [diff] [blame] | 87 | help |
| 88 | This enables NAND driver for the NAND flash controller on the |
| 89 | MXS processors. |
| 90 | |
Siva Durga Prasad Paladugu | ae798d2 | 2016-09-27 10:55:46 +0530 | [diff] [blame] | 91 | config NAND_ZYNQ |
| 92 | bool "Support for Zynq Nand controller" |
| 93 | select SYS_NAND_SELF_INIT |
| 94 | help |
| 95 | This enables Nand driver support for Nand flash controller |
| 96 | found on Zynq SoC. |
| 97 | |
Stefan Agner | 5519194 | 2015-05-08 19:07:11 +0200 | [diff] [blame] | 98 | comment "Generic NAND options" |
| 99 | |
| 100 | # Enhance depends when converting drivers to Kconfig which use this config |
| 101 | # option (mxc_nand, ndfc, omap_gpmc). |
| 102 | config SYS_NAND_BUSWIDTH_16BIT |
| 103 | bool "Use 16-bit NAND interface" |
| 104 | depends on NAND_VF610_NFC |
| 105 | help |
| 106 | Indicates that NAND device has 16-bit wide data-bus. In absence of this |
| 107 | config, bus-width of NAND device is assumed to be either 8-bit and later |
| 108 | determined by reading ONFI params. |
| 109 | Above config is useful when NAND device's bus-width information cannot |
| 110 | be determined from on-chip ONFI params, like in following scenarios: |
| 111 | - SPL boot does not support reading of ONFI parameters. This is done to |
| 112 | keep SPL code foot-print small. |
| 113 | - In current U-Boot flow using nand_init(), driver initialization |
| 114 | happens in board_nand_init() which is called before any device probe |
| 115 | (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are |
| 116 | not available while configuring controller. So a static CONFIG_NAND_xx |
| 117 | is needed to know the device's bus-width in advance. |
| 118 | |
Boris Brezillon | 494e108 | 2016-06-06 10:16:57 +0200 | [diff] [blame] | 119 | if SPL |
| 120 | |
| 121 | config SYS_NAND_U_BOOT_LOCATIONS |
| 122 | bool "Define U-boot binaries locations in NAND" |
| 123 | help |
| 124 | Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig. |
| 125 | This option should not be enabled when compiling U-boot for boards |
| 126 | defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h |
| 127 | file. |
| 128 | |
Hans de Goede | d90ba79 | 2015-08-21 21:49:51 +0200 | [diff] [blame] | 129 | config SYS_NAND_U_BOOT_OFFS |
| 130 | hex "Location in NAND to read U-Boot from" |
| 131 | default 0x8000 if NAND_SUNXI |
Boris Brezillon | 494e108 | 2016-06-06 10:16:57 +0200 | [diff] [blame] | 132 | depends on SYS_NAND_U_BOOT_LOCATIONS |
Hans de Goede | d90ba79 | 2015-08-21 21:49:51 +0200 | [diff] [blame] | 133 | help |
| 134 | Set the offset from the start of the nand where u-boot should be |
| 135 | loaded from. |
| 136 | |
Boris Brezillon | 80ef700 | 2016-06-06 10:16:58 +0200 | [diff] [blame] | 137 | config SYS_NAND_U_BOOT_OFFS_REDUND |
| 138 | hex "Location in NAND to read U-Boot from" |
| 139 | default SYS_NAND_U_BOOT_OFFS |
| 140 | depends on SYS_NAND_U_BOOT_LOCATIONS |
| 141 | help |
| 142 | Set the offset from the start of the nand where the redundant u-boot |
| 143 | should be loaded from. |
| 144 | |
Masahiro Yamada | 845034e | 2014-10-03 19:21:04 +0900 | [diff] [blame] | 145 | config SPL_NAND_DENALI |
| 146 | bool "Support Denali NAND controller for SPL" |
| 147 | help |
| 148 | This is a small implementation of the Denali NAND controller |
| 149 | for use on SPL. |
| 150 | |
| 151 | endif |
| 152 | |
Masahiro Yamada | 4b0abf9 | 2014-10-03 19:21:03 +0900 | [diff] [blame] | 153 | endmenu |