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Masahiro Yamada4b0abf92014-10-03 19:21:03 +09001menu "NAND Device Support"
2
Masahiro Yamada65e41452014-11-13 20:31:50 +09003config SYS_NAND_SELF_INIT
4 bool
5 help
6 This option, if enabled, provides more flexible and linux-like
7 NAND initialization process.
8
Masahiro Yamada4b0abf92014-10-03 19:21:03 +09009config NAND_DENALI
10 bool "Support Denali NAND controller"
Masahiro Yamada65e41452014-11-13 20:31:50 +090011 select SYS_NAND_SELF_INIT
Masahiro Yamada4b0abf92014-10-03 19:21:03 +090012 help
13 Enable support for the Denali NAND controller.
14
15config SYS_NAND_DENALI_64BIT
16 bool "Use 64-bit variant of Denali NAND controller"
17 depends on NAND_DENALI
18 help
19 The Denali NAND controller IP has some variations in terms of
20 the bus interface. The DMA setup sequence is completely differenct
21 between 32bit / 64bit AXI bus variants.
22
23 If your Denali NAND controller is the 64-bit variant, say Y.
24 Otherwise (32 bit), say N.
25
26config NAND_DENALI_SPARE_AREA_SKIP_BYTES
27 int "Number of bytes skipped in OOB area"
28 depends on NAND_DENALI
29 range 0 63
30 help
31 This option specifies the number of bytes to skip from the beginning
32 of OOB area before last ECC sector data starts. This is potentially
33 used to preserve the bad block marker in the OOB area.
34
Stefan Agner55191942015-05-08 19:07:11 +020035config NAND_VF610_NFC
36 bool "Support for Freescale NFC for VF610/MPC5125"
37 select SYS_NAND_SELF_INIT
38 help
39 Enables support for NAND Flash Controller on some Freescale
40 processors like the VF610, MPC5125, MCF54418 or Kinetis K70.
41 The driver supports a maximum 2k page size. The driver
42 currently does not support hardware ECC.
43
Stefan Agner080a71e2015-05-08 19:07:12 +020044choice
45 prompt "Hardware ECC strength"
46 depends on NAND_VF610_NFC
47 default SYS_NAND_VF610_NFC_45_ECC_BYTES
48 help
49 Select the ECC strength used in the hardware BCH ECC block.
50
51config SYS_NAND_VF610_NFC_45_ECC_BYTES
52 bool "24-error correction (45 ECC bytes)"
53
54config SYS_NAND_VF610_NFC_60_ECC_BYTES
55 bool "32-error correction (60 ECC bytes)"
56
57endchoice
58
Stefan Roese873960c2015-07-23 10:26:16 +020059config NAND_PXA3XX
60 bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
61 select SYS_NAND_SELF_INIT
62 help
63 This enables the driver for the NAND flash device found on
64 PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
65
Hans de Goedee5268612015-08-16 14:48:22 +020066config NAND_SUNXI
Boris Brezillon4ccae812016-06-15 21:09:23 +020067 bool "Support for NAND on Allwinner SoCs"
Hans de Goedee5268612015-08-16 14:48:22 +020068 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
69 select SYS_NAND_SELF_INIT
70 ---help---
Boris Brezillon4ccae812016-06-15 21:09:23 +020071 Enable support for NAND. This option enables the standard and
72 SPL drivers.
73 The SPL driver only supports reading from the NAND using DMA
74 transfers.
Hans de Goedee5268612015-08-16 14:48:22 +020075
Siva Durga Prasad Paladugu78cb9652015-11-17 14:30:09 +053076config NAND_ARASAN
77 bool "Configure Arasan Nand"
78 help
79 This enables Nand driver support for Arasan nand flash
80 controller. This uses the hardware ECC for read and
81 write operations.
82
Jagan Tekidf10a852016-10-08 18:00:25 +053083config NAND_MXS
84 bool "MXS NAND support"
85 depends on MX6
86 help
87 This enables NAND driver for the NAND flash controller on the
88 MXS processors.
89
Siva Durga Prasad Paladuguae798d22016-09-27 10:55:46 +053090config NAND_ZYNQ
91 bool "Support for Zynq Nand controller"
92 select SYS_NAND_SELF_INIT
93 help
94 This enables Nand driver support for Nand flash controller
95 found on Zynq SoC.
96
Stefan Agner55191942015-05-08 19:07:11 +020097comment "Generic NAND options"
98
99# Enhance depends when converting drivers to Kconfig which use this config
100# option (mxc_nand, ndfc, omap_gpmc).
101config SYS_NAND_BUSWIDTH_16BIT
102 bool "Use 16-bit NAND interface"
103 depends on NAND_VF610_NFC
104 help
105 Indicates that NAND device has 16-bit wide data-bus. In absence of this
106 config, bus-width of NAND device is assumed to be either 8-bit and later
107 determined by reading ONFI params.
108 Above config is useful when NAND device's bus-width information cannot
109 be determined from on-chip ONFI params, like in following scenarios:
110 - SPL boot does not support reading of ONFI parameters. This is done to
111 keep SPL code foot-print small.
112 - In current U-Boot flow using nand_init(), driver initialization
113 happens in board_nand_init() which is called before any device probe
114 (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
115 not available while configuring controller. So a static CONFIG_NAND_xx
116 is needed to know the device's bus-width in advance.
117
Boris Brezillon494e1082016-06-06 10:16:57 +0200118if SPL
119
120config SYS_NAND_U_BOOT_LOCATIONS
121 bool "Define U-boot binaries locations in NAND"
122 help
123 Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
124 This option should not be enabled when compiling U-boot for boards
125 defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
126 file.
127
Hans de Goeded90ba792015-08-21 21:49:51 +0200128config SYS_NAND_U_BOOT_OFFS
129 hex "Location in NAND to read U-Boot from"
130 default 0x8000 if NAND_SUNXI
Boris Brezillon494e1082016-06-06 10:16:57 +0200131 depends on SYS_NAND_U_BOOT_LOCATIONS
Hans de Goeded90ba792015-08-21 21:49:51 +0200132 help
133 Set the offset from the start of the nand where u-boot should be
134 loaded from.
135
Boris Brezillon80ef7002016-06-06 10:16:58 +0200136config SYS_NAND_U_BOOT_OFFS_REDUND
137 hex "Location in NAND to read U-Boot from"
138 default SYS_NAND_U_BOOT_OFFS
139 depends on SYS_NAND_U_BOOT_LOCATIONS
140 help
141 Set the offset from the start of the nand where the redundant u-boot
142 should be loaded from.
143
Masahiro Yamada845034e2014-10-03 19:21:04 +0900144config SPL_NAND_DENALI
145 bool "Support Denali NAND controller for SPL"
146 help
147 This is a small implementation of the Denali NAND controller
148 for use on SPL.
149
150endif
151
Masahiro Yamada4b0abf92014-10-03 19:21:03 +0900152endmenu